Writing MSRs from Domain0

Writing MSRs from Domain0

[Holger Steinhaus]

Hello,

I recently tried Xen 3.0.3-testing on my 2x Opteron-244 SMP machine.
Everything works well exept one detail, which is not unimportant to me:
the powernow-k8 driver fails to switch frequencies. A closer look on the
powernow-k8 source reveals, that some MSR write operations seem to be
without any effect. A rdmsr() before and after the  wrmsr() call reveals
that no real change on the register ocurrs.

An older PowerNow patch from this list emulates MSR writes by DOM0_MSR
hypercalls, but this call seems to be abandoned some time ago. Other
routines in the kernel simply employ the rdmsr()/wrmsr() macros from the
Linux kernel, as the current PowerNow drivers does. Whats the correct
Xen-like way to maniputate a MSR from a Domain0?

Regards,
  Holger

Re: Writing MSRs from Domain0

[Keir Fraser]

On 6/10/06 10:11, "Holger Steinhaus" <hsteinhaus@gmx.de> wrote:

> I recently tried Xen 3.0.3-testing on my 2x Opteron-244 SMP machine.
> Everything works well exept one detail, which is not unimportant to me:
> the powernow-k8 driver fails to switch frequencies. A closer look on the
> powernow-k8 source reveals, that some MSR write operations seem to be
> without any effect. A rdmsr() before and after the  wrmsr() call reveals
> that no real change on the register ocurrs.
> 
> An older PowerNow patch from this list emulates MSR writes by DOM0_MSR
> hypercalls, but this call seems to be abandoned some time ago. Other
> routines in the kernel simply employ the rdmsr()/wrmsr() macros from the
> Linux kernel, as the current PowerNow drivers does. Whats the correct
> Xen-like way to maniputate a MSR from a Domain0?

Add the powernow MSRs to the white list (a switch statement ;-) in
emulate_privileged_op in xen/arch/x86/traps.c. This will allow the write to
succeed. Ensure you have a 1:1 correspondence between virtual CPUs and
physical CPUs for domain 0 (i.e., VCPU0 pinned to PPU0, etc). Cross your
fingers. :-)

 -- Keir

Re: Writing MSRs from Domain0

[Holger Steinhaus]

> Add the powernow MSRs to the white list (a switch statement ;-) in
> emulate_privileged_op in xen/arch/x86/traps.c. This will allow the write to
> succeed. Ensure you have a 1:1 correspondence between virtual CPUs and
> physical CPUs for domain 0 (i.e., VCPU0 pinned to PPU0, etc). Cross your
> fingers. :-)
>   
Thanks, thats the solution for my problem.

Unfortunately, Xen now runs into timer trouble, if the frequency
switches ("Time went backwards"). This problem seems to be caused by the
PIT timer, as the recommended HPET timer is not supported by my hardware.

Regards,
  Holger

Re: Writing MSRs from Domain0

[Keir Fraser]

On 6/10/06 13:23, "Holger Steinhaus" <hsteinhaus@gmx.de> wrote:

>> Add the powernow MSRs to the white list (a switch statement ;-) in
>> emulate_privileged_op in xen/arch/x86/traps.c. This will allow the write to
>> succeed. Ensure you have a 1:1 correspondence between virtual CPUs and
>> physical CPUs for domain 0 (i.e., VCPU0 pinned to PPU0, etc). Cross your
>> fingers. :-)
>>   
> Thanks, thats the solution for my problem.
> 
> Unfortunately, Xen now runs into timer trouble, if the frequency
> switches ("Time went backwards"). This problem seems to be caused by the
> PIT timer, as the recommended HPET timer is not supported by my hardware.

Yeah, someone posted a patch some time ago to work out what frequency is
being switched to when the MSRs are written. A better way will be to add a
frequency-change notification interface so that dom0 can tell Xen when it is
doing frequency scaling. It's good to hear that it seems to working apart
from this detail. :-)

 -- Keir