* [LARTC] Need new way to improve SMP scalability for network router
@ 2006-10-18 13:23 Svetoslav
0 siblings, 0 replies; 2+ messages in thread
From: Svetoslav @ 2006-10-18 13:23 UTC (permalink / raw)
To: lartc
Hi,
Currently I use dual cpu xeon server x86-64 with hp enabled
two intel Gbit Nics 82547
I have assigned every NIC irq to one phisical procesor but the two
virtual procesors stay idle
and are not used for ether routeing or shaping
Is there a way to split work from two NICs on 4 CPUs ?
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* Re: [LARTC] Need new way to improve SMP scalability for network router
@ 2006-11-02 0:28 Damjan
0 siblings, 0 replies; 2+ messages in thread
From: Damjan @ 2006-11-02 0:28 UTC (permalink / raw)
To: lartc
> Currently I use dual cpu xeon server x86-64 with hp enabled
> two intel Gbit Nics 82547
> I have assigned every NIC irq to one phisical procesor but the two
> virtual procesors stay idle
> and are not used for ether routeing or shaping
> Is there a way to split work from two NICs on 4 CPUs ?
What do you expect to get? There are no 4 real CPUs. The only benefit
that the HT technology has is when you need very fast switching between
process/threads ... in this case the kernel should be prety good at it,
and won't see any benefit from HT.
(I guess you are talking about HT.. you've said hp up there)
--
damjan | дамјан
This is my jabber ID --> damjan@bagra.net.mk
-- not my mail address, it's a Jabber ID --^ :)
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2006-10-18 13:23 [LARTC] Need new way to improve SMP scalability for network router Svetoslav
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2006-11-02 0:28 Damjan
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