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From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: Robert Beckett <bob.beckett@collabora.com>,
	dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	Jani Nikula <jani.nikula@linux.intel.com>,
	Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: kernel@collabora.com, Matthew Auld <matthew.auld@intel.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH v8 03/10] drm/i915/ttm: only trust snooping for dgfx when deciding default cache_level
Date: Wed, 22 Jun 2022 12:50:04 +0200	[thread overview]
Message-ID: <453f12ce-e982-0d53-37e4-7e72f1538838@linux.intel.com> (raw)
In-Reply-To: <20220621200058.3536182-4-bob.beckett@collabora.com>


On 6/21/22 22:00, Robert Beckett wrote:
> By default i915_ttm_cache_level() decides I915_CACHE_LLC if HAS_SNOOP.
> This is divergent from existing backends code which only considers
> HAS_LLC.
> Testing shows that trusting snooping on gen5- is unreliable and bsw via
> ggtt mappings, so limit DGFX for now and maintain previous behaviour.
Yeah, IIRC Matthew mentioned that HAS_SNOOP() can be overridden in 
various ways, but not on DGFX, (at least not for DG1). So this looks 
correct to me.
>
> Signed-off-by: Robert Beckett <bob.beckett@collabora.com>

Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>


> ---
>   drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
> index 4c1de0b4a10f..40249fa28a7a 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
> @@ -46,7 +46,9 @@ static enum i915_cache_level
>   i915_ttm_cache_level(struct drm_i915_private *i915, struct ttm_resource *res,
>   		     struct ttm_tt *ttm)
>   {
> -	return ((HAS_LLC(i915) || HAS_SNOOP(i915)) &&
> +	bool can_snoop = HAS_SNOOP(i915) && IS_DGFX(i915);
> +
> +	return ((HAS_LLC(i915) || can_snoop) &&
>   		!i915_ttm_gtt_binds_lmem(res) &&
>   		ttm->caching == ttm_cached) ? I915_CACHE_LLC :
>   		I915_CACHE_NONE;

WARNING: multiple messages have this Message-ID (diff)
From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: Robert Beckett <bob.beckett@collabora.com>,
	dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	Jani Nikula <jani.nikula@linux.intel.com>,
	Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: kernel@collabora.com, Matthew Auld <matthew.auld@intel.com>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v8 03/10] drm/i915/ttm: only trust snooping for dgfx when deciding default cache_level
Date: Wed, 22 Jun 2022 12:50:04 +0200	[thread overview]
Message-ID: <453f12ce-e982-0d53-37e4-7e72f1538838@linux.intel.com> (raw)
In-Reply-To: <20220621200058.3536182-4-bob.beckett@collabora.com>


On 6/21/22 22:00, Robert Beckett wrote:
> By default i915_ttm_cache_level() decides I915_CACHE_LLC if HAS_SNOOP.
> This is divergent from existing backends code which only considers
> HAS_LLC.
> Testing shows that trusting snooping on gen5- is unreliable and bsw via
> ggtt mappings, so limit DGFX for now and maintain previous behaviour.
Yeah, IIRC Matthew mentioned that HAS_SNOOP() can be overridden in 
various ways, but not on DGFX, (at least not for DG1). So this looks 
correct to me.
>
> Signed-off-by: Robert Beckett <bob.beckett@collabora.com>

Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>


> ---
>   drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
> index 4c1de0b4a10f..40249fa28a7a 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
> @@ -46,7 +46,9 @@ static enum i915_cache_level
>   i915_ttm_cache_level(struct drm_i915_private *i915, struct ttm_resource *res,
>   		     struct ttm_tt *ttm)
>   {
> -	return ((HAS_LLC(i915) || HAS_SNOOP(i915)) &&
> +	bool can_snoop = HAS_SNOOP(i915) && IS_DGFX(i915);
> +
> +	return ((HAS_LLC(i915) || can_snoop) &&
>   		!i915_ttm_gtt_binds_lmem(res) &&
>   		ttm->caching == ttm_cached) ? I915_CACHE_LLC :
>   		I915_CACHE_NONE;

  reply	other threads:[~2022-06-22 10:50 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-21 20:00 [Intel-gfx] [PATCH v8 00/10] drm/i915: ttm for stolen Robert Beckett
2022-06-21 20:00 ` Robert Beckett
2022-06-21 20:00 ` [Intel-gfx] [PATCH v8 01/10] drm/i915/ttm: dont trample cache_level overrides during ttm move Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-22 10:44   ` [Intel-gfx] " Thomas Hellström
2022-06-22 10:44     ` Thomas Hellström
2022-06-21 20:00 ` [Intel-gfx] [PATCH v8 02/10] drm/i915: limit ttm to dma32 for i965G[M] Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-22 10:45   ` [Intel-gfx] " Thomas Hellström
2022-06-22 10:45     ` Thomas Hellström
2022-06-21 20:00 ` [Intel-gfx] [PATCH v8 03/10] drm/i915/ttm: only trust snooping for dgfx when deciding default cache_level Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-22 10:50   ` Thomas Hellström [this message]
2022-06-22 10:50     ` Thomas Hellström
2022-06-21 20:00 ` [Intel-gfx] [PATCH v8 04/10] drm/i915/gem: selftest should not attempt mmap of private regions Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-22 11:37   ` [Intel-gfx] " Thomas Hellström
2022-06-22 11:37     ` Thomas Hellström
2022-06-21 20:00 ` [Intel-gfx] [PATCH v8 05/10] drm/i915: instantiate ttm ranger manager for stolen memory Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00 ` [Intel-gfx] [PATCH v8 06/10] drm/i915: sanitize mem_flags for stolen buffers Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00 ` [Intel-gfx] [PATCH v8 07/10] drm/i915: ttm move/clear logic fix Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00 ` [Intel-gfx] [PATCH v8 08/10] drm/i915: allow memory region creators to alloc and free the region Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-22 11:55   ` [Intel-gfx] " Thomas Hellström
2022-06-22 11:55     ` Thomas Hellström
2022-06-21 20:00 ` [Intel-gfx] [PATCH v8 09/10] drm/i915/ttm: add buffer pin on alloc flag Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00 ` [Intel-gfx] [PATCH v8 10/10] drm/i915: stolen memory use ttm backend Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 20:00   ` Robert Beckett
2022-06-21 21:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: ttm for stolen (rev6) Patchwork
2022-06-21 21:48 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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