* MPC52xx support rework for 2.6.20 @ 2006-11-27 21:16 Grant Likely 2006-11-27 21:16 ` [PATCH 1/9] [POWERPC] Document describing mpc52xx device tree binding conventions Grant Likely 2006-11-27 21:39 ` MPC52xx support rework for 2.6.20 Sylvain Munaut 0 siblings, 2 replies; 15+ messages in thread From: Grant Likely @ 2006-11-27 21:16 UTC (permalink / raw) To: linuxppc-dev, Paul Mackerras; +Cc: Sylvain Munaut Rework mpc52xx support in arch/powerpc and add support for lite5200 eval boards. This patchset only covers the board support code. Device drivers will be sent in a seperate patchset as they need to cc: other mailing lists The whole set of pending mpc52xx patches can also be pulled from: git://git.secretlab.ca/srv/git-trees/public/git/linux-2.6.git#lite5200-merge ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 1/9] [POWERPC] Document describing mpc52xx device tree binding conventions 2006-11-27 21:16 MPC52xx support rework for 2.6.20 Grant Likely @ 2006-11-27 21:16 ` Grant Likely 2006-11-27 21:16 ` [PATCH 2/9] [POWERPC] Move MPC52xx PIC driver into arch/powerpc/platforms/52xx Grant Likely 2006-11-27 21:39 ` MPC52xx support rework for 2.6.20 Sylvain Munaut 1 sibling, 1 reply; 15+ messages in thread From: Grant Likely @ 2006-11-27 21:16 UTC (permalink / raw) To: linuxppc-dev, Paul Mackerras; +Cc: Sylvain Munaut This document describes the device tree expectations for mpc52xx based boards. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Sylvain Munaut <tnt@246tNt.com> --- .../powerpc/mpc52xx-device-tree-bindings.txt | 189 ++++++++++++++++++++ 1 files changed, 189 insertions(+), 0 deletions(-) diff --git a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt new file mode 100644 index 0000000..d077d76 --- /dev/null +++ b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt @@ -0,0 +1,189 @@ +MPC52xx Device Tree Bindings +---------------------------- + +(c) 2006 Secret Lab Technologies Ltd +Grant Likely <grant.likely at secretlab.ca> + +I - Introduction +================ +Boards supported by the arch/powerpc architecture require device tree be +passed by the boot loader to the kernel at boot time. The device tree +describes what devices are present on the board and how they are +connected. The device tree can either be passed as a binary blob (as +described in Documentation/powerpc/booting-without-of.txt), or passed +by Open Firmare (IEEE 1275) compatible firmware using an OF compatible +client interface API. + +This document specifies the requirements on the device-tree for mpc52xx +based boards. These requirements are above and beyond the details +specified in either the OpenFirmware spec or booting-without-of.txt + +All new mpc52xx-based boards are expected to match this document. In +cases where this document is not sufficient to support a new board port, +this document should be updated as part of adding the new board support. + +II - Philosophy +=============== +The core of this document is naming convention. The whole point of +defining this convention is to reduce or eliminate the number of +special cases required to support a 52xx board. If all 52xx boards +follow the same convention, then generic 52xx support code will work +rather than coding special cases for each new board. + +This section tries to capture the thought process behind why the naming +convention is what it is. + +1. Node names +------------- +There is strong convention/requirements already established for children +of the root node. 'cpus' describes the processor cores, 'memory' +describes memory, and 'chosen' provides boot configuration. Other nodes +are added to describe devices attached to the processor local bus. +Following convention already established with other system-on-chip +processors, MPC52xx boards must have an 'soc5200' node as a child of the +root node. + +The soc5200 node holds child nodes for all on chip devices. Child nodes +are typically named after the configured function. ie. the FEC node is +named 'ethernet', and a PSC in uart mode is named 'serial'. + +2. device_type property +----------------------- +similar to the node name convention above; the device_type reflects the +configured function of a device. ie. 'serial' for a uart and 'spi' for +an spi controller. However, while node names *should* reflect the +configured function, device_type *must* match the configured function +exactly. + +3. compatible property +---------------------- +Since device_type isn't enough to match devices to drivers, there also +needs to be a naming convention for the compatible property. Compatible +is an list of device descriptions sorted from specific to generic. For +the mpc52xx, the required format for each compatible value is +<chip>-<device>[-<mode>]. At the minimum, the list shall contain two +items; the first specifying the exact chip, and the second specifying +mpc52xx for the chip. + +ie. ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc52xx-ethernet" + +The idea here is that most drivers will match to the most generic field +in the compatible list (mpc52xx-*), but can also test the more specific +field for enabling bug fixes or extra features. + +Modal devices, like PSCs, also append the configured function to the +end of the compatible field. ie. A PSC in i2s mode would specify +"mpc52xx-psc-i2s", not "mpc52xx-i2s". This convention is chosen to +avoid naming conflicts with non-psc devices providing the same +function. For example, "mpc52xx-spi" and "mpc52xx-psc-spi" describe +the mpc5200 simple spi device and a PSC spi mode respectively. + +If the soc device is more generic and present on other SOCs, the +compatible property can specify the more generic device type also. + +ie. mscan: compatible = "mpc5200-mscan\0mpc52xx-mscan\0fsl,mscan"; + +At the time of writing, exact chip may be either 'mpc5200' or +'mpc5200b'. + +Device drivers should always try to match as generically as possible. + +III - Structure +=============== +The device tree for an mpc52xx board follows the structure defined in +booting-without-of.txt with the following additional notes: + +0) the root node +---------------- +Typical root description node; see booting-without-of + +1) The cpus node +---------------- +The cpus node follows the basic layout described in booting-without-of. +The bus-frequency property holds the XLB bus frequency +The clock-frequency property holds the core frequency + +2) The memory node +------------------ +Typical memory description node; see booting-without-of. + +3) The soc5200 node +------------------- +This node describes the on chip SOC peripherals. Every mpc52xx based +board will have this node, and as such there is a common naming +convention for SOC devices. + +Required properties: +name type description +---- ---- ----------- +device_type string must be "soc" +ranges int should be <0 baseaddr baseaddr+10000> +reg int must be <baseaddr 10000> + +Recommended properties: +name type description +---- ---- ----------- +compatible string should be "<chip>-soc\0mpc52xx-soc" + ie. "mpc5200b-soc\0mpc52xx-soc" +#interrupt-cells int must be <3>. If it is not defined + here then it must be defined in every + soc device node. +bus-frequency int IPB bus frequency in HZ. Clock rate + used by most of the soc devices. + Defining it here avoids needing it + added to every device node. + +4) soc5200 child nodes +---------------------- +Any on chip SOC devices available to Linux must appear as soc5200 child nodes. + +Note: in the tables below, '*' matches all <chip> values. ie. +*-pic would translate to "mpc5200-pic\0mpc52xx-pic" + +Required soc5200 child nodes: +name device_type compatible Description +---- ----------- ---------- ----------- +cdm@<addr> cdm *-cmd Clock Distribution +pic@<addr> interrupt-controller *-pic need an interrupt + controller to boot +bestcomm@<addr> dma-controller *-bestcomm 52xx pic also requires + the bestcomm device + +Recommended soc5200 child nodes; populate as needed for your board +name device_type compatible Description +---- ----------- ---------- ----------- +gpt@<addr> gpt *-gpt General purpose timers +rtc@<addr> rtc *-rtc Real time clock +mscan@<addr> mscan *-mscan CAN bus controller +pci@<addr> pci *-pci PCI bridge +serial@<addr> serial *-psc-uart PSC in serial mode +i2s@<addr> i2s *-psc-i2s PSC in i2s mode +ac97@<addr> ac97 *-psc-ac97 PSC in ac97 mode +spi@<addr> spi *-psc-spi PSC in spi mode +irda@<addr> irda *-psc-irda PSC in IrDA mode +spi@<addr> spi *-spi MPC52xx spi device +ethernet@<addr> network *-fec MPC52xx ethernet device +ata@<addr> ata *-ata IDE ATA interface +i2c@<addr> i2c *-i2c I2C controller +usb@<addr> usb-ohci-be *-ohci,ohci-be USB controller +xlb@<addr> xlb *-xlb XLB arbritrator + +IV - Extra Notes +================ + +1. Interrupt mapping +-------------------- +The mpc52xx pic driver splits hardware IRQ numbers into two levels. The +split reflects the layout of the PIC hardware itself, which groups +interrupts into one of three groups; CRIT, MAIN or PERP. Also, the +Bestcomm dma engine has it's own set of interrupt sources which are +cascaded off of peripheral interrupt 0, which the driver interprets as a +fourth group, SDMA. + +The interrupts property for device nodes using the mpc52xx pic consists +of three cells; <L1 L2 level> + + L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3] + L2 := interrupt number; directly mapped from the value in the + "ICTL PerStat, MainStat, CritStat Encoded Register" + level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3] -- 1.4.3.rc2.g0503 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 2/9] [POWERPC] Move MPC52xx PIC driver into arch/powerpc/platforms/52xx 2006-11-27 21:16 ` [PATCH 1/9] [POWERPC] Document describing mpc52xx device tree binding conventions Grant Likely @ 2006-11-27 21:16 ` Grant Likely 2006-11-27 21:16 ` [PATCH 3/9] [POWERPC] Put mpc52xx support file in platforms/52xx Grant Likely 0 siblings, 1 reply; 15+ messages in thread From: Grant Likely @ 2006-11-27 21:16 UTC (permalink / raw) To: linuxppc-dev, Paul Mackerras; +Cc: Sylvain Munaut No other chips use this device, it belongs in a 52xx-specific path. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tNt.com> --- arch/powerpc/platforms/52xx/Makefile | 6 + arch/powerpc/platforms/52xx/mpc52xx_pic.c | 538 +++++++++++++++++++++++++++++ arch/powerpc/platforms/Makefile | 5 +- arch/powerpc/sysdev/Makefile | 1 - arch/powerpc/sysdev/mpc52xx_pic.c | 538 ----------------------------- 5 files changed, 547 insertions(+), 541 deletions(-) diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile new file mode 100644 index 0000000..e1b02f1 --- /dev/null +++ b/arch/powerpc/platforms/52xx/Makefile @@ -0,0 +1,6 @@ +# +# Makefile for 52xx based boards +# +ifeq ($(CONFIG_PPC_MERGE),y) +obj-y += mpc52xx_pic.o +endif diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c new file mode 100644 index 0000000..6df51f0 --- /dev/null +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c @@ -0,0 +1,538 @@ +/* + * + * Programmable Interrupt Controller functions for the Freescale MPC52xx. + * + * Copyright (C) 2006 bplan GmbH + * + * Based on the code from the 2.4 kernel by + * Dale Farnsworth <dfarnsworth@mvista.com> and Kent Borg. + * + * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com> + * Copyright (C) 2003 Montavista Software, Inc + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + * + */ + +#undef DEBUG + +#include <linux/stddef.h> +#include <linux/init.h> +#include <linux/sched.h> +#include <linux/signal.h> +#include <linux/stddef.h> +#include <linux/delay.h> +#include <linux/irq.h> +#include <linux/hardirq.h> + +#include <asm/io.h> +#include <asm/processor.h> +#include <asm/system.h> +#include <asm/irq.h> +#include <asm/prom.h> +#include <asm/mpc52xx.h> + +/* + * +*/ + +static struct mpc52xx_intr __iomem *intr; +static struct mpc52xx_sdma __iomem *sdma; +static struct irq_host *mpc52xx_irqhost = NULL; + +static unsigned char mpc52xx_map_senses[4] = { + IRQ_TYPE_LEVEL_HIGH, + IRQ_TYPE_EDGE_RISING, + IRQ_TYPE_EDGE_FALLING, + IRQ_TYPE_LEVEL_LOW, +}; + +/* + * +*/ + +static inline void io_be_setbit(u32 __iomem * addr, int bitno) +{ + out_be32(addr, in_be32(addr) | (1 << bitno)); +} + +static inline void io_be_clrbit(u32 __iomem * addr, int bitno) +{ + out_be32(addr, in_be32(addr) & ~(1 << bitno)); +} + +/* + * IRQ[0-3] interrupt irq_chip +*/ + +static void mpc52xx_extirq_mask(unsigned int virq) +{ + int irq; + int l2irq; + + irq = irq_map[virq].hwirq; + l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; + + pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); + + io_be_clrbit(&intr->ctrl, 11 - l2irq); +} + +static void mpc52xx_extirq_unmask(unsigned int virq) +{ + int irq; + int l2irq; + + irq = irq_map[virq].hwirq; + l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; + + pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); + + io_be_setbit(&intr->ctrl, 11 - l2irq); +} + +static void mpc52xx_extirq_ack(unsigned int virq) +{ + int irq; + int l2irq; + + irq = irq_map[virq].hwirq; + l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; + + pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); + + io_be_setbit(&intr->ctrl, 27 - l2irq); +} + +static struct irq_chip mpc52xx_extirq_irqchip = { + .typename = " MPC52xx IRQ[0-3] ", + .mask = mpc52xx_extirq_mask, + .unmask = mpc52xx_extirq_unmask, + .ack = mpc52xx_extirq_ack, +}; + +/* + * Main interrupt irq_chip +*/ + +static void mpc52xx_main_mask(unsigned int virq) +{ + int irq; + int l2irq; + + irq = irq_map[virq].hwirq; + l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; + + pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); + + io_be_setbit(&intr->main_mask, 15 - l2irq); +} + +static void mpc52xx_main_unmask(unsigned int virq) +{ + int irq; + int l2irq; + + irq = irq_map[virq].hwirq; + l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; + + pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); + + io_be_clrbit(&intr->main_mask, 15 - l2irq); +} + +static struct irq_chip mpc52xx_main_irqchip = { + .typename = "MPC52xx Main", + .mask = mpc52xx_main_mask, + .mask_ack = mpc52xx_main_mask, + .unmask = mpc52xx_main_unmask, +}; + +/* + * Peripherals interrupt irq_chip +*/ + +static void mpc52xx_periph_mask(unsigned int virq) +{ + int irq; + int l2irq; + + irq = irq_map[virq].hwirq; + l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; + + pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); + + io_be_setbit(&intr->per_mask, 31 - l2irq); +} + +static void mpc52xx_periph_unmask(unsigned int virq) +{ + int irq; + int l2irq; + + irq = irq_map[virq].hwirq; + l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; + + pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); + + io_be_clrbit(&intr->per_mask, 31 - l2irq); +} + +static struct irq_chip mpc52xx_periph_irqchip = { + .typename = "MPC52xx Peripherals", + .mask = mpc52xx_periph_mask, + .mask_ack = mpc52xx_periph_mask, + .unmask = mpc52xx_periph_unmask, +}; + +/* + * SDMA interrupt irq_chip +*/ + +static void mpc52xx_sdma_mask(unsigned int virq) +{ + int irq; + int l2irq; + + irq = irq_map[virq].hwirq; + l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; + + pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); + + io_be_setbit(&sdma->IntMask, l2irq); +} + +static void mpc52xx_sdma_unmask(unsigned int virq) +{ + int irq; + int l2irq; + + irq = irq_map[virq].hwirq; + l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; + + pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); + + io_be_clrbit(&sdma->IntMask, l2irq); +} + +static void mpc52xx_sdma_ack(unsigned int virq) +{ + int irq; + int l2irq; + + irq = irq_map[virq].hwirq; + l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; + + pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); + + out_be32(&sdma->IntPend, 1 << l2irq); +} + +static struct irq_chip mpc52xx_sdma_irqchip = { + .typename = "MPC52xx SDMA", + .mask = mpc52xx_sdma_mask, + .unmask = mpc52xx_sdma_unmask, + .ack = mpc52xx_sdma_ack, +}; + +/* + * irq_host +*/ + +static int mpc52xx_irqhost_match(struct irq_host *h, struct device_node *node) +{ + pr_debug("%s: node=%p\n", __func__, node); + return mpc52xx_irqhost->host_data == node; +} + +static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct, + u32 * intspec, unsigned int intsize, + irq_hw_number_t * out_hwirq, + unsigned int *out_flags) +{ + int intrvect_l1; + int intrvect_l2; + int intrvect_type; + int intrvect_linux; + + if (intsize != 3) + return -1; + + intrvect_l1 = (int)intspec[0]; + intrvect_l2 = (int)intspec[1]; + intrvect_type = (int)intspec[2]; + + intrvect_linux = + (intrvect_l1 << MPC52xx_IRQ_L1_OFFSET) & MPC52xx_IRQ_L1_MASK; + intrvect_linux |= + (intrvect_l2 << MPC52xx_IRQ_L2_OFFSET) & MPC52xx_IRQ_L2_MASK; + + pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1, + intrvect_l2); + + *out_hwirq = intrvect_linux; + *out_flags = mpc52xx_map_senses[intrvect_type]; + + return 0; +} + +/* + * this function retrieves the correct IRQ type out + * of the MPC regs + * Only externals IRQs needs this +*/ +static int mpc52xx_irqx_gettype(int irq) +{ + int type; + u32 ctrl_reg; + + ctrl_reg = in_be32(&intr->ctrl); + type = (ctrl_reg >> (22 - irq * 2)) & 0x3; + + return mpc52xx_map_senses[type]; +} + +static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq, + irq_hw_number_t irq) +{ + int l1irq; + int l2irq; + struct irq_chip *good_irqchip; + void *good_handle; + int type; + + l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET; + l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; + + /* + * Most of ours IRQs will be level low + * Only external IRQs on some platform may be others + */ + type = IRQ_TYPE_LEVEL_LOW; + + switch (l1irq) { + case MPC52xx_IRQ_L1_CRIT: + pr_debug("%s: Critical. l2=%x\n", __func__, l2irq); + + BUG_ON(l2irq != 0); + + type = mpc52xx_irqx_gettype(l2irq); + good_irqchip = &mpc52xx_extirq_irqchip; + break; + + case MPC52xx_IRQ_L1_MAIN: + pr_debug("%s: Main IRQ[1-3] l2=%x\n", __func__, l2irq); + + if ((l2irq >= 1) && (l2irq <= 3)) { + type = mpc52xx_irqx_gettype(l2irq); + good_irqchip = &mpc52xx_extirq_irqchip; + } else { + good_irqchip = &mpc52xx_main_irqchip; + } + break; + + case MPC52xx_IRQ_L1_PERP: + pr_debug("%s: Peripherals. l2=%x\n", __func__, l2irq); + good_irqchip = &mpc52xx_periph_irqchip; + break; + + case MPC52xx_IRQ_L1_SDMA: + pr_debug("%s: SDMA. l2=%x\n", __func__, l2irq); + good_irqchip = &mpc52xx_sdma_irqchip; + break; + + default: + pr_debug("%s: Error, unknown L1 IRQ (0x%x)\n", __func__, l1irq); + printk(KERN_ERR "Unknow IRQ!\n"); + return -EINVAL; + } + + switch (type) { + case IRQ_TYPE_EDGE_FALLING: + case IRQ_TYPE_EDGE_RISING: + good_handle = handle_edge_irq; + break; + default: + good_handle = handle_level_irq; + } + + set_irq_chip_and_handler(virq, good_irqchip, good_handle); + + pr_debug("%s: virq=%x, hw=%x. type=%x\n", __func__, virq, + (int)irq, type); + + return 0; +} + +static struct irq_host_ops mpc52xx_irqhost_ops = { + .match = mpc52xx_irqhost_match, + .xlate = mpc52xx_irqhost_xlate, + .map = mpc52xx_irqhost_map, +}; + +/* + * init (public) +*/ + +void __init mpc52xx_init_irq(void) +{ + struct device_node *picnode = NULL; + int picnode_regsize; + u32 picnode_regoffset; + + struct device_node *sdmanode = NULL; + int sdmanode_regsize; + u32 sdmanode_regoffset; + + u64 size64; + int flags; + + u32 intr_ctrl; + + picnode = of_find_compatible_node(NULL, "interrupt-controller", + "mpc5200-pic"); + if (picnode == NULL) { + printk(KERN_ERR "MPC52xx PIC: " + "Unable to find the interrupt controller " + "in the OpenFirmware device tree\n"); + goto end; + } + + sdmanode = of_find_compatible_node(NULL, "dma-controller", + "mpc5200-bestcomm"); + if (sdmanode == NULL) { + printk(KERN_ERR "MPC52xx PIC" + "Unable to find the Bestcomm DMA controller device " + "in the OpenFirmware device tree\n"); + goto end; + } + + /* Retrieve PIC ressources */ + picnode_regoffset = (u32) of_get_address(picnode, 0, &size64, &flags); + if (picnode_regoffset == 0) { + printk(KERN_ERR "MPC52xx PIC" + "Unable to get the interrupt controller address\n"); + goto end; + } + + picnode_regoffset = + of_translate_address(picnode, (u32 *) picnode_regoffset); + picnode_regsize = (int)size64; + + /* Retrieve SDMA ressources */ + sdmanode_regoffset = (u32) of_get_address(sdmanode, 0, &size64, &flags); + if (sdmanode_regoffset == 0) { + printk(KERN_ERR "MPC52xx PIC: " + "Unable to get the Bestcomm DMA controller address\n"); + goto end; + } + + sdmanode_regoffset = + of_translate_address(sdmanode, (u32 *) sdmanode_regoffset); + sdmanode_regsize = (int)size64; + + /* Remap the necessary zones */ + intr = ioremap(picnode_regoffset, picnode_regsize); + if (intr == NULL) { + printk(KERN_ERR "MPC52xx PIC: " + "Unable to ioremap interrupt controller registers!\n"); + goto end; + } + + sdma = ioremap(sdmanode_regoffset, sdmanode_regsize); + if (sdma == NULL) { + iounmap(intr); + printk(KERN_ERR "MPC52xx PIC: " + "Unable to ioremap Bestcomm DMA registers!\n"); + goto end; + } + + printk(KERN_INFO "MPC52xx PIC: MPC52xx PIC Remapped at 0x%8.8x\n", + picnode_regoffset); + printk(KERN_INFO "MPC52xx PIC: MPC52xx SDMA Remapped at 0x%8.8x\n", + sdmanode_regoffset); + + /* Disable all interrupt sources. */ + out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */ + out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */ + out_be32(&intr->per_mask, 0x7ffffc00); /* 1 means disabled */ + out_be32(&intr->main_mask, 0x00010fff); /* 1 means disabled */ + intr_ctrl = in_be32(&intr->ctrl); + intr_ctrl &= 0x00ff0000; /* Keeps IRQ[0-3] config */ + intr_ctrl |= 0x0f000000 | /* clear IRQ 0-3 */ + 0x00001000 | /* MEE master external enable */ + 0x00000000 | /* 0 means disable IRQ 0-3 */ + 0x00000001; /* CEb route critical normally */ + out_be32(&intr->ctrl, intr_ctrl); + + /* Zero a bunch of the priority settings. */ + out_be32(&intr->per_pri1, 0); + out_be32(&intr->per_pri2, 0); + out_be32(&intr->per_pri3, 0); + out_be32(&intr->main_pri1, 0); + out_be32(&intr->main_pri2, 0); + + /* + * As last step, add an irq host to translate the real + * hw irq information provided by the ofw to linux virq + */ + + mpc52xx_irqhost = + irq_alloc_host(IRQ_HOST_MAP_LINEAR, MPC52xx_IRQ_HIGHTESTHWIRQ, + &mpc52xx_irqhost_ops, -1); + + if (mpc52xx_irqhost) { + mpc52xx_irqhost->host_data = picnode; + printk(KERN_INFO "MPC52xx PIC is up and running!\n"); + } else { + printk(KERN_ERR + "MPC52xx PIC: Unable to allocate the IRQ host\n"); + } + +end: + of_node_put(picnode); + of_node_put(sdmanode); +} + +/* + * get_irq (public) +*/ +unsigned int mpc52xx_get_irq(void) +{ + u32 status; + int irq = NO_IRQ_IGNORE; + + status = in_be32(&intr->enc_status); + if (status & 0x00000400) { /* critical */ + irq = (status >> 8) & 0x3; + if (irq == 2) /* high priority peripheral */ + goto peripheral; + irq |= (MPC52xx_IRQ_L1_CRIT << MPC52xx_IRQ_L1_OFFSET) & + MPC52xx_IRQ_L1_MASK; + } else if (status & 0x00200000) { /* main */ + irq = (status >> 16) & 0x1f; + if (irq == 4) /* low priority peripheral */ + goto peripheral; + irq |= (MPC52xx_IRQ_L1_MAIN << MPC52xx_IRQ_L1_OFFSET) & + MPC52xx_IRQ_L1_MASK; + } else if (status & 0x20000000) { /* peripheral */ + peripheral: + irq = (status >> 24) & 0x1f; + if (irq == 0) { /* bestcomm */ + status = in_be32(&sdma->IntPend); + irq = ffs(status) - 1; + irq |= (MPC52xx_IRQ_L1_SDMA << MPC52xx_IRQ_L1_OFFSET) & + MPC52xx_IRQ_L1_MASK; + } else + irq |= (MPC52xx_IRQ_L1_PERP << MPC52xx_IRQ_L1_OFFSET) & + MPC52xx_IRQ_L1_MASK; + } + + pr_debug("%s: irq=%x. virq=%d\n", __func__, irq, + irq_linear_revmap(mpc52xx_irqhost, irq)); + + return irq_linear_revmap(mpc52xx_irqhost, irq); +} + diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile index 56caf4f..562f9da 100644 --- a/arch/powerpc/platforms/Makefile +++ b/arch/powerpc/platforms/Makefile @@ -5,16 +5,17 @@ ifeq ($(CONFIG_PPC64),y) obj-$(CONFIG_PPC_PMAC) += powermac/ endif endif -obj-$(CONFIG_PPC_EFIKA) += efika/ +obj-$(CONFIG_PPC_EFIKA) += efika/ obj-$(CONFIG_PPC_CHRP) += chrp/ obj-$(CONFIG_4xx) += 4xx/ +obj-$(CONFIG_PPC_MPC52xx) += 52xx/ obj-$(CONFIG_PPC_83xx) += 83xx/ obj-$(CONFIG_PPC_85xx) += 85xx/ obj-$(CONFIG_PPC_86xx) += 86xx/ obj-$(CONFIG_PPC_PSERIES) += pseries/ obj-$(CONFIG_PPC_ISERIES) += iseries/ obj-$(CONFIG_PPC_MAPLE) += maple/ -obj-$(CONFIG_PPC_PASEMI) += pasemi/ +obj-$(CONFIG_PPC_PASEMI) += pasemi/ obj-$(CONFIG_PPC_CELL) += cell/ obj-$(CONFIG_PS3) += ps3/ obj-$(CONFIG_EMBEDDED6xx) += embedded6xx/ diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index bae8746..623fe71 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -15,7 +15,6 @@ obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ ifeq ($(CONFIG_PPC_MERGE),y) obj-$(CONFIG_PPC_I8259) += i8259.o obj-$(CONFIG_PPC_83xx) += ipic.o -obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_pic.o endif # Temporary hack until we have migrated to asm-powerpc diff --git a/arch/powerpc/sysdev/mpc52xx_pic.c b/arch/powerpc/sysdev/mpc52xx_pic.c deleted file mode 100644 index 6df51f0..0000000 --- a/arch/powerpc/sysdev/mpc52xx_pic.c +++ /dev/null @@ -1,538 +0,0 @@ -/* - * - * Programmable Interrupt Controller functions for the Freescale MPC52xx. - * - * Copyright (C) 2006 bplan GmbH - * - * Based on the code from the 2.4 kernel by - * Dale Farnsworth <dfarnsworth@mvista.com> and Kent Borg. - * - * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com> - * Copyright (C) 2003 Montavista Software, Inc - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - * - */ - -#undef DEBUG - -#include <linux/stddef.h> -#include <linux/init.h> -#include <linux/sched.h> -#include <linux/signal.h> -#include <linux/stddef.h> -#include <linux/delay.h> -#include <linux/irq.h> -#include <linux/hardirq.h> - -#include <asm/io.h> -#include <asm/processor.h> -#include <asm/system.h> -#include <asm/irq.h> -#include <asm/prom.h> -#include <asm/mpc52xx.h> - -/* - * -*/ - -static struct mpc52xx_intr __iomem *intr; -static struct mpc52xx_sdma __iomem *sdma; -static struct irq_host *mpc52xx_irqhost = NULL; - -static unsigned char mpc52xx_map_senses[4] = { - IRQ_TYPE_LEVEL_HIGH, - IRQ_TYPE_EDGE_RISING, - IRQ_TYPE_EDGE_FALLING, - IRQ_TYPE_LEVEL_LOW, -}; - -/* - * -*/ - -static inline void io_be_setbit(u32 __iomem * addr, int bitno) -{ - out_be32(addr, in_be32(addr) | (1 << bitno)); -} - -static inline void io_be_clrbit(u32 __iomem * addr, int bitno) -{ - out_be32(addr, in_be32(addr) & ~(1 << bitno)); -} - -/* - * IRQ[0-3] interrupt irq_chip -*/ - -static void mpc52xx_extirq_mask(unsigned int virq) -{ - int irq; - int l2irq; - - irq = irq_map[virq].hwirq; - l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; - - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); - - io_be_clrbit(&intr->ctrl, 11 - l2irq); -} - -static void mpc52xx_extirq_unmask(unsigned int virq) -{ - int irq; - int l2irq; - - irq = irq_map[virq].hwirq; - l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; - - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); - - io_be_setbit(&intr->ctrl, 11 - l2irq); -} - -static void mpc52xx_extirq_ack(unsigned int virq) -{ - int irq; - int l2irq; - - irq = irq_map[virq].hwirq; - l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; - - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); - - io_be_setbit(&intr->ctrl, 27 - l2irq); -} - -static struct irq_chip mpc52xx_extirq_irqchip = { - .typename = " MPC52xx IRQ[0-3] ", - .mask = mpc52xx_extirq_mask, - .unmask = mpc52xx_extirq_unmask, - .ack = mpc52xx_extirq_ack, -}; - -/* - * Main interrupt irq_chip -*/ - -static void mpc52xx_main_mask(unsigned int virq) -{ - int irq; - int l2irq; - - irq = irq_map[virq].hwirq; - l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; - - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); - - io_be_setbit(&intr->main_mask, 15 - l2irq); -} - -static void mpc52xx_main_unmask(unsigned int virq) -{ - int irq; - int l2irq; - - irq = irq_map[virq].hwirq; - l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; - - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); - - io_be_clrbit(&intr->main_mask, 15 - l2irq); -} - -static struct irq_chip mpc52xx_main_irqchip = { - .typename = "MPC52xx Main", - .mask = mpc52xx_main_mask, - .mask_ack = mpc52xx_main_mask, - .unmask = mpc52xx_main_unmask, -}; - -/* - * Peripherals interrupt irq_chip -*/ - -static void mpc52xx_periph_mask(unsigned int virq) -{ - int irq; - int l2irq; - - irq = irq_map[virq].hwirq; - l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; - - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); - - io_be_setbit(&intr->per_mask, 31 - l2irq); -} - -static void mpc52xx_periph_unmask(unsigned int virq) -{ - int irq; - int l2irq; - - irq = irq_map[virq].hwirq; - l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; - - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); - - io_be_clrbit(&intr->per_mask, 31 - l2irq); -} - -static struct irq_chip mpc52xx_periph_irqchip = { - .typename = "MPC52xx Peripherals", - .mask = mpc52xx_periph_mask, - .mask_ack = mpc52xx_periph_mask, - .unmask = mpc52xx_periph_unmask, -}; - -/* - * SDMA interrupt irq_chip -*/ - -static void mpc52xx_sdma_mask(unsigned int virq) -{ - int irq; - int l2irq; - - irq = irq_map[virq].hwirq; - l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; - - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); - - io_be_setbit(&sdma->IntMask, l2irq); -} - -static void mpc52xx_sdma_unmask(unsigned int virq) -{ - int irq; - int l2irq; - - irq = irq_map[virq].hwirq; - l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; - - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); - - io_be_clrbit(&sdma->IntMask, l2irq); -} - -static void mpc52xx_sdma_ack(unsigned int virq) -{ - int irq; - int l2irq; - - irq = irq_map[virq].hwirq; - l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; - - pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); - - out_be32(&sdma->IntPend, 1 << l2irq); -} - -static struct irq_chip mpc52xx_sdma_irqchip = { - .typename = "MPC52xx SDMA", - .mask = mpc52xx_sdma_mask, - .unmask = mpc52xx_sdma_unmask, - .ack = mpc52xx_sdma_ack, -}; - -/* - * irq_host -*/ - -static int mpc52xx_irqhost_match(struct irq_host *h, struct device_node *node) -{ - pr_debug("%s: node=%p\n", __func__, node); - return mpc52xx_irqhost->host_data == node; -} - -static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct, - u32 * intspec, unsigned int intsize, - irq_hw_number_t * out_hwirq, - unsigned int *out_flags) -{ - int intrvect_l1; - int intrvect_l2; - int intrvect_type; - int intrvect_linux; - - if (intsize != 3) - return -1; - - intrvect_l1 = (int)intspec[0]; - intrvect_l2 = (int)intspec[1]; - intrvect_type = (int)intspec[2]; - - intrvect_linux = - (intrvect_l1 << MPC52xx_IRQ_L1_OFFSET) & MPC52xx_IRQ_L1_MASK; - intrvect_linux |= - (intrvect_l2 << MPC52xx_IRQ_L2_OFFSET) & MPC52xx_IRQ_L2_MASK; - - pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1, - intrvect_l2); - - *out_hwirq = intrvect_linux; - *out_flags = mpc52xx_map_senses[intrvect_type]; - - return 0; -} - -/* - * this function retrieves the correct IRQ type out - * of the MPC regs - * Only externals IRQs needs this -*/ -static int mpc52xx_irqx_gettype(int irq) -{ - int type; - u32 ctrl_reg; - - ctrl_reg = in_be32(&intr->ctrl); - type = (ctrl_reg >> (22 - irq * 2)) & 0x3; - - return mpc52xx_map_senses[type]; -} - -static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq, - irq_hw_number_t irq) -{ - int l1irq; - int l2irq; - struct irq_chip *good_irqchip; - void *good_handle; - int type; - - l1irq = (irq & MPC52xx_IRQ_L1_MASK) >> MPC52xx_IRQ_L1_OFFSET; - l2irq = (irq & MPC52xx_IRQ_L2_MASK) >> MPC52xx_IRQ_L2_OFFSET; - - /* - * Most of ours IRQs will be level low - * Only external IRQs on some platform may be others - */ - type = IRQ_TYPE_LEVEL_LOW; - - switch (l1irq) { - case MPC52xx_IRQ_L1_CRIT: - pr_debug("%s: Critical. l2=%x\n", __func__, l2irq); - - BUG_ON(l2irq != 0); - - type = mpc52xx_irqx_gettype(l2irq); - good_irqchip = &mpc52xx_extirq_irqchip; - break; - - case MPC52xx_IRQ_L1_MAIN: - pr_debug("%s: Main IRQ[1-3] l2=%x\n", __func__, l2irq); - - if ((l2irq >= 1) && (l2irq <= 3)) { - type = mpc52xx_irqx_gettype(l2irq); - good_irqchip = &mpc52xx_extirq_irqchip; - } else { - good_irqchip = &mpc52xx_main_irqchip; - } - break; - - case MPC52xx_IRQ_L1_PERP: - pr_debug("%s: Peripherals. l2=%x\n", __func__, l2irq); - good_irqchip = &mpc52xx_periph_irqchip; - break; - - case MPC52xx_IRQ_L1_SDMA: - pr_debug("%s: SDMA. l2=%x\n", __func__, l2irq); - good_irqchip = &mpc52xx_sdma_irqchip; - break; - - default: - pr_debug("%s: Error, unknown L1 IRQ (0x%x)\n", __func__, l1irq); - printk(KERN_ERR "Unknow IRQ!\n"); - return -EINVAL; - } - - switch (type) { - case IRQ_TYPE_EDGE_FALLING: - case IRQ_TYPE_EDGE_RISING: - good_handle = handle_edge_irq; - break; - default: - good_handle = handle_level_irq; - } - - set_irq_chip_and_handler(virq, good_irqchip, good_handle); - - pr_debug("%s: virq=%x, hw=%x. type=%x\n", __func__, virq, - (int)irq, type); - - return 0; -} - -static struct irq_host_ops mpc52xx_irqhost_ops = { - .match = mpc52xx_irqhost_match, - .xlate = mpc52xx_irqhost_xlate, - .map = mpc52xx_irqhost_map, -}; - -/* - * init (public) -*/ - -void __init mpc52xx_init_irq(void) -{ - struct device_node *picnode = NULL; - int picnode_regsize; - u32 picnode_regoffset; - - struct device_node *sdmanode = NULL; - int sdmanode_regsize; - u32 sdmanode_regoffset; - - u64 size64; - int flags; - - u32 intr_ctrl; - - picnode = of_find_compatible_node(NULL, "interrupt-controller", - "mpc5200-pic"); - if (picnode == NULL) { - printk(KERN_ERR "MPC52xx PIC: " - "Unable to find the interrupt controller " - "in the OpenFirmware device tree\n"); - goto end; - } - - sdmanode = of_find_compatible_node(NULL, "dma-controller", - "mpc5200-bestcomm"); - if (sdmanode == NULL) { - printk(KERN_ERR "MPC52xx PIC" - "Unable to find the Bestcomm DMA controller device " - "in the OpenFirmware device tree\n"); - goto end; - } - - /* Retrieve PIC ressources */ - picnode_regoffset = (u32) of_get_address(picnode, 0, &size64, &flags); - if (picnode_regoffset == 0) { - printk(KERN_ERR "MPC52xx PIC" - "Unable to get the interrupt controller address\n"); - goto end; - } - - picnode_regoffset = - of_translate_address(picnode, (u32 *) picnode_regoffset); - picnode_regsize = (int)size64; - - /* Retrieve SDMA ressources */ - sdmanode_regoffset = (u32) of_get_address(sdmanode, 0, &size64, &flags); - if (sdmanode_regoffset == 0) { - printk(KERN_ERR "MPC52xx PIC: " - "Unable to get the Bestcomm DMA controller address\n"); - goto end; - } - - sdmanode_regoffset = - of_translate_address(sdmanode, (u32 *) sdmanode_regoffset); - sdmanode_regsize = (int)size64; - - /* Remap the necessary zones */ - intr = ioremap(picnode_regoffset, picnode_regsize); - if (intr == NULL) { - printk(KERN_ERR "MPC52xx PIC: " - "Unable to ioremap interrupt controller registers!\n"); - goto end; - } - - sdma = ioremap(sdmanode_regoffset, sdmanode_regsize); - if (sdma == NULL) { - iounmap(intr); - printk(KERN_ERR "MPC52xx PIC: " - "Unable to ioremap Bestcomm DMA registers!\n"); - goto end; - } - - printk(KERN_INFO "MPC52xx PIC: MPC52xx PIC Remapped at 0x%8.8x\n", - picnode_regoffset); - printk(KERN_INFO "MPC52xx PIC: MPC52xx SDMA Remapped at 0x%8.8x\n", - sdmanode_regoffset); - - /* Disable all interrupt sources. */ - out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */ - out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */ - out_be32(&intr->per_mask, 0x7ffffc00); /* 1 means disabled */ - out_be32(&intr->main_mask, 0x00010fff); /* 1 means disabled */ - intr_ctrl = in_be32(&intr->ctrl); - intr_ctrl &= 0x00ff0000; /* Keeps IRQ[0-3] config */ - intr_ctrl |= 0x0f000000 | /* clear IRQ 0-3 */ - 0x00001000 | /* MEE master external enable */ - 0x00000000 | /* 0 means disable IRQ 0-3 */ - 0x00000001; /* CEb route critical normally */ - out_be32(&intr->ctrl, intr_ctrl); - - /* Zero a bunch of the priority settings. */ - out_be32(&intr->per_pri1, 0); - out_be32(&intr->per_pri2, 0); - out_be32(&intr->per_pri3, 0); - out_be32(&intr->main_pri1, 0); - out_be32(&intr->main_pri2, 0); - - /* - * As last step, add an irq host to translate the real - * hw irq information provided by the ofw to linux virq - */ - - mpc52xx_irqhost = - irq_alloc_host(IRQ_HOST_MAP_LINEAR, MPC52xx_IRQ_HIGHTESTHWIRQ, - &mpc52xx_irqhost_ops, -1); - - if (mpc52xx_irqhost) { - mpc52xx_irqhost->host_data = picnode; - printk(KERN_INFO "MPC52xx PIC is up and running!\n"); - } else { - printk(KERN_ERR - "MPC52xx PIC: Unable to allocate the IRQ host\n"); - } - -end: - of_node_put(picnode); - of_node_put(sdmanode); -} - -/* - * get_irq (public) -*/ -unsigned int mpc52xx_get_irq(void) -{ - u32 status; - int irq = NO_IRQ_IGNORE; - - status = in_be32(&intr->enc_status); - if (status & 0x00000400) { /* critical */ - irq = (status >> 8) & 0x3; - if (irq == 2) /* high priority peripheral */ - goto peripheral; - irq |= (MPC52xx_IRQ_L1_CRIT << MPC52xx_IRQ_L1_OFFSET) & - MPC52xx_IRQ_L1_MASK; - } else if (status & 0x00200000) { /* main */ - irq = (status >> 16) & 0x1f; - if (irq == 4) /* low priority peripheral */ - goto peripheral; - irq |= (MPC52xx_IRQ_L1_MAIN << MPC52xx_IRQ_L1_OFFSET) & - MPC52xx_IRQ_L1_MASK; - } else if (status & 0x20000000) { /* peripheral */ - peripheral: - irq = (status >> 24) & 0x1f; - if (irq == 0) { /* bestcomm */ - status = in_be32(&sdma->IntPend); - irq = ffs(status) - 1; - irq |= (MPC52xx_IRQ_L1_SDMA << MPC52xx_IRQ_L1_OFFSET) & - MPC52xx_IRQ_L1_MASK; - } else - irq |= (MPC52xx_IRQ_L1_PERP << MPC52xx_IRQ_L1_OFFSET) & - MPC52xx_IRQ_L1_MASK; - } - - pr_debug("%s: irq=%x. virq=%d\n", __func__, irq, - irq_linear_revmap(mpc52xx_irqhost, irq)); - - return irq_linear_revmap(mpc52xx_irqhost, irq); -} - -- 1.4.3.rc2.g0503 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 3/9] [POWERPC] Put mpc52xx support file in platforms/52xx 2006-11-27 21:16 ` [PATCH 2/9] [POWERPC] Move MPC52xx PIC driver into arch/powerpc/platforms/52xx Grant Likely @ 2006-11-27 21:16 ` Grant Likely 2006-11-27 21:16 ` [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx Grant Likely 0 siblings, 1 reply; 15+ messages in thread From: Grant Likely @ 2006-11-27 21:16 UTC (permalink / raw) To: linuxppc-dev, Paul Mackerras; +Cc: Sylvain Munaut platforms/embedded6xx is probably going away, and 52xx boards need some extra support the 52xx interrupt controller and DMA engine anyway. It makes sense to group all the 52xx bits into a single path Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tNt.com> --- arch/powerpc/Kconfig | 4 ++++ arch/powerpc/platforms/embedded6xx/Kconfig | 12 ------------ 2 files changed, 4 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index c9949d9..2c6f8d1 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -408,6 +408,10 @@ config PPC_CHRP select PPC_UDBG_16550 default y +config PPC_MPC52xx + bool + default n + config PPC_EFIKA bool "bPlan Efika 5k2. MPC5200B based computer" depends on PPC_MULTIPLATFORM && PPC32 diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig index 234a861..910d50a 100644 --- a/arch/powerpc/platforms/embedded6xx/Kconfig +++ b/arch/powerpc/platforms/embedded6xx/Kconfig @@ -146,15 +146,6 @@ config PQ2FADS Select PQ2FADS if you wish to configure for a Freescale PQ2FADS board (-VR or -ZU). -config LITE5200 - bool "Freescale LITE5200 / (IceCube)" - select PPC_MPC52xx - help - Support for the LITE5200 dev board for the MPC5200 from Freescale. - This is for the LITE5200 version 2.0 board. Don't know if it changes - much but it's only been tested on this board version. I think this - board is also known as IceCube. - config EV64360 bool "Marvell-EV64360BP" help @@ -172,9 +163,6 @@ config TQM8xxL depends on 8xx && (TQM823L || TQM850L || FPS850L || TQM855L || TQM860L) default y -config PPC_MPC52xx - bool - config 8260 bool "CPM2 Support" if WILLOW depends on 6xx -- 1.4.3.rc2.g0503 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx 2006-11-27 21:16 ` [PATCH 3/9] [POWERPC] Put mpc52xx support file in platforms/52xx Grant Likely @ 2006-11-27 21:16 ` Grant Likely 2006-11-27 21:16 ` [PATCH 5/9] [POWERPC] Separate IRQ config / register set from main header Grant Likely 2006-11-27 21:56 ` [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx Arnd Bergmann 0 siblings, 2 replies; 15+ messages in thread From: Grant Likely @ 2006-11-27 21:16 UTC (permalink / raw) To: linuxppc-dev, Paul Mackerras; +Cc: Sylvain Munaut The Efika board isn't different enough from other 52xx based boards to justify a seperate platform. This patch merges it with the support code for all other 52xx based boards Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Sylvain Munaut <tnt@246tNt.com> --- arch/powerpc/platforms/52xx/Makefile | 2 + arch/powerpc/platforms/52xx/efika-pci.c | 119 +++++++++++++++++++++++ arch/powerpc/platforms/52xx/efika-setup.c | 149 +++++++++++++++++++++++++++++ arch/powerpc/platforms/52xx/efika.h | 19 ++++ arch/powerpc/platforms/Makefile | 1 - arch/powerpc/platforms/efika/Makefile | 1 - arch/powerpc/platforms/efika/efika.h | 19 ---- arch/powerpc/platforms/efika/pci.c | 119 ----------------------- arch/powerpc/platforms/efika/setup.c | 149 ----------------------------- 9 files changed, 289 insertions(+), 289 deletions(-) diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile index e1b02f1..1c9c122 100644 --- a/arch/powerpc/platforms/52xx/Makefile +++ b/arch/powerpc/platforms/52xx/Makefile @@ -4,3 +4,5 @@ # ifeq ($(CONFIG_PPC_MERGE),y) obj-y += mpc52xx_pic.o endif + +obj-$(CONFIG_PPC_EFIKA) += efika-setup.o efika-pci.o diff --git a/arch/powerpc/platforms/52xx/efika-pci.c b/arch/powerpc/platforms/52xx/efika-pci.c new file mode 100644 index 0000000..62e05b2 --- /dev/null +++ b/arch/powerpc/platforms/52xx/efika-pci.c @@ -0,0 +1,119 @@ + +#include <linux/kernel.h> +#include <linux/pci.h> +#include <linux/string.h> +#include <linux/init.h> + +#include <asm/io.h> +#include <asm/irq.h> +#include <asm/prom.h> +#include <asm/machdep.h> +#include <asm/sections.h> +#include <asm/pci-bridge.h> +#include <asm/rtas.h> + +#include "efika.h" + +#ifdef CONFIG_PCI +/* + * Access functions for PCI config space using RTAS calls. + */ +static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, + int len, u32 * val) +{ + struct pci_controller *hose = bus->sysdata; + unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) + | (((bus->number - hose->first_busno) & 0xff) << 16) + | (hose->index << 24); + int ret = -1; + int rval; + + rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len); + *val = ret; + return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; +} + +static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, + int offset, int len, u32 val) +{ + struct pci_controller *hose = bus->sysdata; + unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) + | (((bus->number - hose->first_busno) & 0xff) << 16) + | (hose->index << 24); + int rval; + + rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL, + addr, len, val); + return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; +} + +static struct pci_ops rtas_pci_ops = { + rtas_read_config, + rtas_write_config +}; + +void __init efika_pcisetup(void) +{ + const int *bus_range; + int len; + struct pci_controller *hose; + struct device_node *root; + struct device_node *pcictrl; + + root = of_find_node_by_path("/"); + if (root == NULL) { + printk(KERN_WARNING EFIKA_PLATFORM_NAME + ": Unable to find the root node\n"); + return; + } + + for (pcictrl = NULL;;) { + pcictrl = of_get_next_child(root, pcictrl); + if ((pcictrl == NULL) || (strcmp(pcictrl->name, "pci") == 0)) + break; + } + + of_node_put(root); + + if (pcictrl == NULL) { + printk(KERN_WARNING EFIKA_PLATFORM_NAME + ": Unable to find the PCI bridge node\n"); + return; + } + + bus_range = get_property(pcictrl, "bus-range", &len); + if (bus_range == NULL || len < 2 * sizeof(int)) { + printk(KERN_WARNING EFIKA_PLATFORM_NAME + ": Can't get bus-range for %s\n", pcictrl->full_name); + return; + } + + if (bus_range[1] == bus_range[0]) + printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI bus %d", + bus_range[0]); + else + printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI buses %d..%d", + bus_range[0], bus_range[1]); + printk(" controlled by %s\n", pcictrl->full_name); + printk("\n"); + + hose = pcibios_alloc_controller(); + if (!hose) { + printk(KERN_WARNING EFIKA_PLATFORM_NAME + ": Can't allocate PCI controller structure for %s\n", + pcictrl->full_name); + return; + } + + hose->arch_data = of_node_get(pcictrl); + hose->first_busno = bus_range[0]; + hose->last_busno = bus_range[1]; + hose->ops = &rtas_pci_ops; + + pci_process_bridge_OF_ranges(hose, pcictrl, 0); +} + +#else +void __init efika_pcisetup(void) +{} +#endif diff --git a/arch/powerpc/platforms/52xx/efika-setup.c b/arch/powerpc/platforms/52xx/efika-setup.c new file mode 100644 index 0000000..3bc1b5f --- /dev/null +++ b/arch/powerpc/platforms/52xx/efika-setup.c @@ -0,0 +1,149 @@ +/* + * + * Efika 5K2 platform setup + * Some code really inspired from the lite5200b platform. + * + * Copyright (C) 2006 bplan GmbH + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + * + */ + +#include <linux/errno.h> +#include <linux/kernel.h> +#include <linux/slab.h> +#include <linux/reboot.h> +#include <linux/init.h> +#include <linux/utsrelease.h> +#include <linux/seq_file.h> +#include <linux/root_dev.h> +#include <linux/initrd.h> +#include <linux/timer.h> +#include <linux/pci.h> + +#include <asm/pgtable.h> +#include <asm/prom.h> +#include <asm/time.h> +#include <asm/machdep.h> +#include <asm/rtas.h> +#include <asm/of_device.h> +#include <asm/mpc52xx.h> + +#include "efika.h" + +static void efika_show_cpuinfo(struct seq_file *m) +{ + struct device_node *root; + const char *revision = NULL; + const char *codegendescription = NULL; + const char *codegenvendor = NULL; + + root = of_find_node_by_path("/"); + if (root) { + revision = get_property(root, "revision", NULL); + codegendescription = + get_property(root, "CODEGEN,description", NULL); + codegenvendor = get_property(root, "CODEGEN,vendor", NULL); + + of_node_put(root); + } + + if (codegendescription) + seq_printf(m, "machine\t\t: %s\n", codegendescription); + else + seq_printf(m, "machine\t\t: Efika\n"); + + if (revision) + seq_printf(m, "revision\t: %s\n", revision); + + if (codegenvendor) + seq_printf(m, "vendor\t\t: %s\n", codegenvendor); + + of_node_put(root); +} + +static void __init efika_setup_arch(void) +{ + rtas_initialize(); + +#ifdef CONFIG_BLK_DEV_INITRD + initrd_below_start_ok = 1; + + if (initrd_start) + ROOT_DEV = Root_RAM0; + else +#endif + ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */ + + efika_pcisetup(); + + if (ppc_md.progress) + ppc_md.progress("Linux/PPC " UTS_RELEASE " runnung on Efika ;-)\n", 0x0); +} + +static void __init efika_init(void) +{ + struct device_node *np; + struct device_node *cnp = NULL; + const u32 *base; + + /* Find every child of the SOC node and add it to of_platform */ + np = of_find_node_by_name(NULL, "builtin"); + if (np) { + char name[BUS_ID_SIZE]; + while ((cnp = of_get_next_child(np, cnp))) { + strcpy(name, cnp->name); + + base = get_property(cnp, "reg", NULL); + if (base == NULL) + continue; + + snprintf(name+strlen(name), BUS_ID_SIZE, "@%x", *base); + of_platform_device_create(cnp, name, NULL); + + printk(KERN_INFO EFIKA_PLATFORM_NAME" : Added %s (type '%s' at '%s') to the known devices\n", name, cnp->type, cnp->full_name); + } + } + + if (ppc_md.progress) + ppc_md.progress(" Have fun with your Efika! ", 0x7777); +} + +static int __init efika_probe(void) +{ + char *model = of_get_flat_dt_prop(of_get_flat_dt_root(), + "model", NULL); + + if (model == NULL) + return 0; + if (strcmp(model, "EFIKA5K2")) + return 0; + + ISA_DMA_THRESHOLD = ~0L; + DMA_MODE_READ = 0x44; + DMA_MODE_WRITE = 0x48; + + return 1; +} + +define_machine(efika) +{ + .name = EFIKA_PLATFORM_NAME, + .probe = efika_probe, + .setup_arch = efika_setup_arch, + .init = efika_init, + .show_cpuinfo = efika_show_cpuinfo, + .init_IRQ = mpc52xx_init_irq, + .get_irq = mpc52xx_get_irq, + .restart = rtas_restart, + .power_off = rtas_power_off, + .halt = rtas_halt, + .set_rtc_time = rtas_set_rtc_time, + .get_rtc_time = rtas_get_rtc_time, + .progress = rtas_progress, + .get_boot_time = rtas_get_boot_time, + .calibrate_decr = generic_calibrate_decr, + .phys_mem_access_prot = pci_phys_mem_access_prot, +}; diff --git a/arch/powerpc/platforms/52xx/efika.h b/arch/powerpc/platforms/52xx/efika.h new file mode 100644 index 0000000..2f060fd --- /dev/null +++ b/arch/powerpc/platforms/52xx/efika.h @@ -0,0 +1,19 @@ +/* + * Efika 5K2 platform setup - Header file + * + * Copyright (C) 2006 bplan GmbH + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + * + */ + +#ifndef __ARCH_POWERPC_EFIKA__ +#define __ARCH_POWERPC_EFIKA__ + +#define EFIKA_PLATFORM_NAME "Efika" + +extern void __init efika_pcisetup(void); + +#endif diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile index 562f9da..6ec4be6 100644 --- a/arch/powerpc/platforms/Makefile +++ b/arch/powerpc/platforms/Makefile @@ -5,7 +5,6 @@ ifeq ($(CONFIG_PPC64),y) obj-$(CONFIG_PPC_PMAC) += powermac/ endif endif -obj-$(CONFIG_PPC_EFIKA) += efika/ obj-$(CONFIG_PPC_CHRP) += chrp/ obj-$(CONFIG_4xx) += 4xx/ obj-$(CONFIG_PPC_MPC52xx) += 52xx/ diff --git a/arch/powerpc/platforms/efika/Makefile b/arch/powerpc/platforms/efika/Makefile deleted file mode 100644 index 17b2a78..0000000 --- a/arch/powerpc/platforms/efika/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-y += setup.o mpc52xx.o pci.o diff --git a/arch/powerpc/platforms/efika/efika.h b/arch/powerpc/platforms/efika/efika.h deleted file mode 100644 index 2f060fd..0000000 --- a/arch/powerpc/platforms/efika/efika.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Efika 5K2 platform setup - Header file - * - * Copyright (C) 2006 bplan GmbH - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - * - */ - -#ifndef __ARCH_POWERPC_EFIKA__ -#define __ARCH_POWERPC_EFIKA__ - -#define EFIKA_PLATFORM_NAME "Efika" - -extern void __init efika_pcisetup(void); - -#endif diff --git a/arch/powerpc/platforms/efika/pci.c b/arch/powerpc/platforms/efika/pci.c deleted file mode 100644 index 62e05b2..0000000 --- a/arch/powerpc/platforms/efika/pci.c +++ /dev/null @@ -1,119 +0,0 @@ - -#include <linux/kernel.h> -#include <linux/pci.h> -#include <linux/string.h> -#include <linux/init.h> - -#include <asm/io.h> -#include <asm/irq.h> -#include <asm/prom.h> -#include <asm/machdep.h> -#include <asm/sections.h> -#include <asm/pci-bridge.h> -#include <asm/rtas.h> - -#include "efika.h" - -#ifdef CONFIG_PCI -/* - * Access functions for PCI config space using RTAS calls. - */ -static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, - int len, u32 * val) -{ - struct pci_controller *hose = bus->sysdata; - unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) - | (((bus->number - hose->first_busno) & 0xff) << 16) - | (hose->index << 24); - int ret = -1; - int rval; - - rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len); - *val = ret; - return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; -} - -static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, - int offset, int len, u32 val) -{ - struct pci_controller *hose = bus->sysdata; - unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) - | (((bus->number - hose->first_busno) & 0xff) << 16) - | (hose->index << 24); - int rval; - - rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL, - addr, len, val); - return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops rtas_pci_ops = { - rtas_read_config, - rtas_write_config -}; - -void __init efika_pcisetup(void) -{ - const int *bus_range; - int len; - struct pci_controller *hose; - struct device_node *root; - struct device_node *pcictrl; - - root = of_find_node_by_path("/"); - if (root == NULL) { - printk(KERN_WARNING EFIKA_PLATFORM_NAME - ": Unable to find the root node\n"); - return; - } - - for (pcictrl = NULL;;) { - pcictrl = of_get_next_child(root, pcictrl); - if ((pcictrl == NULL) || (strcmp(pcictrl->name, "pci") == 0)) - break; - } - - of_node_put(root); - - if (pcictrl == NULL) { - printk(KERN_WARNING EFIKA_PLATFORM_NAME - ": Unable to find the PCI bridge node\n"); - return; - } - - bus_range = get_property(pcictrl, "bus-range", &len); - if (bus_range == NULL || len < 2 * sizeof(int)) { - printk(KERN_WARNING EFIKA_PLATFORM_NAME - ": Can't get bus-range for %s\n", pcictrl->full_name); - return; - } - - if (bus_range[1] == bus_range[0]) - printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI bus %d", - bus_range[0]); - else - printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI buses %d..%d", - bus_range[0], bus_range[1]); - printk(" controlled by %s\n", pcictrl->full_name); - printk("\n"); - - hose = pcibios_alloc_controller(); - if (!hose) { - printk(KERN_WARNING EFIKA_PLATFORM_NAME - ": Can't allocate PCI controller structure for %s\n", - pcictrl->full_name); - return; - } - - hose->arch_data = of_node_get(pcictrl); - hose->first_busno = bus_range[0]; - hose->last_busno = bus_range[1]; - hose->ops = &rtas_pci_ops; - - pci_process_bridge_OF_ranges(hose, pcictrl, 0); -} - -#else -void __init efika_pcisetup(void) -{} -#endif diff --git a/arch/powerpc/platforms/efika/setup.c b/arch/powerpc/platforms/efika/setup.c deleted file mode 100644 index 3bc1b5f..0000000 --- a/arch/powerpc/platforms/efika/setup.c +++ /dev/null @@ -1,149 +0,0 @@ -/* - * - * Efika 5K2 platform setup - * Some code really inspired from the lite5200b platform. - * - * Copyright (C) 2006 bplan GmbH - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - * - */ - -#include <linux/errno.h> -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/reboot.h> -#include <linux/init.h> -#include <linux/utsrelease.h> -#include <linux/seq_file.h> -#include <linux/root_dev.h> -#include <linux/initrd.h> -#include <linux/timer.h> -#include <linux/pci.h> - -#include <asm/pgtable.h> -#include <asm/prom.h> -#include <asm/time.h> -#include <asm/machdep.h> -#include <asm/rtas.h> -#include <asm/of_device.h> -#include <asm/mpc52xx.h> - -#include "efika.h" - -static void efika_show_cpuinfo(struct seq_file *m) -{ - struct device_node *root; - const char *revision = NULL; - const char *codegendescription = NULL; - const char *codegenvendor = NULL; - - root = of_find_node_by_path("/"); - if (root) { - revision = get_property(root, "revision", NULL); - codegendescription = - get_property(root, "CODEGEN,description", NULL); - codegenvendor = get_property(root, "CODEGEN,vendor", NULL); - - of_node_put(root); - } - - if (codegendescription) - seq_printf(m, "machine\t\t: %s\n", codegendescription); - else - seq_printf(m, "machine\t\t: Efika\n"); - - if (revision) - seq_printf(m, "revision\t: %s\n", revision); - - if (codegenvendor) - seq_printf(m, "vendor\t\t: %s\n", codegenvendor); - - of_node_put(root); -} - -static void __init efika_setup_arch(void) -{ - rtas_initialize(); - -#ifdef CONFIG_BLK_DEV_INITRD - initrd_below_start_ok = 1; - - if (initrd_start) - ROOT_DEV = Root_RAM0; - else -#endif - ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */ - - efika_pcisetup(); - - if (ppc_md.progress) - ppc_md.progress("Linux/PPC " UTS_RELEASE " runnung on Efika ;-)\n", 0x0); -} - -static void __init efika_init(void) -{ - struct device_node *np; - struct device_node *cnp = NULL; - const u32 *base; - - /* Find every child of the SOC node and add it to of_platform */ - np = of_find_node_by_name(NULL, "builtin"); - if (np) { - char name[BUS_ID_SIZE]; - while ((cnp = of_get_next_child(np, cnp))) { - strcpy(name, cnp->name); - - base = get_property(cnp, "reg", NULL); - if (base == NULL) - continue; - - snprintf(name+strlen(name), BUS_ID_SIZE, "@%x", *base); - of_platform_device_create(cnp, name, NULL); - - printk(KERN_INFO EFIKA_PLATFORM_NAME" : Added %s (type '%s' at '%s') to the known devices\n", name, cnp->type, cnp->full_name); - } - } - - if (ppc_md.progress) - ppc_md.progress(" Have fun with your Efika! ", 0x7777); -} - -static int __init efika_probe(void) -{ - char *model = of_get_flat_dt_prop(of_get_flat_dt_root(), - "model", NULL); - - if (model == NULL) - return 0; - if (strcmp(model, "EFIKA5K2")) - return 0; - - ISA_DMA_THRESHOLD = ~0L; - DMA_MODE_READ = 0x44; - DMA_MODE_WRITE = 0x48; - - return 1; -} - -define_machine(efika) -{ - .name = EFIKA_PLATFORM_NAME, - .probe = efika_probe, - .setup_arch = efika_setup_arch, - .init = efika_init, - .show_cpuinfo = efika_show_cpuinfo, - .init_IRQ = mpc52xx_init_irq, - .get_irq = mpc52xx_get_irq, - .restart = rtas_restart, - .power_off = rtas_power_off, - .halt = rtas_halt, - .set_rtc_time = rtas_set_rtc_time, - .get_rtc_time = rtas_get_rtc_time, - .progress = rtas_progress, - .get_boot_time = rtas_get_boot_time, - .calibrate_decr = generic_calibrate_decr, - .phys_mem_access_prot = pci_phys_mem_access_prot, -}; -- 1.4.3.rc2.g0503 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 5/9] [POWERPC] Separate IRQ config / register set from main header 2006-11-27 21:16 ` [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx Grant Likely @ 2006-11-27 21:16 ` Grant Likely 2006-11-27 21:16 ` [PATCH 6/9] [POWERPC] Add common routines for 52xx support in arch/powerpc Grant Likely 2006-11-27 21:56 ` [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx Arnd Bergmann 1 sibling, 1 reply; 15+ messages in thread From: Grant Likely @ 2006-11-27 21:16 UTC (permalink / raw) To: linuxppc-dev, Paul Mackerras; +Cc: Sylvain Munaut From: Sylvain Munaut <tnt@246tNt.com> There is no need to expose theses settings outside the scope of the interrupt controller code itself. Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> --- arch/powerpc/platforms/52xx/mpc52xx_pic.c | 1 + arch/powerpc/platforms/52xx/mpc52xx_pic.h | 53 +++++++++++++++++++++++++++++ include/asm-powerpc/mpc52xx.h | 37 -------------------- 3 files changed, 54 insertions(+), 37 deletions(-) diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c index 6df51f0..504154f 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c @@ -33,6 +33,7 @@ #include <asm/system.h> #include <asm/irq.h> #include <asm/prom.h> #include <asm/mpc52xx.h> +#include "mpc52xx_pic.h" /* * diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.h b/arch/powerpc/platforms/52xx/mpc52xx_pic.h new file mode 100644 index 0000000..1a26bcd --- /dev/null +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.h @@ -0,0 +1,53 @@ +/* + * Header file for Freescale MPC52xx Interrupt controller + * + * Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com> + * Copyright (C) 2003 MontaVista, Software, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#ifndef __POWERPC_SYSDEV_MPC52xx_PIC_H__ +#define __POWERPC_SYSDEV_MPC52xx_PIC_H__ + +#include <asm/types.h> + + +/* HW IRQ mapping */ +#define MPC52xx_IRQ_L1_CRIT (0) +#define MPC52xx_IRQ_L1_MAIN (1) +#define MPC52xx_IRQ_L1_PERP (2) +#define MPC52xx_IRQ_L1_SDMA (3) + +#define MPC52xx_IRQ_L1_OFFSET (6) +#define MPC52xx_IRQ_L1_MASK (0x00c0) + +#define MPC52xx_IRQ_L2_OFFSET (0) +#define MPC52xx_IRQ_L2_MASK (0x003f) + +#define MPC52xx_IRQ_HIGHTESTHWIRQ (0xd0) + + +/* Interrupt controller Register set */ +struct mpc52xx_intr { + u32 per_mask; /* INTR + 0x00 */ + u32 per_pri1; /* INTR + 0x04 */ + u32 per_pri2; /* INTR + 0x08 */ + u32 per_pri3; /* INTR + 0x0c */ + u32 ctrl; /* INTR + 0x10 */ + u32 main_mask; /* INTR + 0x14 */ + u32 main_pri1; /* INTR + 0x18 */ + u32 main_pri2; /* INTR + 0x1c */ + u32 reserved1; /* INTR + 0x20 */ + u32 enc_status; /* INTR + 0x24 */ + u32 crit_status; /* INTR + 0x28 */ + u32 main_status; /* INTR + 0x2c */ + u32 per_status; /* INTR + 0x30 */ + u32 reserved2; /* INTR + 0x34 */ + u32 per_error; /* INTR + 0x38 */ +}; + +#endif /* __POWERPC_SYSDEV_MPC52xx_PIC_H__ */ + diff --git a/include/asm-powerpc/mpc52xx.h b/include/asm-powerpc/mpc52xx.h index e9aa622..fff752c 100644 --- a/include/asm-powerpc/mpc52xx.h +++ b/include/asm-powerpc/mpc52xx.h @@ -20,48 +20,11 @@ #endif /* __ASSEMBLY__ */ /* ======================================================================== */ -/* HW IRQ mapping */ -/* ======================================================================== */ - -#define MPC52xx_IRQ_L1_CRIT (0) -#define MPC52xx_IRQ_L1_MAIN (1) -#define MPC52xx_IRQ_L1_PERP (2) -#define MPC52xx_IRQ_L1_SDMA (3) - -#define MPC52xx_IRQ_L1_OFFSET (6) -#define MPC52xx_IRQ_L1_MASK (0xc0) - -#define MPC52xx_IRQ_L2_OFFSET (0) -#define MPC52xx_IRQ_L2_MASK (0x3f) - -#define MPC52xx_IRQ_HIGHTESTHWIRQ (0xd0) - - -/* ======================================================================== */ /* Structures mapping of some unit register set */ /* ======================================================================== */ #ifndef __ASSEMBLY__ -/* Interrupt controller Register set */ -struct mpc52xx_intr { - u32 per_mask; /* INTR + 0x00 */ - u32 per_pri1; /* INTR + 0x04 */ - u32 per_pri2; /* INTR + 0x08 */ - u32 per_pri3; /* INTR + 0x0c */ - u32 ctrl; /* INTR + 0x10 */ - u32 main_mask; /* INTR + 0x14 */ - u32 main_pri1; /* INTR + 0x18 */ - u32 main_pri2; /* INTR + 0x1c */ - u32 reserved1; /* INTR + 0x20 */ - u32 enc_status; /* INTR + 0x24 */ - u32 crit_status; /* INTR + 0x28 */ - u32 main_status; /* INTR + 0x2c */ - u32 per_status; /* INTR + 0x30 */ - u32 reserved2; /* INTR + 0x34 */ - u32 per_error; /* INTR + 0x38 */ -}; - /* Memory Mapping Control */ struct mpc52xx_mmap_ctl { u32 mbar; /* MMAP_CTRL + 0x00 */ -- 1.4.3.rc2.g0503 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 6/9] [POWERPC] Add common routines for 52xx support in arch/powerpc 2006-11-27 21:16 ` [PATCH 5/9] [POWERPC] Separate IRQ config / register set from main header Grant Likely @ 2006-11-27 21:16 ` Grant Likely 2006-11-27 21:16 ` [PATCH 7/9] [POWERPC] Add lite5200 board support to arch/powerpc Grant Likely 0 siblings, 1 reply; 15+ messages in thread From: Grant Likely @ 2006-11-27 21:16 UTC (permalink / raw) To: linuxppc-dev, Paul Mackerras; +Cc: Sylvain Munaut Adds utility routines used by 52xx device drivers and board support code. Main functionality is to add device nodes to the of_platform_bus, retrieve the IPB bus frequency, and find+ioremap device registers Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tNt.com> --- arch/powerpc/platforms/52xx/Makefile | 2 +- arch/powerpc/platforms/52xx/mpc52xx_common.c | 124 ++++++++++++++++++++++++++ arch/powerpc/platforms/52xx/mpc52xx_pic.c | 110 +++++------------------ include/asm-powerpc/mpc52xx.h | 4 + 4 files changed, 151 insertions(+), 89 deletions(-) diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile index 1c9c122..b8f27a8 100644 --- a/arch/powerpc/platforms/52xx/Makefile +++ b/arch/powerpc/platforms/52xx/Makefile @@ -2,7 +2,7 @@ # # Makefile for 52xx based boards # ifeq ($(CONFIG_PPC_MERGE),y) -obj-y += mpc52xx_pic.o +obj-y += mpc52xx_pic.o mpc52xx_common.o endif obj-$(CONFIG_PPC_EFIKA) += efika-setup.o efika-pci.o diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c new file mode 100644 index 0000000..05b2144 --- /dev/null +++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c @@ -0,0 +1,124 @@ +/* + * + * Utility functions for the Freescale MPC52xx. + * + * Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com> + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + * + */ + +#undef DEBUG + +#include <linux/kernel.h> + +#include <asm/io.h> +#include <asm/prom.h> +#include <asm/of_platform.h> +#include <asm/mpc52xx.h> + + +void __iomem * +mpc52xx_find_and_map(const char *compatible) +{ + struct device_node *ofn; + const u32 *regaddr_p; + u64 regaddr64, size64; + + ofn = of_find_compatible_node(NULL, NULL, compatible); + if (!ofn) + return NULL; + + regaddr_p = of_get_address(ofn, 0, &size64, NULL); + if (!regaddr_p) { + of_node_put(ofn); + return NULL; + } + + regaddr64 = of_translate_address(ofn, regaddr_p); + + of_node_put(ofn); + + return ioremap((u32)regaddr64, (u32)size64); +} + + +/** + * mpc52xx_find_ipb_freq - Find the IPB bus frequency for a device + * @node: device node + * + * Returns IPB bus frequency, or 0 if the bus frequency cannot be found. + */ +unsigned int +mpc52xx_find_ipb_freq(struct device_node *node) +{ + struct device_node *np; + const unsigned int *p_ipb_freq = NULL; + + of_node_get(node); + while (node) { + p_ipb_freq = get_property(node, "bus-frequency", NULL); + if (p_ipb_freq) + break; + + np = of_get_parent(node); + of_node_put(node); + node = np; + } + if (node) + of_node_put(node); + + return p_ipb_freq ? *p_ipb_freq : 0; +} + + +void __init +mpc52xx_setup_cpu(void) +{ + struct mpc52xx_cdm __iomem *cdm; + struct mpc52xx_xlb __iomem *xlb; + + /* Map zones */ + cdm = mpc52xx_find_and_map("mpc52xx-cdm"); + xlb = mpc52xx_find_and_map("mpc52xx-xlb"); + + if (!cdm || !xlb) { + printk(KERN_ERR __FILE__ ": " + "Error while mapping CDM/XLB during mpc52xx_setup_cpu. " + "Expect some abnormal behavior\n"); + goto unmap_regs; + } + + /* Use internal 48 Mhz */ + out_8(&cdm->ext_48mhz_en, 0x00); + out_8(&cdm->fd_enable, 0x01); + if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */ + out_be16(&cdm->fd_counters, 0x0001); + else + out_be16(&cdm->fd_counters, 0x5555); + + /* Configure the XLB Arbiter priorities */ + out_be32(&xlb->master_pri_enable, 0xff); + out_be32(&xlb->master_priority, 0x11111111); + + /* Disable XLB pipelining */ + /* (cfr errate 292. We could do this only just before ATA PIO + transaction and re-enable it afterwards ...) */ + out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); + + /* Unmap zones */ +unmap_regs: + if (cdm) iounmap(cdm); + if (xlb) iounmap(xlb); +} + +static int __init +mpc52xx_declare_of_platform_devices(void) +{ + /* Find every child of the SOC node and add it to of_platform */ + return of_platform_bus_probe(NULL, NULL, NULL); +} + +device_initcall(mpc52xx_declare_of_platform_devices); diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c index 504154f..cd91a6c 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c @@ -54,12 +54,12 @@ static unsigned char mpc52xx_map_senses[ * */ -static inline void io_be_setbit(u32 __iomem * addr, int bitno) +static inline void io_be_setbit(u32 __iomem *addr, int bitno) { out_be32(addr, in_be32(addr) | (1 << bitno)); } -static inline void io_be_clrbit(u32 __iomem * addr, int bitno) +static inline void io_be_clrbit(u32 __iomem *addr, int bitno) { out_be32(addr, in_be32(addr) & ~(1 << bitno)); } @@ -104,7 +104,7 @@ static void mpc52xx_extirq_ack(unsigned pr_debug("%s: irq=%x. l2=%d\n", __func__, irq, l2irq); - io_be_setbit(&intr->ctrl, 27 - l2irq); + io_be_setbit(&intr->ctrl, 27-l2irq); } static struct irq_chip mpc52xx_extirq_irqchip = { @@ -379,81 +379,21 @@ static struct irq_host_ops mpc52xx_irqho void __init mpc52xx_init_irq(void) { - struct device_node *picnode = NULL; - int picnode_regsize; - u32 picnode_regoffset; - - struct device_node *sdmanode = NULL; - int sdmanode_regsize; - u32 sdmanode_regoffset; - - u64 size64; - int flags; - u32 intr_ctrl; - - picnode = of_find_compatible_node(NULL, "interrupt-controller", - "mpc5200-pic"); - if (picnode == NULL) { - printk(KERN_ERR "MPC52xx PIC: " - "Unable to find the interrupt controller " - "in the OpenFirmware device tree\n"); - goto end; - } - - sdmanode = of_find_compatible_node(NULL, "dma-controller", - "mpc5200-bestcomm"); - if (sdmanode == NULL) { - printk(KERN_ERR "MPC52xx PIC" - "Unable to find the Bestcomm DMA controller device " - "in the OpenFirmware device tree\n"); - goto end; - } - - /* Retrieve PIC ressources */ - picnode_regoffset = (u32) of_get_address(picnode, 0, &size64, &flags); - if (picnode_regoffset == 0) { - printk(KERN_ERR "MPC52xx PIC" - "Unable to get the interrupt controller address\n"); - goto end; - } - - picnode_regoffset = - of_translate_address(picnode, (u32 *) picnode_regoffset); - picnode_regsize = (int)size64; - - /* Retrieve SDMA ressources */ - sdmanode_regoffset = (u32) of_get_address(sdmanode, 0, &size64, &flags); - if (sdmanode_regoffset == 0) { - printk(KERN_ERR "MPC52xx PIC: " - "Unable to get the Bestcomm DMA controller address\n"); - goto end; - } - - sdmanode_regoffset = - of_translate_address(sdmanode, (u32 *) sdmanode_regoffset); - sdmanode_regsize = (int)size64; + struct device_node *picnode; /* Remap the necessary zones */ - intr = ioremap(picnode_regoffset, picnode_regsize); - if (intr == NULL) { - printk(KERN_ERR "MPC52xx PIC: " - "Unable to ioremap interrupt controller registers!\n"); - goto end; - } + picnode = of_find_compatible_node(NULL, NULL, "mpc52xx-pic"); - sdma = ioremap(sdmanode_regoffset, sdmanode_regsize); - if (sdma == NULL) { - iounmap(intr); - printk(KERN_ERR "MPC52xx PIC: " - "Unable to ioremap Bestcomm DMA registers!\n"); - goto end; - } + intr = mpc52xx_find_and_map("mpc52xx-pic"); + if (!intr) + panic(__FILE__ ": find_and_map failed on 'mpc52xx-pic'. " + "Check node !"); - printk(KERN_INFO "MPC52xx PIC: MPC52xx PIC Remapped at 0x%8.8x\n", - picnode_regoffset); - printk(KERN_INFO "MPC52xx PIC: MPC52xx SDMA Remapped at 0x%8.8x\n", - sdmanode_regoffset); + sdma = mpc52xx_find_and_map("mpc52xx-bestcomm"); + if (!sdma) + panic(__FILE__ ": find_and_map failed on 'mpc52xx-bestcomm'. " + "Check node !"); /* Disable all interrupt sources. */ out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */ @@ -480,21 +420,15 @@ void __init mpc52xx_init_irq(void) * hw irq information provided by the ofw to linux virq */ - mpc52xx_irqhost = - irq_alloc_host(IRQ_HOST_MAP_LINEAR, MPC52xx_IRQ_HIGHTESTHWIRQ, - &mpc52xx_irqhost_ops, -1); + mpc52xx_irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, + MPC52xx_IRQ_HIGHTESTHWIRQ, + &mpc52xx_irqhost_ops, -1); - if (mpc52xx_irqhost) { - mpc52xx_irqhost->host_data = picnode; - printk(KERN_INFO "MPC52xx PIC is up and running!\n"); - } else { - printk(KERN_ERR - "MPC52xx PIC: Unable to allocate the IRQ host\n"); - } + if (!mpc52xx_irqhost) + panic(__FILE__ ": Cannot allocate the IRQ host\n"); -end: - of_node_put(picnode); - of_node_put(sdmanode); + mpc52xx_irqhost->host_data = picnode; + printk(KERN_INFO "MPC52xx PIC is up and running!\n"); } /* @@ -526,9 +460,10 @@ unsigned int mpc52xx_get_irq(void) irq = ffs(status) - 1; irq |= (MPC52xx_IRQ_L1_SDMA << MPC52xx_IRQ_L1_OFFSET) & MPC52xx_IRQ_L1_MASK; - } else + } else { irq |= (MPC52xx_IRQ_L1_PERP << MPC52xx_IRQ_L1_OFFSET) & MPC52xx_IRQ_L1_MASK; + } } pr_debug("%s: irq=%x. virq=%d\n", __func__, irq, @@ -536,4 +471,3 @@ unsigned int mpc52xx_get_irq(void) return irq_linear_revmap(mpc52xx_irqhost, irq); } - diff --git a/include/asm-powerpc/mpc52xx.h b/include/asm-powerpc/mpc52xx.h index fff752c..4a28a85 100644 --- a/include/asm-powerpc/mpc52xx.h +++ b/include/asm-powerpc/mpc52xx.h @@ -241,6 +241,10 @@ #endif /* __ASSEMBLY__ */ #ifndef __ASSEMBLY__ +extern void __iomem * mpc52xx_find_and_map(const char *); +extern unsigned int mpc52xx_find_ipb_freq(struct device_node *node); +extern void mpc52xx_setup_cpu(void); + extern void mpc52xx_init_irq(void); extern unsigned int mpc52xx_get_irq(void); -- 1.4.3.rc2.g0503 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 7/9] [POWERPC] Add lite5200 board support to arch/powerpc 2006-11-27 21:16 ` [PATCH 6/9] [POWERPC] Add common routines for 52xx support in arch/powerpc Grant Likely @ 2006-11-27 21:16 ` Grant Likely 2006-11-27 21:16 ` [PATCH 8/9] [POWERPC] Add device trees for lite5200 and lite5200b eval boards Grant Likely 0 siblings, 1 reply; 15+ messages in thread From: Grant Likely @ 2006-11-27 21:16 UTC (permalink / raw) To: linuxppc-dev, Paul Mackerras; +Cc: Sylvain Munaut Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Sylvain Munaut <tnt@246tNt.com> --- arch/powerpc/Kconfig | 6 + arch/powerpc/platforms/52xx/Makefile | 3 +- arch/powerpc/platforms/52xx/lite5200.c | 162 ++++++++++++++++++++++++++++++++ 3 files changed, 170 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 2c6f8d1..90efb0a 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -420,6 +420,12 @@ config PPC_EFIKA select PPC_MPC52xx default y +config PPC_LITE5200 + bool "Freescale Lite5200 Eval Board" + depends on PPC_MULTIPLATFORM && PPC32 + select PPC_MPC52xx + default n + config PPC_PMAC bool "Apple PowerMac based machines" depends on PPC_MULTIPLATFORM diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile index b8f27a8..a46184a 100644 --- a/arch/powerpc/platforms/52xx/Makefile +++ b/arch/powerpc/platforms/52xx/Makefile @@ -5,4 +5,5 @@ ifeq ($(CONFIG_PPC_MERGE),y) obj-y += mpc52xx_pic.o mpc52xx_common.o endif -obj-$(CONFIG_PPC_EFIKA) += efika-setup.o efika-pci.o +obj-$(CONFIG_PPC_EFIKA) += efika-setup.o efika-pci.o +obj-$(CONFIG_PPC_LITE5200) += lite5200.o diff --git a/arch/powerpc/platforms/52xx/lite5200.c b/arch/powerpc/platforms/52xx/lite5200.c new file mode 100644 index 0000000..fddd1bc --- /dev/null +++ b/arch/powerpc/platforms/52xx/lite5200.c @@ -0,0 +1,162 @@ +/* + * Freescale Lite5200 board support + * + * Written by: Grant Likely <grant.likely@secretlab.ca> + * + * Copyright (C) Secret Lab Technologies Ltd. 2006. All rights reserved. + * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved. + * + * Description: + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#undef DEBUG + +#include <linux/stddef.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/errno.h> +#include <linux/reboot.h> +#include <linux/pci.h> +#include <linux/kdev_t.h> +#include <linux/major.h> +#include <linux/console.h> +#include <linux/delay.h> +#include <linux/seq_file.h> +#include <linux/root_dev.h> +#include <linux/initrd.h> + +#include <asm/system.h> +#include <asm/atomic.h> +#include <asm/time.h> +#include <asm/io.h> +#include <asm/machdep.h> +#include <asm/ipic.h> +#include <asm/bootinfo.h> +#include <asm/irq.h> +#include <asm/prom.h> +#include <asm/udbg.h> +#include <sysdev/fsl_soc.h> +#include <asm/qe.h> +#include <asm/qe_ic.h> +#include <asm/of_platform.h> + +#include <asm/mpc52xx.h> + +/* ************************************************************************ + * + * Setup the architecture + * + */ + +static void __init +lite52xx_setup_cpu(void) +{ + struct mpc52xx_gpio __iomem *gpio; + u32 port_config; + + /* Map zones */ + gpio = mpc52xx_find_and_map("mpc52xx-gpio"); + if (!gpio) { + printk(KERN_ERR __FILE__ ": " + "Error while mapping GPIO register for port config. " + "Expect some abnormal behavior\n"); + goto error; + } + + /* Set port config */ + port_config = in_be32(&gpio->port_config); + + port_config &= ~0x00800000; /* 48Mhz internal, pin is GPIO */ + + port_config &= ~0x00007000; /* USB port : Differential mode */ + port_config |= 0x00001000; /* USB 1 only */ + + port_config &= ~0x03000000; /* ATA CS is on csb_4/5 */ + port_config |= 0x01000000; + + pr_debug("port_config: old:%x new:%x\n", + in_be32(&gpio->port_config), port_config); + out_be32(&gpio->port_config, port_config); + + /* Unmap zone */ +error: + iounmap(gpio); +} + +static void __init lite52xx_setup_arch(void) +{ + struct device_node *np; + + if (ppc_md.progress) + ppc_md.progress("lite52xx_setup_arch()", 0); + + np = of_find_node_by_type(NULL, "cpu"); + if (np) { + unsigned int *fp = + (int *)get_property(np, "clock-frequency", NULL); + if (fp != 0) + loops_per_jiffy = *fp / HZ; + else + loops_per_jiffy = 50000000 / HZ; + of_node_put(np); + } + + /* CPU & Port mux setup */ + mpc52xx_setup_cpu(); /* Generic */ + lite52xx_setup_cpu(); /* Platorm specific */ + +#ifdef CONFIG_BLK_DEV_INITRD + if (initrd_start) + ROOT_DEV = Root_RAM0; + else +#endif +#ifdef CONFIG_ROOT_NFS + ROOT_DEV = Root_NFS; +#else + ROOT_DEV = Root_HDA1; +#endif + +} + +void lite52xx_show_cpuinfo(struct seq_file *m) +{ + struct device_node* np = of_find_all_nodes(NULL); + const char *model = NULL; + + if (np) + model = get_property(np, "model", NULL); + + seq_printf(m, "vendor\t\t: Freescale Semiconductor\n"); + seq_printf(m, "machine\t\t: %s\n", model ? model : "unknown"); + + of_node_put(np); +} + +/* + * Called very early, MMU is off, device-tree isn't unflattened + */ +static int __init lite52xx_probe(void) +{ + unsigned long node = of_get_flat_dt_root(); + const char *model = of_get_flat_dt_prop(node, "model", NULL); + + if (!of_flat_dt_is_compatible(node, "lite52xx")) + return 0; + pr_debug("%s board w/ mpc52xx found\n", model ? model : "unknown"); + + return 1; +} + +define_machine(lite52xx) { + .name = "lite52xx", + .probe = lite52xx_probe, + .setup_arch = lite52xx_setup_arch, + .init_IRQ = mpc52xx_init_irq, + .get_irq = mpc52xx_get_irq, + .show_cpuinfo = lite52xx_show_cpuinfo, + .calibrate_decr = generic_calibrate_decr, +}; -- 1.4.3.rc2.g0503 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 8/9] [POWERPC] Add device trees for lite5200 and lite5200b eval boards 2006-11-27 21:16 ` [PATCH 7/9] [POWERPC] Add lite5200 board support to arch/powerpc Grant Likely @ 2006-11-27 21:16 ` Grant Likely 2006-11-27 21:16 ` [PATCH 9/9] [POWERPC] defconfig for lite5200 board Grant Likely 0 siblings, 1 reply; 15+ messages in thread From: Grant Likely @ 2006-11-27 21:16 UTC (permalink / raw) To: linuxppc-dev, Paul Mackerras; +Cc: Sylvain Munaut Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Sylvain Munaut <tnt@246tNt.com> --- arch/powerpc/boot/dts/lite5200.dts | 313 ++++++++++++++++++++++++++++++++++ arch/powerpc/boot/dts/lite5200b.dts | 318 +++++++++++++++++++++++++++++++++++ 2 files changed, 631 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts new file mode 100644 index 0000000..8bc0d25 --- /dev/null +++ b/arch/powerpc/boot/dts/lite5200.dts @@ -0,0 +1,313 @@ +/* + * Lite5200 board Device Tree Source + * + * Copyright 2006 Secret Lab Technologies Ltd. + * Grant Likely <grant.likely@secretlab.ca> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/ { + model = "Lite5200"; + compatible = "lite5200\0lite52xx\0mpc5200\0mpc52xx"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #cpus = <1>; + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,5200@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <20>; + i-cache-line-size = <20>; + d-cache-size = <4000>; // L1, 16K + i-cache-size = <4000>; // L1, 16K + timebase-frequency = <0>; // from bootloader + bus-frequency = <0>; // from bootloader + clock-frequency = <0>; // from bootloader + 32-bit; + }; + }; + + memory { + device_type = "memory"; + reg = <00000000 04000000>; // 64MB + }; + + soc5200@f0000000 { + #interrupt-cells = <3>; + device_type = "soc"; + ranges = <0 f0000000 f0010000>; + reg = <f0000000 00010000>; + bus-frequency = <0>; // from bootloader + + cdm@200 { + compatible = "mpc5200-cdm\0mpc52xx-cdm"; + reg = <200 38>; + }; + + pic@500 { + // 5200 interrupts are encoded into two levels; + linux,phandle = <500>; + interrupt-controller; + #interrupt-cells = <3>; + device_type = "interrupt-controller"; + compatible = "mpc5200-pic\0mpc52xx-pic"; + reg = <500 80>; + built-in; + }; + + gpt@600 { // General Purpose Timer + compatible = "mpc5200-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <600 10>; + interrupts = <1 9 0>; + interrupt-parent = <500>; + }; + + gpt@610 { // General Purpose Timer + compatible = "mpc5200-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <610 10>; + interrupts = <1 a 0>; + interrupt-parent = <500>; + }; + + gpt@620 { // General Purpose Timer + compatible = "mpc5200-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <620 10>; + interrupts = <1 b 0>; + interrupt-parent = <500>; + }; + + gpt@630 { // General Purpose Timer + compatible = "mpc5200-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <630 10>; + interrupts = <1 c 0>; + interrupt-parent = <500>; + }; + + gpt@640 { // General Purpose Timer + compatible = "mpc5200-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <640 10>; + interrupts = <1 d 0>; + interrupt-parent = <500>; + }; + + gpt@650 { // General Purpose Timer + compatible = "mpc5200-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <650 10>; + interrupts = <1 e 0>; + interrupt-parent = <500>; + }; + + gpt@660 { // General Purpose Timer + compatible = "mpc5200-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <660 10>; + interrupts = <1 f 0>; + interrupt-parent = <500>; + }; + + gpt@670 { // General Purpose Timer + compatible = "mpc5200-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <670 10>; + interrupts = <1 10 0>; + interrupt-parent = <500>; + }; + + rtc@800 { // Real time clock + compatible = "mpc5200-rtc\0mpc52xx-rtc"; + device_type = "rtc"; + reg = <800 100>; + interrupts = <1 5 0 1 6 0>; + interrupt-parent = <500>; + }; + + mscan@900 { + device_type = "mscan"; + compatible = "mpc5200-mscan\0mpc52xx-mscan"; + interrupts = <2 11 0>; + interrupt-parent = <500>; + reg = <900 80>; + }; + + mscan@980 { + device_type = "mscan"; + compatible = "mpc5200-mscan\0mpc52xx-mscan"; + interrupts = <1 12 0>; + interrupt-parent = <500>; + reg = <980 80>; + }; + + gpio@b00 { + compatible = "mpc5200-gpio\0mpc52xx-gpio"; + reg = <b00 40>; + interrupts = <1 7 0>; + interrupt-parent = <500>; + }; + + gpio-wkup@b00 { + compatible = "mpc5200-gpio-wkup\0mpc52xx-gpio-wkup"; + reg = <c00 40>; + interrupts = <1 8 0 0 3 0>; + interrupt-parent = <500>; + }; + + pci@0d00 { + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + compatible = "mpc5200-pci\0mpc52xx-pci"; + reg = <d00 100>; + interrupt-map-mask = <f800 0 0 7>; + interrupt-map = <c000 0 0 1 500 0 0 3 + c000 0 0 2 500 0 0 3 + c000 0 0 3 500 0 0 3 + c000 0 0 4 500 0 0 3>; + clock-frequency = <0>; // From boot loader + interrupts = <2 8 0 2 9 0 2 a 0>; + interrupt-parent = <500>; + bus-range = <0 0>; + ranges = <42000000 0 80000000 80000000 0 20000000 + 02000000 0 a0000000 a0000000 0 10000000 + 01000000 0 00000000 b0000000 0 01000000>; + }; + + spi@f00 { + device_type = "spi"; + compatible = "mpc5200-spi\0mpc52xx-spi"; + reg = <f00 20>; + interrupts = <2 d 0 2 e 0>; + interrupt-parent = <500>; + }; + + usb@1000 { + device_type = "usb-ohci-be"; + compatible = "mpc5200-ohci\0mpc52xx-ohci\0ohci-be"; + reg = <1000 ff>; + interrupts = <2 6 0>; + interrupt-parent = <500>; + }; + + bestcomm@1200 { + device_type = "dma-controller"; + compatible = "mpc5200-bestcomm\0mpc52xx-bestcomm"; + reg = <1200 80>; + interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 + 3 4 0 3 5 0 3 6 0 3 7 0 + 3 8 0 3 9 0 3 a 0 3 b 0 + 3 c 0 3 d 0 3 e 0 3 f 0>; + interrupt-parent = <500>; + }; + + xlb@1f00 { + compatible = "mpc5200-xlb\0mpc52xx-xlb"; + reg = <1f00 100>; + }; + + serial@2000 { // PSC1 + device_type = "serial"; + compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart"; + port-number = <0>; // Logical port assignment + reg = <2000 100>; + interrupts = <2 1 0>; + interrupt-parent = <500>; + }; + + // PSC2 in spi mode example + spi@2200 { // PSC2 + device_type = "spi"; + compatible = "mpc5200-psc-spi\0mpc52xx-psc-spi"; + reg = <2200 100>; + interrupts = <2 2 0>; + interrupt-parent = <500>; + }; + + // PSC3 in CODEC mode example + i2s@2400 { // PSC3 + device_type = "i2s"; + compatible = "mpc5200-psc-i2s\0mpc52xx-psc-i2s"; + reg = <2400 100>; + interrupts = <2 3 0>; + interrupt-parent = <500>; + }; + + // PSC4 unconfigured + //serial@2600 { // PSC4 + // device_type = "serial"; + // compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart"; + // reg = <2600 100>; + // interrupts = <2 b 0>; + // interrupt-parent = <500>; + //}; + + // PSC5 unconfigured + //serial@2800 { // PSC5 + // device_type = "serial"; + // compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart"; + // reg = <2800 100>; + // interrupts = <2 c 0>; + // interrupt-parent = <500>; + //}; + + // PSC6 in AC97 mode example + ac97@2c00 { // PSC6 + device_type = "ac97"; + compatible = "mpc5200-psc-ac97\0mpc52xx-psc-ac97"; + reg = <2c00 100>; + interrupts = <2 4 0>; + interrupt-parent = <500>; + }; + + ethernet@3000 { + device_type = "network"; + compatible = "mpc5200-fec\0mpc52xx-fec"; + reg = <3000 800>; + mac-address = [ 02 03 04 05 06 07 ]; // Bad! + interrupts = <2 5 0>; + interrupt-parent = <500>; + }; + + ata@3a00 { + device_type = "ata"; + compatible = "mpc5200-ata\0mpc52xx-ata"; + reg = <3a00 100>; + interrupts = <2 7 0>; + interrupt-parent = <500>; + }; + + i2c@3d00 { + device_type = "i2c"; + compatible = "mpc5200-i2c\0mpc52xx-i2c"; + reg = <3d00 40>; + interrupts = <2 f 0>; + interrupt-parent = <500>; + }; + + i2c@3d40 { + device_type = "i2c"; + compatible = "mpc5200-i2c\0mpc52xx-i2c"; + reg = <3d40 40>; + interrupts = <2 10 0>; + interrupt-parent = <500>; + }; + sram@8000 { + device_type = "sram"; + compatible = "mpc5200-sram\0mpc52xx-sram\0sram"; + reg = <8000 4000>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts new file mode 100644 index 0000000..81cb764 --- /dev/null +++ b/arch/powerpc/boot/dts/lite5200b.dts @@ -0,0 +1,318 @@ +/* + * Lite5200B board Device Tree Source + * + * Copyright 2006 Secret Lab Technologies Ltd. + * Grant Likely <grant.likely@secretlab.ca> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/ { + model = "Lite5200b"; + compatible = "lite5200b\0lite52xx\0mpc5200b\0mpc52xx"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #cpus = <1>; + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,5200@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <20>; + i-cache-line-size = <20>; + d-cache-size = <4000>; // L1, 16K + i-cache-size = <4000>; // L1, 16K + timebase-frequency = <0>; // from bootloader + bus-frequency = <0>; // from bootloader + clock-frequency = <0>; // from bootloader + 32-bit; + }; + }; + + memory { + device_type = "memory"; + reg = <00000000 10000000>; // 256MB + }; + + soc5200@f0000000 { + #interrupt-cells = <3>; + device_type = "soc"; + ranges = <0 f0000000 f0010000>; + reg = <f0000000 00010000>; + bus-frequency = <0>; // from bootloader + + cdm@200 { + compatible = "mpc5200b-cdm\0mpc52xx-cdm"; + reg = <200 38>; + }; + + pic@500 { + // 5200 interrupts are encoded into two levels; + linux,phandle = <500>; + interrupt-controller; + #interrupt-cells = <3>; + device_type = "interrupt-controller"; + compatible = "mpc5200b-pic\0mpc52xx-pic"; + reg = <500 80>; + built-in; + }; + + gpt@600 { // General Purpose Timer + compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <600 10>; + interrupts = <1 9 0>; + interrupt-parent = <500>; + }; + + gpt@610 { // General Purpose Timer + compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <610 10>; + interrupts = <1 a 0>; + interrupt-parent = <500>; + }; + + gpt@620 { // General Purpose Timer + compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <620 10>; + interrupts = <1 b 0>; + interrupt-parent = <500>; + }; + + gpt@630 { // General Purpose Timer + compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <630 10>; + interrupts = <1 c 0>; + interrupt-parent = <500>; + }; + + gpt@640 { // General Purpose Timer + compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <640 10>; + interrupts = <1 d 0>; + interrupt-parent = <500>; + }; + + gpt@650 { // General Purpose Timer + compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <650 10>; + interrupts = <1 e 0>; + interrupt-parent = <500>; + }; + + gpt@660 { // General Purpose Timer + compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <660 10>; + interrupts = <1 f 0>; + interrupt-parent = <500>; + }; + + gpt@670 { // General Purpose Timer + compatible = "mpc5200b-gpt\0mpc52xx-gpt"; + device_type = "gpt"; + reg = <670 10>; + interrupts = <1 10 0>; + interrupt-parent = <500>; + }; + + rtc@800 { // Real time clock + compatible = "mpc5200b-rtc\0mpc52xx-rtc"; + device_type = "rtc"; + reg = <800 100>; + interrupts = <1 5 0 1 6 0>; + interrupt-parent = <500>; + }; + + mscan@900 { + device_type = "mscan"; + compatible = "mpc5200b-mscan\0mpc52xx-mscan"; + interrupts = <2 11 0>; + interrupt-parent = <500>; + reg = <900 80>; + }; + + mscan@980 { + device_type = "mscan"; + compatible = "mpc5200b-mscan\0mpc52xx-mscan"; + interrupts = <1 12 0>; + interrupt-parent = <500>; + reg = <980 80>; + }; + + gpio@b00 { + compatible = "mpc5200b-gpio\0mpc52xx-gpio"; + reg = <b00 40>; + interrupts = <1 7 0>; + interrupt-parent = <500>; + }; + + gpio-wkup@b00 { + compatible = "mpc5200b-gpio-wkup\0mpc52xx-gpio-wkup"; + reg = <c00 40>; + interrupts = <1 8 0 0 3 0>; + interrupt-parent = <500>; + }; + + pci@0d00 { + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + compatible = "mpc5200b-pci\0mpc52xx-pci"; + reg = <d00 100>; + interrupt-map-mask = <f800 0 0 7>; + interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot + c000 0 0 2 500 1 1 3 + c000 0 0 3 500 1 2 3 + c000 0 0 4 500 1 3 3 + + c800 0 0 1 500 1 1 3 // 2nd slot + c800 0 0 2 500 1 2 3 + c800 0 0 3 500 1 3 3 + c800 0 0 4 500 0 0 3>; + clock-frequency = <0>; // From boot loader + interrupts = <2 8 0 2 9 0 2 a 0>; + interrupt-parent = <500>; + bus-range = <0 0>; + ranges = <42000000 0 80000000 80000000 0 20000000 + 02000000 0 a0000000 a0000000 0 10000000 + 01000000 0 00000000 b0000000 0 01000000>; + }; + + spi@f00 { + device_type = "spi"; + compatible = "mpc5200b-spi\0mpc52xx-spi"; + reg = <f00 20>; + interrupts = <2 d 0 2 e 0>; + interrupt-parent = <500>; + }; + + usb@1000 { + device_type = "usb-ohci-be"; + compatible = "mpc5200b-ohci\0mpc52xx-ohci\0ohci-be"; + reg = <1000 ff>; + interrupts = <2 6 0>; + interrupt-parent = <500>; + }; + + bestcomm@1200 { + device_type = "dma-controller"; + compatible = "mpc5200b-bestcomm\0mpc52xx-bestcomm"; + reg = <1200 80>; + interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 + 3 4 0 3 5 0 3 6 0 3 7 0 + 3 8 0 3 9 0 3 a 0 3 b 0 + 3 c 0 3 d 0 3 e 0 3 f 0>; + interrupt-parent = <500>; + }; + + xlb@1f00 { + compatible = "mpc5200b-xlb\0mpc52xx-xlb"; + reg = <1f00 100>; + }; + + serial@2000 { // PSC1 + device_type = "serial"; + compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart"; + port-number = <0>; // Logical port assignment + reg = <2000 100>; + interrupts = <2 1 0>; + interrupt-parent = <500>; + }; + + // PSC2 in spi mode example + spi@2200 { // PSC2 + device_type = "spi"; + compatible = "mpc5200b-psc-spi\0mpc52xx-psc-spi"; + reg = <2200 100>; + interrupts = <2 2 0>; + interrupt-parent = <500>; + }; + + // PSC3 in CODEC mode example + i2s@2400 { // PSC3 + device_type = "i2s"; + compatible = "mpc5200b-psc-i2s\0mpc52xx-psc-i2s"; + reg = <2400 100>; + interrupts = <2 3 0>; + interrupt-parent = <500>; + }; + + // PSC4 unconfigured + //serial@2600 { // PSC4 + // device_type = "serial"; + // compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart"; + // reg = <2600 100>; + // interrupts = <2 b 0>; + // interrupt-parent = <500>; + //}; + + // PSC5 unconfigured + //serial@2800 { // PSC5 + // device_type = "serial"; + // compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart"; + // reg = <2800 100>; + // interrupts = <2 c 0>; + // interrupt-parent = <500>; + //}; + + // PSC6 in AC97 mode example + ac97@2c00 { // PSC6 + device_type = "ac97"; + compatible = "mpc5200b-psc-ac97\0mpc52xx-psc-ac97"; + reg = <2c00 100>; + interrupts = <2 4 0>; + interrupt-parent = <500>; + }; + + ethernet@3000 { + device_type = "network"; + compatible = "mpc5200b-fec\0mpc52xx-fec"; + reg = <3000 800>; + mac-address = [ 02 03 04 05 06 07 ]; // Bad! + interrupts = <2 5 0>; + interrupt-parent = <500>; + }; + + ata@3a00 { + device_type = "ata"; + compatible = "mpc5200b-ata\0mpc52xx-ata"; + reg = <3a00 100>; + interrupts = <2 7 0>; + interrupt-parent = <500>; + }; + + i2c@3d00 { + device_type = "i2c"; + compatible = "mpc5200b-i2c\0mpc52xx-i2c"; + reg = <3d00 40>; + interrupts = <2 f 0>; + interrupt-parent = <500>; + }; + + i2c@3d40 { + device_type = "i2c"; + compatible = "mpc5200b-i2c\0mpc52xx-i2c"; + reg = <3d40 40>; + interrupts = <2 10 0>; + interrupt-parent = <500>; + }; + sram@8000 { + device_type = "sram"; + compatible = "mpc5200b-sram\0mpc52xx-sram\0sram"; + reg = <8000 4000>; + }; + }; +}; -- 1.4.3.rc2.g0503 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 9/9] [POWERPC] defconfig for lite5200 board 2006-11-27 21:16 ` [PATCH 8/9] [POWERPC] Add device trees for lite5200 and lite5200b eval boards Grant Likely @ 2006-11-27 21:16 ` Grant Likely 0 siblings, 0 replies; 15+ messages in thread From: Grant Likely @ 2006-11-27 21:16 UTC (permalink / raw) To: linuxppc-dev, Paul Mackerras; +Cc: Sylvain Munaut Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Sylvain Munaut <tnt@246tNt.com> --- arch/powerpc/configs/lite5200_defconfig | 931 +++++++++++++++++++++++++++++++ 1 files changed, 931 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/configs/lite5200_defconfig b/arch/powerpc/configs/lite5200_defconfig new file mode 100644 index 0000000..ee76557 --- /dev/null +++ b/arch/powerpc/configs/lite5200_defconfig @@ -0,0 +1,931 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.19-rc6 +# Mon Nov 27 11:08:20 2006 +# +# CONFIG_PPC64 is not set +CONFIG_PPC32=y +CONFIG_PPC_MERGE=y +CONFIG_MMU=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_IRQ_PER_CPU=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_PPC=y +CONFIG_EARLY_PRINTK=y +CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y +CONFIG_PPC_OF=y +# CONFIG_PPC_UDBG_16550 is not set +# CONFIG_GENERIC_TBSYNC is not set +CONFIG_AUDIT_ARCH=y +# CONFIG_DEFAULT_UIMAGE is not set + +# +# Processor support +# +CONFIG_CLASSIC32=y +# CONFIG_PPC_52xx is not set +# CONFIG_PPC_82xx is not set +# CONFIG_PPC_83xx is not set +# CONFIG_PPC_85xx is not set +# CONFIG_PPC_86xx is not set +# CONFIG_40x is not set +# CONFIG_44x is not set +# CONFIG_8xx is not set +# CONFIG_E200 is not set +CONFIG_6xx=y +CONFIG_PPC_FPU=y +# CONFIG_PPC_DCR_NATIVE is not set +# CONFIG_PPC_DCR_MMIO is not set +# CONFIG_ALTIVEC is not set +CONFIG_PPC_STD_MMU=y +CONFIG_PPC_STD_MMU_32=y +# CONFIG_SMP is not set +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +# CONFIG_SYSCTL_SYSCALL is not set +# CONFIG_KALLSYMS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +# CONFIG_EPOLL is not set +CONFIG_SHMEM=y +CONFIG_SLAB=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +# CONFIG_KMOD is not set + +# +# Block layer +# +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# Platform support +# +CONFIG_PPC_MULTIPLATFORM=y +# CONFIG_EMBEDDED6xx is not set +# CONFIG_APUS is not set +# CONFIG_PPC_CHRP is not set +CONFIG_PPC_MPC52xx=y +# CONFIG_PPC_EFIKA is not set +CONFIG_PPC_LITE5200=y +# CONFIG_PPC_PMAC is not set +# CONFIG_PPC_CELL is not set +# CONFIG_PPC_CELL_NATIVE is not set +# CONFIG_PPC_RTAS is not set +# CONFIG_MMIO_NVRAM is not set +# CONFIG_PPC_MPC106 is not set +# CONFIG_PPC_970_NAP is not set +# CONFIG_PPC_INDIRECT_IO is not set +# CONFIG_GENERIC_IOMAP is not set +# CONFIG_CPU_FREQ is not set +# CONFIG_TAU is not set +# CONFIG_WANT_EARLY_SERIAL is not set +# CONFIG_MPIC is not set + +# +# Kernel options +# +# CONFIG_HIGHMEM is not set +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y +# CONFIG_KEXEC is not set +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_PROC_DEVICETREE=y +# CONFIG_CMDLINE_BOOL is not set +CONFIG_PM=y +# CONFIG_PM_LEGACY is not set +# CONFIG_PM_DEBUG is not set +# CONFIG_PM_SYSFS_DEPRECATED is not set +# CONFIG_SOFTWARE_SUSPEND is not set +CONFIG_SECCOMP=y +CONFIG_ISA_DMA_API=y + +# +# Bus options +# +CONFIG_GENERIC_ISA_DMA=y +# CONFIG_MPIC_WEIRD is not set +# CONFIG_PPC_I8259 is not set +# CONFIG_PPC_INDIRECT_PCI is not set +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +# CONFIG_PCIEPORTBUS is not set +# CONFIG_PCI_DEBUG is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PCI Hotplug Support +# +# CONFIG_HOTPLUG_PCI is not set + +# +# Advanced setup +# +# CONFIG_ADVANCED_OPTIONS is not set + +# +# Default settings for advanced configuration options are used +# +CONFIG_HIGHMEM_START=0xfe000000 +CONFIG_LOWMEM_SIZE=0x30000000 +CONFIG_KERNEL_START=0xc0000000 +CONFIG_TASK_SIZE=0x80000000 +CONFIG_BOOT_LOAD=0x00800000 + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +CONFIG_XFRM_USER=m +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=32768 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# Misc devices +# +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +# CONFIG_SCSI_NETLINK is not set +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +# CONFIG_BLK_DEV_SD is not set +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set + +# +# SCSI low-level drivers +# +# CONFIG_ISCSI_TCP is not set +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_BUSLOGIC is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_EATA is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_GDTH is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set + +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# +CONFIG_ATA=y +# CONFIG_SATA_AHCI is not set +# CONFIG_SATA_SVW is not set +# CONFIG_ATA_PIIX is not set +# CONFIG_SATA_MV is not set +# CONFIG_SATA_NV is not set +# CONFIG_PDC_ADMA is not set +# CONFIG_SATA_QSTOR is not set +# CONFIG_SATA_PROMISE is not set +# CONFIG_SATA_SX4 is not set +# CONFIG_SATA_SIL is not set +# CONFIG_SATA_SIL24 is not set +# CONFIG_SATA_SIS is not set +# CONFIG_SATA_ULI is not set +# CONFIG_SATA_VIA is not set +# CONFIG_SATA_VITESSE is not set +# CONFIG_PATA_ALI is not set +# CONFIG_PATA_AMD is not set +# CONFIG_PATA_ARTOP is not set +# CONFIG_PATA_ATIIXP is not set +# CONFIG_PATA_CMD64X is not set +# CONFIG_PATA_CS5520 is not set +# CONFIG_PATA_CS5530 is not set +# CONFIG_PATA_CYPRESS is not set +# CONFIG_PATA_EFAR is not set +# CONFIG_ATA_GENERIC is not set +# CONFIG_PATA_HPT366 is not set +# CONFIG_PATA_HPT37X is not set +# CONFIG_PATA_HPT3X2N is not set +# CONFIG_PATA_HPT3X3 is not set +# CONFIG_PATA_IT821X is not set +# CONFIG_PATA_JMICRON is not set +# CONFIG_PATA_TRIFLEX is not set +CONFIG_PATA_MPC52xx=y +# CONFIG_PATA_MPIIX is not set +# CONFIG_PATA_OLDPIIX is not set +# CONFIG_PATA_NETCELL is not set +# CONFIG_PATA_NS87410 is not set +# CONFIG_PATA_OPTI is not set +# CONFIG_PATA_OPTIDMA is not set +# CONFIG_PATA_PDC_OLD is not set +# CONFIG_PATA_RADISYS is not set +# CONFIG_PATA_RZ1000 is not set +# CONFIG_PATA_SC1200 is not set +# CONFIG_PATA_SERVERWORKS is not set +# CONFIG_PATA_PDC2027X is not set +# CONFIG_PATA_SIL680 is not set +# CONFIG_PATA_SIS is not set +# CONFIG_PATA_VIA is not set +# CONFIG_PATA_WINBOND is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set +# CONFIG_FUSION_SPI is not set +# CONFIG_FUSION_FC is not set +# CONFIG_FUSION_SAS is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Macintosh device drivers +# +# CONFIG_WINDFARM is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# PHY device support +# + +# +# Ethernet (10 or 100Mbit) +# +# CONFIG_NET_ETHERNET is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +# CONFIG_MV643XX_ETH is not set +# CONFIG_QLA3XXX is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_CHELSIO_T1 is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +# CONFIG_INPUT is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_SERIAL_MPC52xx=y +CONFIG_SERIAL_MPC52xx_CONSOLE=y +CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=9600 +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_AGP is not set +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +# CONFIG_HWMON is not set +# CONFIG_HWMON_VID is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set + +# +# Graphics support +# +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +# CONFIG_USB is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# +# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) +# + +# +# Real Time Clock +# +# CONFIG_RTC_CLASS is not set + +# +# DMA Engine support +# +# CONFIG_DMA_ENGINE is not set + +# +# DMA Clients +# + +# +# DMA Devices +# + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_XATTR=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +# CONFIG_EXT4DEV_FS is not set +CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_PROC_KCORE=y +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +# CONFIG_NFS_FS is not set +# CONFIG_NFSD is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +# CONFIG_NLS is not set + +# +# Library routines +# +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_PLIST=y + +# +# Instrumentation Support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +CONFIG_PRINTK_TIME=y +CONFIG_ENABLE_MUST_CHECK=y +# CONFIG_MAGIC_SYSRQ is not set +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_KERNEL=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_INFO=y +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +CONFIG_FORCED_INLINING=y +# CONFIG_HEADERS_CHECK is not set +# CONFIG_RCU_TORTURE_TEST is not set +# CONFIG_DEBUGGER is not set +# CONFIG_BDI_SWITCH is not set +# CONFIG_BOOTX_TEXT is not set +# CONFIG_SERIAL_TEXT_DEBUG is not set +# CONFIG_PPC_EARLY_DEBUG is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set -- 1.4.3.rc2.g0503 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx 2006-11-27 21:16 ` [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx Grant Likely 2006-11-27 21:16 ` [PATCH 5/9] [POWERPC] Separate IRQ config / register set from main header Grant Likely @ 2006-11-27 21:56 ` Arnd Bergmann 2006-11-27 22:09 ` Grant Likely 2006-11-27 22:12 ` Benjamin Herrenschmidt 1 sibling, 2 replies; 15+ messages in thread From: Arnd Bergmann @ 2006-11-27 21:56 UTC (permalink / raw) To: linuxppc-dev; +Cc: Paul Mackerras On Monday 27 November 2006 22:16, Grant Likely wrote: > +#ifdef CONFIG_PCI > +/* > + * Access functions for PCI config space using RTAS calls. > + */ > +static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int= offset, > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 = =A0 =A0int len, u32 * val) > +{ > +=A0=A0=A0=A0=A0=A0=A0struct pci_controller *hose =3D bus->sysdata; > +=A0=A0=A0=A0=A0=A0=A0unsigned long addr =3D (offset & 0xff) | ((devfn & = 0xff) << 8) > +=A0=A0=A0=A0=A0=A0=A0 =A0 =A0| (((bus->number - hose->first_busno) & 0xf= f) << 16) > +=A0=A0=A0=A0=A0=A0=A0 =A0 =A0| (hose->index << 24); > +=A0=A0=A0=A0=A0=A0=A0int ret =3D -1; > +=A0=A0=A0=A0=A0=A0=A0int rval; > + > +=A0=A0=A0=A0=A0=A0=A0rval =3D rtas_call(rtas_token("read-pci-config"), 2= , 2, &ret, addr, len); > +=A0=A0=A0=A0=A0=A0=A0*val =3D ret; > +=A0=A0=A0=A0=A0=A0=A0return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SU= CCESSFUL; > +} > + > +static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 = =A0 =A0 int offset, int len, u32 val) > +{ > +=A0=A0=A0=A0=A0=A0=A0struct pci_controller *hose =3D bus->sysdata; > +=A0=A0=A0=A0=A0=A0=A0unsigned long addr =3D (offset & 0xff) | ((devfn & = 0xff) << 8) > +=A0=A0=A0=A0=A0=A0=A0 =A0 =A0| (((bus->number - hose->first_busno) & 0xf= f) << 16) > +=A0=A0=A0=A0=A0=A0=A0 =A0 =A0| (hose->index << 24); > +=A0=A0=A0=A0=A0=A0=A0int rval; > + > +=A0=A0=A0=A0=A0=A0=A0rval =3D rtas_call(rtas_token("write-pci-config"), = 3, 1, NULL, > +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 ad= dr, len, val); > +=A0=A0=A0=A0=A0=A0=A0return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SU= CCESSFUL; > +} > + I know you're only moving this code, but shouldn't this really use the code from arch/powerpc/kernel/rtas_pci.c? If it doesn't work out of the box, I guess we should rather split out the pseries specific bits from it and make the common parts more generic. Arnd <>< ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx 2006-11-27 21:56 ` [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx Arnd Bergmann @ 2006-11-27 22:09 ` Grant Likely 2006-11-27 22:12 ` Benjamin Herrenschmidt 1 sibling, 0 replies; 15+ messages in thread From: Grant Likely @ 2006-11-27 22:09 UTC (permalink / raw) To: Arnd Bergmann; +Cc: linuxppc-dev, Paul Mackerras On 11/27/06, Arnd Bergmann <arnd@arndb.de> wrote: > On Monday 27 November 2006 22:16, Grant Likely wrote: > > +#ifdef CONFIG_PCI > > +/* > > + * Access functions for PCI config space using RTAS calls. > > + */ > > +static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, > > + int len, u32 * val) > > +{ > > +struct pci_controller *hose = bus->sysdata; > > +unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) > > + | (((bus->number - hose->first_busno) & 0xff) << 16) > > + | (hose->index << 24); > > +int ret = -1; > > +int rval; > > + > > +rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len); > > +*val = ret; > > +return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; > > +} > > + > > +static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, > > + int offset, int len, u32 val) > > +{ > > +struct pci_controller *hose = bus->sysdata; > > +unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) > > + | (((bus->number - hose->first_busno) & 0xff) << 16) > > + | (hose->index << 24); > > +int rval; > > + > > +rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL, > > + addr, len, val); > > +return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; > > +} > > + > > I know you're only moving this code, but shouldn't this really use the > code from arch/powerpc/kernel/rtas_pci.c? If it doesn't work out of > the box, I guess we should rather split out the pseries specific > bits from it and make the common parts more generic. > Oh, probably. :) As you mentioned; because I'm just moving the code, I certainly don't want to tackle that with this patch series. The Efika code is still quite young (in fact the code in Paul's tree isn't complete enough yet to boot), and it is being actively developed. Expect to see PCI rework in the future, but I don't know if it will make the .20 merge window. Cheers, g. -- Grant Likely, B.Sc. P.Eng. Secret Lab Technologies Ltd. grant.likely@secretlab.ca (403) 399-0195 ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx 2006-11-27 21:56 ` [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx Arnd Bergmann 2006-11-27 22:09 ` Grant Likely @ 2006-11-27 22:12 ` Benjamin Herrenschmidt 2006-11-27 22:33 ` Arnd Bergmann 1 sibling, 1 reply; 15+ messages in thread From: Benjamin Herrenschmidt @ 2006-11-27 22:12 UTC (permalink / raw) To: Arnd Bergmann; +Cc: linuxppc-dev, Paul Mackerras > I know you're only moving this code, but shouldn't this really use the > code from arch/powerpc/kernel/rtas_pci.c? If it doesn't work out of > the box, I guess we should rather split out the pseries specific > bits from it and make the common parts more generic. I looked into it and decided to wait before trying to do that. The 32 bits versions are very small so it doesn't matter much anyway. Ben. ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx 2006-11-27 22:12 ` Benjamin Herrenschmidt @ 2006-11-27 22:33 ` Arnd Bergmann 0 siblings, 0 replies; 15+ messages in thread From: Arnd Bergmann @ 2006-11-27 22:33 UTC (permalink / raw) To: linuxppc-dev; +Cc: Paul Mackerras On Monday 27 November 2006 23:12, Benjamin Herrenschmidt wrote: > > I know you're only moving this code, but shouldn't this really use the > > code from arch/powerpc/kernel/rtas_pci.c? If it doesn't work out of > > the box, I guess we should rather split out the pseries specific > > bits from it and make the common parts more generic. > > I looked into it and decided to wait before trying to do that. The 32 > bits versions are very small so it doesn't matter much anyway. Ok, that's probably true for the current platforms. It may become more useful to merge if we get more platforms that need extended config space registers or multiple PCI buses. Arnd <>< ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: MPC52xx support rework for 2.6.20 2006-11-27 21:16 MPC52xx support rework for 2.6.20 Grant Likely 2006-11-27 21:16 ` [PATCH 1/9] [POWERPC] Document describing mpc52xx device tree binding conventions Grant Likely @ 2006-11-27 21:39 ` Sylvain Munaut 1 sibling, 0 replies; 15+ messages in thread From: Sylvain Munaut @ 2006-11-27 21:39 UTC (permalink / raw) To: Grant Likely; +Cc: linuxppc-dev, Paul Mackerras As indicated in each patch description, I acked those. I also tested them, they work "out-of-the-box" for both lite5200 and lite5200b. Sylvain Grant Likely wrote: > Rework mpc52xx support in arch/powerpc and add support for lite5200 eval > boards. This patchset only covers the board support code. Device > drivers will be sent in a seperate patchset as they need to cc: other > mailing lists > > The whole set of pending mpc52xx patches can also be pulled from: > git://git.secretlab.ca/srv/git-trees/public/git/linux-2.6.git#lite5200-merge > > > ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2006-11-27 22:33 UTC | newest] Thread overview: 15+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2006-11-27 21:16 MPC52xx support rework for 2.6.20 Grant Likely 2006-11-27 21:16 ` [PATCH 1/9] [POWERPC] Document describing mpc52xx device tree binding conventions Grant Likely 2006-11-27 21:16 ` [PATCH 2/9] [POWERPC] Move MPC52xx PIC driver into arch/powerpc/platforms/52xx Grant Likely 2006-11-27 21:16 ` [PATCH 3/9] [POWERPC] Put mpc52xx support file in platforms/52xx Grant Likely 2006-11-27 21:16 ` [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx Grant Likely 2006-11-27 21:16 ` [PATCH 5/9] [POWERPC] Separate IRQ config / register set from main header Grant Likely 2006-11-27 21:16 ` [PATCH 6/9] [POWERPC] Add common routines for 52xx support in arch/powerpc Grant Likely 2006-11-27 21:16 ` [PATCH 7/9] [POWERPC] Add lite5200 board support to arch/powerpc Grant Likely 2006-11-27 21:16 ` [PATCH 8/9] [POWERPC] Add device trees for lite5200 and lite5200b eval boards Grant Likely 2006-11-27 21:16 ` [PATCH 9/9] [POWERPC] defconfig for lite5200 board Grant Likely 2006-11-27 21:56 ` [PATCH 4/9] [POWERPC] move Efika support files into platforms/52xx Arnd Bergmann 2006-11-27 22:09 ` Grant Likely 2006-11-27 22:12 ` Benjamin Herrenschmidt 2006-11-27 22:33 ` Arnd Bergmann 2006-11-27 21:39 ` MPC52xx support rework for 2.6.20 Sylvain Munaut
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