From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: shmobile: porter: enable internal PCI and USB PHY
Date: Mon, 12 Oct 2015 22:12:18 +0000 [thread overview]
Message-ID: <4574604.BmF3DtBjpm@wasted.cogentembedded.com> (raw)
In-Reply-To: <3151312.grtDDBsSl8@wasted.cogentembedded.com>
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached
to them and also enable USB PHY device for the Porter board. We have to
enable everything in one patch since EHCI/OHCI devices are already linked
to the USB PHY device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
This patch is against 'renesas-devel-20151012-v4.3-rc5' tag of Simon Horman's
'renesas.git' repo.
arch/arm/boot/dts/r8a7791-porter.dts | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a7791-porter.dts
=================================--- renesas.orig/arch/arm/boot/dts/r8a7791-porter.dts
+++ renesas/arch/arm/boot/dts/r8a7791-porter.dts
@@ -120,6 +120,16 @@
renesas,function = "i2c2";
};
+ usb0_pins: usb0 {
+ renesas,groups = "usb0";
+ renesas,function = "usb0";
+ };
+
+ usb1_pins: usb1 {
+ renesas,groups = "usb1";
+ renesas,function = "usb1";
+ };
+
vin0_pins: vin0 {
renesas,groups = "vin0_data8", "vin0_clk";
renesas,function = "vin0";
@@ -245,6 +255,24 @@
};
};
+&pci0 {
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pci1 {
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
&pcie_bus_clk {
status = "okay";
};
WARNING: multiple messages have this Message-ID (diff)
From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: shmobile: porter: enable internal PCI and USB PHY
Date: Tue, 13 Oct 2015 01:12:18 +0300 [thread overview]
Message-ID: <4574604.BmF3DtBjpm@wasted.cogentembedded.com> (raw)
In-Reply-To: <3151312.grtDDBsSl8@wasted.cogentembedded.com>
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached
to them and also enable USB PHY device for the Porter board. We have to
enable everything in one patch since EHCI/OHCI devices are already linked
to the USB PHY device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
This patch is against 'renesas-devel-20151012-v4.3-rc5' tag of Simon Horman's
'renesas.git' repo.
arch/arm/boot/dts/r8a7791-porter.dts | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a7791-porter.dts
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7791-porter.dts
+++ renesas/arch/arm/boot/dts/r8a7791-porter.dts
@@ -120,6 +120,16 @@
renesas,function = "i2c2";
};
+ usb0_pins: usb0 {
+ renesas,groups = "usb0";
+ renesas,function = "usb0";
+ };
+
+ usb1_pins: usb1 {
+ renesas,groups = "usb1";
+ renesas,function = "usb1";
+ };
+
vin0_pins: vin0 {
renesas,groups = "vin0_data8", "vin0_clk";
renesas,function = "vin0";
@@ -245,6 +255,24 @@
};
};
+&pci0 {
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pci1 {
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
&pcie_bus_clk {
status = "okay";
};
WARNING: multiple messages have this Message-ID (diff)
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: horms@verge.net.au, linux-sh@vger.kernel.org, robh+dt@kernel.org,
pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
devicetree@vger.kernel.org
Cc: magnus.damm@gmail.com, linux@arm.linux.org.uk,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: shmobile: porter: enable internal PCI and USB PHY
Date: Tue, 13 Oct 2015 01:12:18 +0300 [thread overview]
Message-ID: <4574604.BmF3DtBjpm@wasted.cogentembedded.com> (raw)
In-Reply-To: <3151312.grtDDBsSl8@wasted.cogentembedded.com>
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached
to them and also enable USB PHY device for the Porter board. We have to
enable everything in one patch since EHCI/OHCI devices are already linked
to the USB PHY device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
This patch is against 'renesas-devel-20151012-v4.3-rc5' tag of Simon Horman's
'renesas.git' repo.
arch/arm/boot/dts/r8a7791-porter.dts | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
Index: renesas/arch/arm/boot/dts/r8a7791-porter.dts
===================================================================
--- renesas.orig/arch/arm/boot/dts/r8a7791-porter.dts
+++ renesas/arch/arm/boot/dts/r8a7791-porter.dts
@@ -120,6 +120,16 @@
renesas,function = "i2c2";
};
+ usb0_pins: usb0 {
+ renesas,groups = "usb0";
+ renesas,function = "usb0";
+ };
+
+ usb1_pins: usb1 {
+ renesas,groups = "usb1";
+ renesas,function = "usb1";
+ };
+
vin0_pins: vin0 {
renesas,groups = "vin0_data8", "vin0_clk";
renesas,function = "vin0";
@@ -245,6 +255,24 @@
};
};
+&pci0 {
+ pinctrl-0 = <&usb0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&pci1 {
+ pinctrl-0 = <&usb1_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
+
&pcie_bus_clk {
status = "okay";
};
next prev parent reply other threads:[~2015-10-12 22:12 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-12 22:28 [PATCH 0/2] Add R8A7794/SILK board PCI USB DT support Sergei Shtylyov
2015-09-12 22:28 ` Sergei Shtylyov
2015-09-12 22:28 ` Sergei Shtylyov
2015-09-12 22:30 ` [PATCH 1/2] ARM: shmobile: r8a7794: add internal PCI bridge nodes Sergei Shtylyov
2015-09-12 22:30 ` Sergei Shtylyov
2015-09-12 22:30 ` Sergei Shtylyov
2015-09-12 22:32 ` [PATCH 2/2] ARM: shmobile: silk: enable internal PCI Sergei Shtylyov
2015-09-12 22:32 ` Sergei Shtylyov
2015-09-12 22:32 ` Sergei Shtylyov
2015-09-12 22:33 ` [PATCH 0/2] Add R8A7794/SILK board PCI USB DT support Sergei Shtylyov
2015-09-12 22:33 ` Sergei Shtylyov
2015-09-12 22:33 ` Sergei Shtylyov
2015-09-29 0:36 ` Simon Horman
2015-09-29 0:36 ` Simon Horman
2015-09-29 0:36 ` Simon Horman
2015-09-29 12:18 ` Sergei Shtylyov
2015-09-29 12:18 ` Sergei Shtylyov
2015-09-29 12:18 ` Sergei Shtylyov
2015-09-30 8:43 ` Simon Horman
2015-09-30 8:43 ` Simon Horman
2015-09-30 8:43 ` Simon Horman
2015-10-12 22:12 ` Sergei Shtylyov [this message]
2015-10-12 22:12 ` [PATCH] ARM: shmobile: porter: enable internal PCI and USB PHY Sergei Shtylyov
2015-10-12 22:12 ` Sergei Shtylyov
2015-10-13 1:01 ` Simon Horman
2015-10-13 1:01 ` Simon Horman
2015-10-13 1:01 ` Simon Horman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=4574604.BmF3DtBjpm@wasted.cogentembedded.com \
--to=sergei.shtylyov@cogentembedded.com \
--cc=linux-arm-kernel@lists.infradead.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.