* Re: [Adeos-main] New patch for AT91SAM9261 adeos support for 2.6.19 kernel [not found] <403B28AE6257B548B66BB88414AC78330174BBDE@STEGOSAURE.adetel.com> @ 2007-04-24 13:14 ` BOUIN Alexandre 2007-04-24 13:26 ` Gilles Chanteperdrix 0 siblings, 1 reply; 6+ messages in thread From: BOUIN Alexandre @ 2007-04-24 13:14 UTC (permalink / raw) To: adeos-main >It is a high. by default, nucleus latency is set to 9342. I can diminish this value to 323µs only. Is it possible I've done something wrong ? Is there another way to reduce theses latencies ? > You should get plenty of negative values. I've sent you my histogram and I don't see any negative value. Could you precise what was your thought ? >What is your kernel configuration, do not you have some statistics/debug options enabled ? It is right : I've let some kernel debug options while performing these tests. I change it right now. Test was launched without any kernel debug options, and we got a worst case of 197µs now. Here is a sum up of our results : [Board] : AT91SAM9261EK [Kernel version] : 2.6.19-at91-xenomai-adeos [Clocks] : CPU 198 MHz, master 99 MHz, main 18.432 MHz [Nucleus latency] : 323µs [Root] : nfs [Kernel debug options] : No [Load Softwares] : calibrator + ping host + bonnie++ [Duration] : > 15h [Best Latency] : 45µs [Average Latency] : 82.5µs [Worst Latency] : 197µs ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Adeos-main] New patch for AT91SAM9261 adeos support for 2.6.19 kernel 2007-04-24 13:14 ` [Adeos-main] New patch for AT91SAM9261 adeos support for 2.6.19 kernel BOUIN Alexandre @ 2007-04-24 13:26 ` Gilles Chanteperdrix 0 siblings, 0 replies; 6+ messages in thread From: Gilles Chanteperdrix @ 2007-04-24 13:26 UTC (permalink / raw) To: BOUIN Alexandre; +Cc: adeos-main BOUIN Alexandre wrote: >>It is a high. > > by default, nucleus latency is set to 9342. I can diminish this value > to 323µs only. Is it possible I've done something wrong ? Is there > another way to reduce theses latencies ? > The latency value is a value in nanoseconds, so 9342 is 9us. It is a value used by the nucleus to compensate for the systematic latency of your system. Usually, I set it to approximately the minimum value returned by latency (plus the current value of the latency) minus a small saftety margin, so that latency minimum value is close to 0 and I do not get negative values. > >>You should get plenty of negative values. > > I've sent you my histogram and I don't see any negative value. > Could you precise what was your thought ? Look at the code: static inline void add_histogram(long *histogram, long addval) { /* bucketsize steps */ long inabs = rt_timer_tsc2ns(addval >= 0 ? addval : -addval) / bucketsize; histogram[inabs < histogram_size ? inabs : histogram_size - 1]++; } So, you will never see a negative value in the histogram. > > >>What is your kernel configuration, do not you have some > > statistics/debug options enabled ? > It is right : I've let some kernel debug options while performing these tests. > I change it right now. I was thinking about Xenomai debug/statistics option. Xenomai nucleus statistics collection, for instance, is enabled by default and should be disabled for best performance. Check also that you did not enable Xenomai debug options, or the I-pipe tracer. > > Test was launched without any kernel debug options, and we got a worst > case of 197µs now. > Here is a sum up of our results : > [Board] : AT91SAM9261EK > [Kernel version] : 2.6.19-at91-xenomai-adeos > [Clocks] : CPU 198 MHz, master 99 MHz, main 18.432 MHz > [Nucleus latency] : 323µs > [Root] : nfs > [Kernel debug options] : No > [Load Softwares] : calibrator + ping host + bonnie++ > [Duration] : > 15h > [Best Latency] : 45µs > [Average Latency] : 82.5µs > [Worst Latency] : 197µs The best way to give us all the useful informations about your platform and configuration is to use the xeno-test script. Sorry I did not mention this earlier. You will have to use the -W option to use your custom load generation script. -- Gilles Chanteperdrix ^ permalink raw reply [flat|nested] 6+ messages in thread
[parent not found: <403B28AE6257B548B66BB88414AC78330174BBEA@STEGOSAURE.adetel.com>]
* Re: [Adeos-main] New patch for AT91SAM9261 adeos support for 2.6.19 kernel [not found] <403B28AE6257B548B66BB88414AC78330174BBEA@STEGOSAURE.adetel.com> @ 2007-05-03 11:45 ` BOUIN Alexandre 0 siblings, 0 replies; 6+ messages in thread From: BOUIN Alexandre @ 2007-05-03 11:45 UTC (permalink / raw) To: gilles.chanteperdrix, adeos-main [-- Attachment #1: Type: text/plain, Size: 1061 bytes --] First we added a little correction to our patch. No consequence for TC0 users but the ones who are thinking about using TC1 or TC2 should have the problems. In our adeos-at91 patch, at line 179, this +#if (CONFIG_IPIPE_AT91_TC==0) +# define KERNEL_TIMER_IRQ_NUM AT91_ID_TC0 +#elif (CONFIG_IPIPE_AT91_TC==1) +# define KERNEL_TIMER_IRQ_NUM AT91_ID_TC0 +#elif (CONFIG_IPIPE_AT91_TC==2) +# define KERNEL_TIMER_IRQ_NUM AT91_ID_TC0 +#else +#error IPIPE_AT91_TC must be 0, 1 or 2. +#endif has been corrected by : +#if (CONFIG_IPIPE_AT91_TC==0) +# define KERNEL_TIMER_IRQ_NUM AT91_ID_TC0 +#elif (CONFIG_IPIPE_AT91_TC==1) +# define KERNEL_TIMER_IRQ_NUM AT91_ID_TC1 +#elif (CONFIG_IPIPE_AT91_TC==2) +# define KERNEL_TIMER_IRQ_NUM AT91_ID_TC2 +#else +#error IPIPE_AT91_TC must be 0, 1 or 2. +#endif Sorry for inconveniance. Thus, we are thinking about moving this common part to hardware.h cause these defines are duplicated in at91rm9200_time.c and in at91sam926x_time.c. The interest is to make this part easier to maintain. [-- Attachment #2: adeos-ipipe-2.6.19-arm-AT91.patch --] [-- Type: application/octet-stream, Size: 18431 bytes --] diff -aurdpbB -X nodiff linux-2.6.19.at91/arch/arm/mach-at91rm9200/at91sam9260.c linux-2.6.19.patched/arch/arm/mach-at91rm9200/at91sam9260.c --- linux-2.6.19.at91/arch/arm/mach-at91rm9200/at91sam9260.c 2007-04-10 08:04:00.000000000 +0200 +++ linux-2.6.19.patched/arch/arm/mach-at91rm9200/at91sam9260.c 2007-04-23 18:08:19.000000000 +0200 @@ -27,6 +27,13 @@ static struct map_desc at91sam9260_io_de .length = SZ_16K, .type = MT_DEVICE, }, { +#ifdef CONFIG_IPIPE + .virtual = AT91_VA_BASE_TCB0, + .pfn = __phys_to_pfn(AT91SAM9260_BASE_TCB0), + .length = SZ_16K, + .type = MT_DEVICE, + }, { +#endif /* CONFIG_IPIPE */ .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE, .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE), .length = AT91SAM9260_SRAM0_SIZE, @@ -247,6 +254,7 @@ void __init at91sam9260_initialize(unsig * The default interrupt priority levels (0 = lowest, 7 = highest). */ static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { +#ifndef CONFIG_IPIPE 7, /* Advanced Interrupt Controller */ 7, /* System Peripherals */ 0, /* Parallel IO Controller A */ @@ -279,6 +287,42 @@ static unsigned int at91sam9260_default_ 0, /* Advanced Interrupt Controller */ 0, /* Advanced Interrupt Controller */ 0, /* Advanced Interrupt Controller */ +#else /* CONFIG_IPIPE */ +/* Give the highest priority to TC, since they are used as timer interrupt by + I-pipe. */ + 7, /* Advanced Interrupt Controller */ + 7, /* System Peripherals */ + 0, /* Parallel IO Controller A */ + 0, /* Parallel IO Controller B */ + 0, /* Parallel IO Controller C */ + 0, /* Analog-to-Digital Converter */ + 6, /* USART 0 */ + 6, /* USART 1 */ + 6, /* USART 2 */ + 0, /* Multimedia Card Interface */ + 4, /* USB Device Port */ + 0, /* Two-Wire Interface */ + 6, /* Serial Peripheral Interface 0 */ + 6, /* Serial Peripheral Interface 1 */ + 5, /* Serial Synchronous Controller */ + 0, + 0, + 7, /* Timer Counter 0 */ + 7, /* Timer Counter 1 */ + 7, /* Timer Counter 2 */ + 3, /* USB Host port */ + 3, /* Ethernet */ + 0, /* Image Sensor Interface */ + 6, /* USART 3 */ + 6, /* USART 4 */ + 6, /* USART 5 */ + 7, /* Timer Counter 3 */ + 7, /* Timer Counter 4 */ + 7, /* Timer Counter 5 */ + 0, /* Advanced Interrupt Controller */ + 0, /* Advanced Interrupt Controller */ + 0, /* Advanced Interrupt Controller */ +#endif /*CONFIG_IPIPE */ }; void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS]) diff -aurdpbB -X nodiff linux-2.6.19.at91/arch/arm/mach-at91rm9200/at91sam9261.c linux-2.6.19.patched/arch/arm/mach-at91rm9200/at91sam9261.c --- linux-2.6.19.at91/arch/arm/mach-at91rm9200/at91sam9261.c 2007-04-10 08:04:00.000000000 +0200 +++ linux-2.6.19.patched/arch/arm/mach-at91rm9200/at91sam9261.c 2007-04-18 13:51:16.000000000 +0200 @@ -27,6 +27,13 @@ static struct map_desc at91sam9261_io_de .length = SZ_16K, .type = MT_DEVICE, }, { +#ifdef CONFIG_IPIPE + .virtual = AT91_VA_BASE_TCB0, + .pfn = __phys_to_pfn(AT91SAM9261_BASE_TCB0), + .length = SZ_16K, + .type = MT_DEVICE, + }, { +#endif /* CONFIG_IPIPE */ .virtual = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE, .pfn = __phys_to_pfn(AT91SAM9261_SRAM_BASE), .length = AT91SAM9261_SRAM_SIZE, @@ -242,6 +249,7 @@ void __init at91sam9261_initialize(unsig * The default interrupt priority levels (0 = lowest, 7 = highest). */ static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { +#ifndef CONFIG_IPIPE 7, /* Advanced Interrupt Controller */ 7, /* System Peripherals */ 0, /* Parallel IO Controller A */ @@ -274,6 +282,42 @@ static unsigned int at91sam9261_default_ 0, /* Advanced Interrupt Controller */ 0, /* Advanced Interrupt Controller */ 0, /* Advanced Interrupt Controller */ +#else /* CONFIG_IPIPE */ +/* Give the highest priority to TC, since they are used as timer interrupt by + I-pipe. */ + 7, /* Advanced Interrupt Controller */ + 7, /* System Peripherals */ + 0, /* Parallel IO Controller A */ + 0, /* Parallel IO Controller B */ + 0, /* Parallel IO Controller C */ + 0, + 6, /* USART 0 */ + 6, /* USART 1 */ + 6, /* USART 2 */ + 0, /* Multimedia Card Interface */ + 4, /* USB Device Port */ + 0, /* Two-Wire Interface */ + 6, /* Serial Peripheral Interface 0 */ + 6, /* Serial Peripheral Interface 1 */ + 5, /* Serial Synchronous Controller 0 */ + 5, /* Serial Synchronous Controller 1 */ + 5, /* Serial Synchronous Controller 2 */ + 7, /* Timer Counter 0 */ + 7, /* Timer Counter 1 */ + 7, /* Timer Counter 2 */ + 3, /* USB Host port */ + 3, /* LCD Controller */ + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, /* Advanced Interrupt Controller */ + 0, /* Advanced Interrupt Controller */ + 0, /* Advanced Interrupt Controller */ +#endif /*CONFIG_IPIPE */ }; void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS]) diff -aurdpbB -X nodiff linux-2.6.19.at91/arch/arm/mach-at91rm9200/at91sam926x_time.c linux-2.6.19.patched/arch/arm/mach-at91rm9200/at91sam926x_time.c --- linux-2.6.19.at91/arch/arm/mach-at91rm9200/at91sam926x_time.c 2007-04-10 08:04:00.000000000 +0200 +++ linux-2.6.19.patched/arch/arm/mach-at91rm9200/at91sam926x_time.c 2007-04-23 14:29:25.000000000 +0200 @@ -22,10 +22,87 @@ #include <asm/arch/at91_pit.h> +static unsigned long last_crtr; + +#ifdef CONFIG_IPIPE +#include <linux/clk.h> +#include <linux/console.h> +#include <linux/module.h> +#include <asm/arch/at91_tc.h> +#include "clock.h" + +#if defined(CONFIG_ARCH_AT91RM9200) +#include <asm/arch/at91rm9200.h> +#define AT91_ID_TC0 AT91RM9200_ID_TC0 +#define AT91_ID_TC1 AT91RM9200_ID_TC1 +#define AT91_ID_TC2 AT91RM9200_ID_TC2 +#elif defined(CONFIG_ARCH_AT91SAM9260) +#include <asm/arch/at91sam9260.h> +#define AT91_ID_TC0 AT91SAM9260_ID_TC0 +#define AT91_ID_TC1 AT91SAM9260_ID_TC1 +#define AT91_ID_TC2 AT91SAM9260_ID_TC2 +#elif defined(CONFIG_ARCH_AT91SAM9261) +#include <asm/arch/at91sam9261.h> +#define AT91_ID_TC0 AT91SAM9261_ID_TC0 +#define AT91_ID_TC1 AT91SAM9261_ID_TC1 +#define AT91_ID_TC2 AT91SAM9261_ID_TC2 +#else +#error "Unsupported AT91 processor" +#endif + +#ifdef CONFIG_NO_IDLE_HZ +#error "dynamic tick timer not yet supported with IPIPE" +#endif /* CONFIG_NO_IDLE_HZ */ + +#define TCNXCNS(timer,v) ((v) << ((timer)<<1)) +#define AT91_TC_REG_MASK (0xffff) + +#if (CONFIG_IPIPE_AT91_TC==0) +# define KERNEL_TIMER_IRQ_NUM AT91_ID_TC0 +#elif (CONFIG_IPIPE_AT91_TC==1) +# define KERNEL_TIMER_IRQ_NUM AT91_ID_TC1 +#elif (CONFIG_IPIPE_AT91_TC==2) +# define KERNEL_TIMER_IRQ_NUM AT91_ID_TC2 +#else +#error IPIPE_AT91_TC must be 0, 1 or 2. +#endif + +static inline unsigned int at91_tc_read(unsigned int reg_offset) +{ + unsigned long addr = + (AT91_VA_BASE_TCB0 + 0x40 * CONFIG_IPIPE_AT91_TC); + + return readl((void __iomem *)(addr + reg_offset)); +} + +static inline void at91_tc_write(unsigned int reg_offset, unsigned long value) +{ + unsigned long addr = + (AT91_VA_BASE_TCB0 + 0x40 * CONFIG_IPIPE_AT91_TC); + + writel(value, (void __iomem *)(addr + reg_offset)); +} + +#define read_CV() at91_tc_read(AT91_TC_CV) +#define read_RC() at91_tc_read(AT91_TC_RC) +#define write_RC(value) at91_tc_write(AT91_TC_RC, value) + +int __ipipe_mach_timerint = KERNEL_TIMER_IRQ_NUM; +EXPORT_SYMBOL(__ipipe_mach_timerint); + +int __ipipe_mach_timerstolen = 0; +EXPORT_SYMBOL(__ipipe_mach_timerstolen); + +unsigned int __ipipe_mach_ticks_per_jiffy = LATCH; +EXPORT_SYMBOL(__ipipe_mach_ticks_per_jiffy); + +static int at91_timer_initialized; +#endif /* CONFIG_IPIPE */ #define PIT_CPIV(x) ((x) & AT91_PIT_CPIV) #define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20) +#ifndef CONFIG_IPIPE /* * Returns number of microseconds since last timer interrupt. Note that interrupts * will have been disabled by do_gettimeofday() @@ -112,3 +189,209 @@ struct sys_timer at91sam926x_timer = { .resume = at91sam926x_timer_reset, }; +#else /* CONFIG_IPIPE */ + +/* + * Returns number of microseconds since last timer interrupt. Note that interrupts + * will have been disabled by do_gettimeofday() + * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy. +* 'tick' is usecs per jiffy (linux/timex.h). + */ +static unsigned long at91sam926x_gettimeoffset(void) +{ + unsigned long elapsed; + + elapsed = (read_CV() - last_crtr) & AT91_TC_REG_MASK; + + return (unsigned long) (elapsed * (tick_nsec / 1000)) / LATCH; +} + +void __ipipe_mach_acktimer(void) +{ + at91_tc_read(AT91_TC_SR); +} + +/* + * IRQ handler for the timer. + */ +static irqreturn_t at91sam926x_timer_interrupt(int irq, void *dev_id) +{ + /* + * - if Linux is running under ipipe, but it still has the control over + * the timer (no Xenomai for example), then reprogram the timer (ipipe + * has already acked it) + * - if some other domain has taken over the timer, then do nothing + * (ipipe has acked it, and the other domain has reprogramed it) + */ + + write_seqlock(&xtime_lock); + + if (__ipipe_mach_timerstolen) { + timer_tick(); + last_crtr = (last_crtr + LATCH) & AT91_TC_REG_MASK; + } else { + while (((read_CV() - last_crtr) & AT91_TC_REG_MASK) >= LATCH) { + timer_tick(); + last_crtr = (last_crtr + LATCH) & AT91_TC_REG_MASK; + } + write_RC((last_crtr + LATCH) & AT91_TC_REG_MASK); + } + + write_sequnlock(&xtime_lock); + + return IRQ_HANDLED; +} + +static irqreturn_t at91sam926x_bad_freq(int irq, void *dev_id) +{ + static int ticks = 0; + + if (++ticks != HZ * 120) { + if (!console_drivers || try_acquire_console_sem()) + return at91sam926x_timer_interrupt(irq, dev_id); + + release_console_sem(); + } + + panic("AT91 clock rate incorrectly set.\n" + "Please recompile with IPIPE_AT91_MCK set to %lu Hz.", + clk_get_rate(clk_get(NULL, "mck"))); +} + +notrace unsigned long long __ipipe_mach_get_tsc(void) +{ + if (likely(at91_timer_initialized)) { + static union { +#ifdef __BIG_ENDIAN + struct { + unsigned long high; + unsigned short mid; + unsigned short low; + }; +#else /* __LITTLE_ENDIAN */ + struct { + unsigned short low; + unsigned short mid; + unsigned long high; + }; +#endif /* __LITTLE_ENDIAN */ + unsigned long long full; + } tsc[NR_CPUS], *local_tsc; + unsigned long long result; + unsigned short stamp; + unsigned long flags; + + local_irq_save_hw(flags); + local_tsc = &tsc[ipipe_processor_id()]; + stamp = read_CV(); + if (unlikely(stamp < local_tsc->low)) { + if (unlikely(!++local_tsc->mid)) + /* 32 bit counter wrapped, increment high word. */ + local_tsc->high++; + } + local_tsc->low = stamp; + result = local_tsc->full; + local_irq_restore_hw(flags); + + return result; + } + + return 0; +} +EXPORT_SYMBOL(__ipipe_mach_get_tsc); + +/* + * Reprogram the timer + */ + +void __ipipe_mach_set_dec(unsigned long delay) +{ + unsigned long flags; + + if (delay > 2) { + local_irq_save_hw(flags); + write_RC((read_CV() + delay) & AT91_TC_REG_MASK); + local_irq_restore_hw(flags); + } else + ipipe_trigger_irq(KERNEL_TIMER_IRQ_NUM); +} +EXPORT_SYMBOL(__ipipe_mach_set_dec); + +void __ipipe_mach_release_timer(void) +{ + __ipipe_mach_set_dec(__ipipe_mach_ticks_per_jiffy); +} +EXPORT_SYMBOL(__ipipe_mach_release_timer); + +unsigned long __ipipe_mach_get_dec(void) +{ + return (read_RC() - read_CV()) & AT91_TC_REG_MASK; +} + +static struct irqaction at91sam926x_timer_irq = { + .name = "at91_tick", + .flags = IRQF_DISABLED | IRQF_TIMER, + .handler = &at91sam926x_timer_interrupt +}; + +static char clk_name [] = "tc%"; + +static struct clk tc = { + .name = (const char *) clk_name, + .users = 0, + .type = CLK_TYPE_PERIPHERAL, + .pmc_mask = 1 << (KERNEL_TIMER_IRQ_NUM), +}; + +void __init at91sam926x_timer_init(void) +{ + unsigned long v; + + if (clk_get_rate(clk_get(NULL, "mck")) != CONFIG_IPIPE_AT91_MCK) + at91sam926x_timer_irq.handler = &at91sam926x_bad_freq; + + snprintf(clk_name, sizeof(clk_name), "tc%d", CONFIG_IPIPE_AT91_TC); + clk_register(&tc); + clk_enable(&tc); + + /* No Sync. */ + at91_tc_write(AT91_TC_BCR, 0); + + /* program NO signal on XCN */ + v = readl((void __iomem *) (AT91_VA_BASE_TCB0 + AT91_TC_BMR)); + v &= ~TCNXCNS(CONFIG_IPIPE_AT91_TC, 3); + v |= TCNXCNS(CONFIG_IPIPE_AT91_TC, 1); /* AT91_TC_TCNXCNS_NONE */ + writel(v, (void __iomem *) (AT91_VA_BASE_TCB0 + AT91_TC_BMR)); + + /* Disable the channel */ + at91_tc_write(AT91_TC_CCR, AT91_TC_CLKDIS); + + /* Select TIMER_CLOCK3 (MCLK/32) as input frequency for TC. */ + at91_tc_write(AT91_TC_CMR, AT91_TC_TIMER_CLOCK3); + + /* Disable all interrupts. */ + at91_tc_write(AT91_TC_IDR, ~0ul); + + /* Load the TC register C. */ + last_crtr = 0; + write_RC(LATCH); + + /* Enable CPCS interrupt. */ + at91_tc_write(AT91_TC_IER, AT91_TC_CPCS); + + /* Set up the interrupt. */ + setup_irq(KERNEL_TIMER_IRQ_NUM, &at91sam926x_timer_irq); + + /* Enable the channel. */ + at91_tc_write(AT91_TC_CCR, AT91_TC_CLKEN | AT91_TC_SWTRG); + + at91_timer_initialized = 1; +} + +struct sys_timer at91sam926x_timer = { + .init = at91sam926x_timer_init, + .offset = at91sam926x_gettimeoffset, + .suspend = NULL, + .resume = NULL, +}; +#endif /* CONFIG_IPIPE */ diff -aurdpbB -X nodiff linux-2.6.19.at91/arch/arm/mach-at91rm9200/Kconfig linux-2.6.19.patched/arch/arm/mach-at91rm9200/Kconfig --- linux-2.6.19.at91/arch/arm/mach-at91rm9200/Kconfig 2007-04-20 14:39:20.000000000 +0200 +++ linux-2.6.19.patched/arch/arm/mach-at91rm9200/Kconfig 2007-04-18 13:53:42.000000000 +0200 @@ -84,24 +84,6 @@ config MACH_KAFA help Select this if you are using Sperry-Sun's KAFA board. -config IPIPE_AT91_TC - depends on IPIPE - int "AT91 TC used as time base" - default 0 - help - When Adeos interrupt pipeline is enabled, TC0 is used by default - as time base, but you can use TC1 or TC2 by setting this variable to 1 - or 2. This should only be needed to avoid conflicts with other drivers. - -config IPIPE_AT91_MCK - depends on IPIPE - int "AT91 Master clock Frequency" - default 46080000 - help - When Adeos interrupt pipeline is enabled, AT91 timer is based on - the AT91 master clock, whose frequency need hence to be known at - compilation time. - endif # ---------------------------------------------------------- @@ -136,6 +118,38 @@ endif # ---------------------------------------------------------- +if ARCH_AT91 + +comment "Ipipe dependent" + +config IPIPE_AT91_TC + depends on IPIPE + int "AT91 TC used as time base" + default 0 + help + When Adeos interrupt pipeline is enabled, TC0 is used by default + as time base, but you can use TC1 or TC2 by setting this variable to 1 + or 2. This should only be needed to avoid conflicts with other drivers. + At the moment, Adeos/I-Pipe has only been implemented for AT91RM9200, + AT91SAM9261 and AT91SAM9260 processors. + +config IPIPE_AT91_MCK + depends on IPIPE + int "AT91 Master clock Frequency" + default 59904000 if MACH_AT91RM9200EK + default 99328000 if MACH_AT91SAM9260EK || MACH_AT91SAM9261EK + default 53000000 + help + When Adeos interrupt pipeline is enabled, AT91 timer is based on + the AT91 master clock, whose frequency need hence to be known at + compilation time. + At the moment, Adeos/I-Pipe has only been implemented for AT91RM9200, + AT91SAM9261 and AT91SAM9260 processors. + +endif + +# ---------------------------------------------------------- + comment "AT91 Board Options" config MTD_AT91_DATAFLASH_CARD Seulement dans linux-2.6.19.patched/include/asm-arm: arch diff -aurdpbB -X nodiff linux-2.6.19.at91/include/asm-arm/arch-at91rm9200/hardware.h linux-2.6.19.patched/include/asm-arm/arch-at91rm9200/hardware.h --- linux-2.6.19.at91/include/asm-arm/arch-at91rm9200/hardware.h 2007-04-20 14:44:01.000000000 +0200 +++ linux-2.6.19.patched/include/asm-arm/arch-at91rm9200/hardware.h 2007-04-18 13:54:48.000000000 +0200 @@ -43,8 +43,17 @@ */ #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) #define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC) + #ifdef CONFIG_IPIPE -#define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91RM9200_BASE_TCB0) +#if defined(CONFIG_ARCH_AT91RM9200) + #define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91RM9200_BASE_TCB0) +#elif defined(CONFIG_ARCH_AT91SAM9260) + #define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91SAM9260_BASE_TCB0) +#elif defined(CONFIG_ARCH_AT91SAM9261) + #define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91SAM9261_BASE_TCB0) +#else +#error "Unsupported AT91 processor" +#endif #endif /* CONFIG_IPIPE */ /* Internal SRAM is mapped below the IO devices */ diff -aurdpbB -X nodiff linux-2.6.19.at91/include/asm-arm/arch-at91rm9200/irqs.h linux-2.6.19.patched/include/asm-arm/arch-at91rm9200/irqs.h --- linux-2.6.19.at91/include/asm-arm/arch-at91rm9200/irqs.h 2007-04-20 14:39:20.000000000 +0200 +++ linux-2.6.19.patched/include/asm-arm/arch-at91rm9200/irqs.h 2007-04-18 13:51:16.000000000 +0200 @@ -44,8 +44,19 @@ #if defined(CONFIG_IPIPE) && !defined(__ASSEMBLY__) extern unsigned __ipipe_at91_gpio_banks; -#define __ipipe_mach_irq_mux_p(irq) \ +#if defined(CONFIG_ARCH_AT91RM9200) + #define __ipipe_mach_irq_mux_p(irq) \ ((unsigned) (irq - AT91RM9200_ID_PIOA) < __ipipe_at91_gpio_banks) +#elif defined(CONFIG_ARCH_AT91SAM9260) + #define __ipipe_mach_irq_mux_p(irq) \ + ((unsigned) (irq - AT91SAM9260_ID_PIOA) < __ipipe_at91_gpio_banks) +#elif defined(CONFIG_ARCH_AT91SAM9261) + #define __ipipe_mach_irq_mux_p(irq) \ + ((unsigned) (irq - AT91SAM9261_ID_PIOA) < __ipipe_at91_gpio_banks) +#else +#error "Unsupported AT91 processor" +#endif + #endif /* CONFIG_IPIPE && !__ASSEMBLY__ */ diff -aurdpbB -X nodiff linux-2.6.19.at91/include/asm-arm/arch-at91rm9200/timex.h linux-2.6.19.patched/include/asm-arm/arch-at91rm9200/timex.h --- linux-2.6.19.at91/include/asm-arm/arch-at91rm9200/timex.h 2007-04-20 14:39:20.000000000 +0200 +++ linux-2.6.19.patched/include/asm-arm/arch-at91rm9200/timex.h 2007-04-18 14:55:16.000000000 +0200 @@ -23,19 +23,23 @@ #include <asm/hardware.h> +#ifndef CONFIG_IPIPE + #if defined(CONFIG_ARCH_AT91RM9200) -#ifndef CONFIG_IPIPE #define CLOCK_TICK_RATE (AT91_SLOW_CLOCK) -#else /* !CONFIG_IPIPE */ -#define CLOCK_TICK_RATE (CONFIG_IPIPE_AT91_MCK / 32) -#endif /* !CONFIG_IPIPE */ #elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9261) #define AT91SAM9_MASTER_CLOCK 99300000 #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) -#endif +#endif /* arch specific */ + +#else /* !CONFIG_IPIPE */ + +#define CLOCK_TICK_RATE (CONFIG_IPIPE_AT91_MCK / 32) + +#endif /* !CONFIG_IPIPE */ #endif ^ permalink raw reply [flat|nested] 6+ messages in thread
[parent not found: <403B28AE6257B548B66BB88414AC78330174BBD8@domain.hid>]
* Re: [Adeos-main] New patch for AT91SAM9261 adeos support for 2.6.19 kernel [not found] <403B28AE6257B548B66BB88414AC78330174BBD8@domain.hid> @ 2007-04-20 15:21 ` BOUIN Alexandre 2007-04-20 15:27 ` Gilles Chanteperdrix 0 siblings, 1 reply; 6+ messages in thread From: BOUIN Alexandre @ 2007-04-20 15:21 UTC (permalink / raw) To: adeos-main The clock settings of the AT91SAM9261-EK board I am using, displayed by the kernel are: Clocks: Clocks: CPU 198 MHz, master 99 MHz, main 18.432 MHz Running a 2.6.19 I-pipe kernel, setting the nucleus latency (/proc/xenomai/latency) to 323us, I get a worst case latency of 231 us over 6 hours, under dd if=/dev/zero of=/dev/null load. Histogramm has been shortened. Next time I will add the parameter "-H 500" to increase histogramm size. Here are the latency histogram results. ---|--param|----range-|--samples HSD| min| 34 - 35 | 1 HSD| min| 35 - 36 | 4 HSD| min| 36 - 37 | 8 HSD| min| 37 - 38 | 13 HSD| min| 38 - 39 | 34 HSD| min| 39 - 40 | 27 HSD| min| 40 - 41 | 40 HSD| min| 41 - 42 | 57 HSD| min| 42 - 43 | 87 HSD| min| 43 - 44 | 168 HSD| min| 44 - 45 | 594 HSD| min| 45 - 46 | 2808 HSD| min| 46 - 47 | 7334 HSD| min| 47 - 48 | 7966 HSD| min| 48 - 49 | 3047 HSD| min| 49 - 50 | 125 HSD| min| 50 - 51 | 5 HSD| min| 73 - 74 | 1 ---|--param|----range-|--samples HSD| avg| 34 - 35 | 1 HSD| avg| 35 - 36 | 4 HSD| avg| 36 - 37 | 8 HSD| avg| 37 - 38 | 13 HSD| avg| 38 - 39 | 34 HSD| avg| 39 - 40 | 27 HSD| avg| 40 - 41 | 40 HSD| avg| 41 - 42 | 57 HSD| avg| 42 - 43 | 87 HSD| avg| 43 - 44 | 168 HSD| avg| 44 - 45 | 608 HSD| avg| 45 - 46 | 3032 HSD| avg| 46 - 47 | 9985 HSD| avg| 47 - 48 | 20644 HSD| avg| 48 - 49 | 38564 HSD| avg| 49 - 50 | 38041 HSD| avg| 50 - 51 | 41848 HSD| avg| 51 - 52 | 36631 HSD| avg| 52 - 53 | 34410 HSD| avg| 53 - 54 | 37510 HSD| avg| 54 - 55 | 40837 HSD| avg| 55 - 56 | 38238 HSD| avg| 56 - 57 | 30134 HSD| avg| 57 - 58 | 27623 HSD| avg| 58 - 59 | 11770 HSD| avg| 59 - 60 | 6833 HSD| avg| 60 - 61 | 4652 HSD| avg| 61 - 62 | 3958 HSD| avg| 62 - 63 | 3773 HSD| avg| 63 - 64 | 3456 HSD| avg| 64 - 65 | 3048 HSD| avg| 65 - 66 | 2725 HSD| avg| 66 - 67 | 2462 HSD| avg| 67 - 68 | 3107 HSD| avg| 68 - 69 | 2961 HSD| avg| 69 - 70 | 7184 HSD| avg| 70 - 71 | 8252 HSD| avg| 71 - 72 | 8291 HSD| avg| 72 - 73 | 6977 HSD| avg| 73 - 74 | 37251 HSD| avg| 74 - 75 | 64192 HSD| avg| 75 - 76 | 11019 HSD| avg| 76 - 77 | 21165 HSD| avg| 77 - 78 | 43915 HSD| avg| 78 - 79 | 70855 HSD| avg| 79 - 80 | 129983 HSD| avg| 80 - 81 | 280648 HSD| avg| 81 - 82 | 388961 HSD| avg| 82 - 83 | 287156 HSD| avg| 83 - 84 | 133873 HSD| avg| 84 - 85 | 52948 HSD| avg| 85 - 86 | 1175229 HSD| avg| 86 - 87 | 43142254 HSD| avg| 87 - 88 | 19364608 HSD| avg| 88 - 89 | 2609775 HSD| avg| 89 - 90 | 57806 HSD| avg| 90 - 91 | 14457 HSD| avg| 91 - 92 | 20810 HSD| avg| 92 - 93 | 30672 HSD| avg| 93 - 94 | 8841 HSD| avg| 94 - 95 | 1762 HSD| avg| 95 - 96 | 1896 HSD| avg| 96 - 97 | 34505 HSD| avg| 97 - 98 | 38357 HSD| avg| 98 - 99 | 19627 HSD| avg| 99 -100 | 558554 ---|--param|----range-|--samples HSD| max| 99 -100 | 22319 HSH|--param|--samples-|--average--|---stddev-- HSS| min| 22319| 46.376| 1.268 HSS| avg| 69079112| 23.945| 62.257 HSS| max| 22319| 99.000| 0.000 ---|------------|------------|------------|--------|------------------------- RTS| 34.793| 86.662| 230.992| 0| 06:11:40/06:11:40 -- Alexandre BOUIN Adeneo 2, chemin du Ruisseau - BP21 69136 Ecully Cedex France Tel : +33-4 72 18 08 40 ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Adeos-main] New patch for AT91SAM9261 adeos support for 2.6.19 kernel 2007-04-20 15:21 ` BOUIN Alexandre @ 2007-04-20 15:27 ` Gilles Chanteperdrix 0 siblings, 0 replies; 6+ messages in thread From: Gilles Chanteperdrix @ 2007-04-20 15:27 UTC (permalink / raw) To: BOUIN Alexandre; +Cc: adeos-main BOUIN Alexandre wrote: > The clock settings of the AT91SAM9261-EK board I am using, displayed by the > kernel are: > Clocks: Clocks: CPU 198 MHz, master 99 MHz, main 18.432 MHz > > Running a 2.6.19 I-pipe kernel, setting the nucleus latency > (/proc/xenomai/latency) to 323us It is a high. You should get plenty of negative values. >, I get a worst case latency of 231 us What is your kernel configuration, do not you have some statistics/debug options enabled ? -- Gilles Chanteperdrix ^ permalink raw reply [flat|nested] 6+ messages in thread
* [Adeos-main] New patch for AT91SAM9261 adeos support for 2.6.19 kernel
@ 2007-04-20 14:01 Gregory CLEMENT
0 siblings, 0 replies; 6+ messages in thread
From: Gregory CLEMENT @ 2007-04-20 14:01 UTC (permalink / raw)
To: adeos-main, BOUIN Alexandre, Gilles Chanteperdrix
[-- Attachment #1: Type: text/plain, Size: 661 bytes --]
Hi,
this is the new version of patch support for AT91SAM9261.
To use it:
- take a vanilla linux
- apply the I-pipe patch
- apply the AT91 patch, then solve the three rejects by hand
- finaly apply this patch
Comment from Gilles are integrated.
As I have no better idea we keep all the ifdef around
AT91_VA_BASE_TCB0 ( in include/asm-arm/arch-at91rm9200/hardware.h)
and around __ipipe_mach_irq_mux_p ( in
include/asm-arm/arch-at91rm9200/irqs.h )
Latency under load are running on AT91SAM9261-EK board, we will send
the histogramm later this afternoon.
--
Gregory CLEMENT
Adeneo
2, chemin du Ruisseau - BP21
69136 Ecully Cedex
France
Tel : +33-4 72 18 08 40
[-- Attachment #2: adeos-ipipe-2.6.19-arm-AT91SAM9261.patch --]
[-- Type: text/x-patch, Size: 15339 bytes --]
diff -aurdpbB -X nodiff linux-2.6.19.at91/arch/arm/mach-at91rm9200/at91sam9261.c linux-2.6.19.patched/arch/arm/mach-at91rm9200/at91sam9261.c
--- linux-2.6.19.at91/arch/arm/mach-at91rm9200/at91sam9261.c 2007-04-10 08:04:00.000000000 +0200
+++ linux-2.6.19.patched/arch/arm/mach-at91rm9200/at91sam9261.c 2007-04-18 13:51:16.000000000 +0200
@@ -27,6 +27,13 @@ static struct map_desc at91sam9261_io_de
.length = SZ_16K,
.type = MT_DEVICE,
}, {
+#ifdef CONFIG_IPIPE
+ .virtual = AT91_VA_BASE_TCB0,
+ .pfn = __phys_to_pfn(AT91SAM9261_BASE_TCB0),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+#endif /* CONFIG_IPIPE */
.virtual = AT91_IO_VIRT_BASE - AT91SAM9261_SRAM_SIZE,
.pfn = __phys_to_pfn(AT91SAM9261_SRAM_BASE),
.length = AT91SAM9261_SRAM_SIZE,
@@ -242,6 +249,7 @@ void __init at91sam9261_initialize(unsig
* The default interrupt priority levels (0 = lowest, 7 = highest).
*/
static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = {
+#ifndef CONFIG_IPIPE
7, /* Advanced Interrupt Controller */
7, /* System Peripherals */
0, /* Parallel IO Controller A */
@@ -274,6 +282,42 @@ static unsigned int at91sam9261_default_
0, /* Advanced Interrupt Controller */
0, /* Advanced Interrupt Controller */
0, /* Advanced Interrupt Controller */
+#else /* CONFIG_IPIPE */
+/* Give the highest priority to TC, since they are used as timer interrupt by
+ I-pipe. */
+ 7, /* Advanced Interrupt Controller */
+ 7, /* System Peripherals */
+ 0, /* Parallel IO Controller A */
+ 0, /* Parallel IO Controller B */
+ 0, /* Parallel IO Controller C */
+ 0,
+ 6, /* USART 0 */
+ 6, /* USART 1 */
+ 6, /* USART 2 */
+ 0, /* Multimedia Card Interface */
+ 4, /* USB Device Port */
+ 0, /* Two-Wire Interface */
+ 6, /* Serial Peripheral Interface 0 */
+ 6, /* Serial Peripheral Interface 1 */
+ 5, /* Serial Synchronous Controller 0 */
+ 5, /* Serial Synchronous Controller 1 */
+ 5, /* Serial Synchronous Controller 2 */
+ 7, /* Timer Counter 0 */
+ 7, /* Timer Counter 1 */
+ 7, /* Timer Counter 2 */
+ 3, /* USB Host port */
+ 3, /* LCD Controller */
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0, /* Advanced Interrupt Controller */
+ 0, /* Advanced Interrupt Controller */
+ 0, /* Advanced Interrupt Controller */
+#endif /*CONFIG_IPIPE */
};
void __init at91sam9261_init_interrupts(unsigned int priority[NR_AIC_IRQS])
diff -aurdpbB -X nodiff linux-2.6.19.at91/arch/arm/mach-at91rm9200/at91sam926x_time.c linux-2.6.19.patched/arch/arm/mach-at91rm9200/at91sam926x_time.c
--- linux-2.6.19.at91/arch/arm/mach-at91rm9200/at91sam926x_time.c 2007-04-10 08:04:00.000000000 +0200
+++ linux-2.6.19.patched/arch/arm/mach-at91rm9200/at91sam926x_time.c 2007-04-18 13:51:16.000000000 +0200
@@ -22,10 +22,69 @@
#include <asm/arch/at91_pit.h>
+static unsigned long last_crtr;
+
+#ifdef CONFIG_IPIPE
+#include <linux/clk.h>
+#include <linux/console.h>
+#include <linux/module.h>
+#include <asm/arch/at91sam9261.h>
+#include <asm/arch/at91_tc.h>
+#include "clock.h"
+
+#ifdef CONFIG_NO_IDLE_HZ
+#error "dynamic tick timer not yet supported with IPIPE"
+#endif /* CONFIG_NO_IDLE_HZ */
+
+#define TCNXCNS(timer,v) ((v) << ((timer)<<1))
+#define AT91_TC_REG_MASK (0xffff)
+
+#if (CONFIG_IPIPE_AT91_TC==0)
+# define KERNEL_TIMER_IRQ_NUM AT91SAM9261_ID_TC0
+#elif (CONFIG_IPIPE_AT91_TC==1)
+# define KERNEL_TIMER_IRQ_NUM AT91SAM9261_ID_TC1
+#elif (CONFIG_IPIPE_AT91_TC==2)
+# define KERNEL_TIMER_IRQ_NUM AT91SAM9261_ID_TC2
+#else
+#error IPIPE_AT91_TC must be 0, 1 or 2.
+#endif
+
+static inline unsigned int at91_tc_read(unsigned int reg_offset)
+{
+ unsigned long addr =
+ (AT91_VA_BASE_TCB0 + 0x40 * CONFIG_IPIPE_AT91_TC);
+
+ return readl((void __iomem *)(addr + reg_offset));
+}
+
+static inline void at91_tc_write(unsigned int reg_offset, unsigned long value)
+{
+ unsigned long addr =
+ (AT91_VA_BASE_TCB0 + 0x40 * CONFIG_IPIPE_AT91_TC);
+
+ writel(value, (void __iomem *)(addr + reg_offset));
+}
+
+#define read_CV() at91_tc_read(AT91_TC_CV)
+#define read_RC() at91_tc_read(AT91_TC_RC)
+#define write_RC(value) at91_tc_write(AT91_TC_RC, value)
+
+int __ipipe_mach_timerint = KERNEL_TIMER_IRQ_NUM;
+EXPORT_SYMBOL(__ipipe_mach_timerint);
+
+int __ipipe_mach_timerstolen = 0;
+EXPORT_SYMBOL(__ipipe_mach_timerstolen);
+
+unsigned int __ipipe_mach_ticks_per_jiffy = LATCH;
+EXPORT_SYMBOL(__ipipe_mach_ticks_per_jiffy);
+
+static int at91_timer_initialized;
+#endif /* CONFIG_IPIPE */
#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
#define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20)
+#ifndef CONFIG_IPIPE
/*
* Returns number of microseconds since last timer interrupt. Note that interrupts
* will have been disabled by do_gettimeofday()
@@ -112,3 +171,209 @@ struct sys_timer at91sam926x_timer = {
.resume = at91sam926x_timer_reset,
};
+#else /* CONFIG_IPIPE */
+
+/*
+ * Returns number of microseconds since last timer interrupt. Note that interrupts
+ * will have been disabled by do_gettimeofday()
+ * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
+* 'tick' is usecs per jiffy (linux/timex.h).
+ */
+static unsigned long at91sam926x_gettimeoffset(void)
+{
+ unsigned long elapsed;
+
+ elapsed = (read_CV() - last_crtr) & AT91_TC_REG_MASK;
+
+ return (unsigned long) (elapsed * (tick_nsec / 1000)) / LATCH;
+}
+
+void __ipipe_mach_acktimer(void)
+{
+ at91_tc_read(AT91_TC_SR);
+}
+
+/*
+ * IRQ handler for the timer.
+ */
+static irqreturn_t at91sam926x_timer_interrupt(int irq, void *dev_id)
+{
+ /*
+ * - if Linux is running under ipipe, but it still has the control over
+ * the timer (no Xenomai for example), then reprogram the timer (ipipe
+ * has already acked it)
+ * - if some other domain has taken over the timer, then do nothing
+ * (ipipe has acked it, and the other domain has reprogramed it)
+ */
+
+ write_seqlock(&xtime_lock);
+
+ if (__ipipe_mach_timerstolen) {
+ timer_tick();
+ last_crtr = (last_crtr + LATCH) & AT91_TC_REG_MASK;
+ } else {
+ while (((read_CV() - last_crtr) & AT91_TC_REG_MASK) >= LATCH) {
+ timer_tick();
+ last_crtr = (last_crtr + LATCH) & AT91_TC_REG_MASK;
+ }
+ write_RC((last_crtr + LATCH) & AT91_TC_REG_MASK);
+ }
+
+ write_sequnlock(&xtime_lock);
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t at91sam926x_bad_freq(int irq, void *dev_id)
+{
+ static int ticks = 0;
+
+ if (++ticks != HZ * 120) {
+ if (!console_drivers || try_acquire_console_sem())
+ return at91sam926x_timer_interrupt(irq, dev_id);
+
+ release_console_sem();
+ }
+
+ panic("AT91 clock rate incorrectly set.\n"
+ "Please recompile with IPIPE_AT91_MCK set to %lu Hz.",
+ clk_get_rate(clk_get(NULL, "mck")));
+}
+
+notrace unsigned long long __ipipe_mach_get_tsc(void)
+{
+ if (likely(at91_timer_initialized)) {
+ static union {
+#ifdef __BIG_ENDIAN
+ struct {
+ unsigned long high;
+ unsigned short mid;
+ unsigned short low;
+ };
+#else /* __LITTLE_ENDIAN */
+ struct {
+ unsigned short low;
+ unsigned short mid;
+ unsigned long high;
+ };
+#endif /* __LITTLE_ENDIAN */
+ unsigned long long full;
+ } tsc[NR_CPUS], *local_tsc;
+ unsigned long long result;
+ unsigned short stamp;
+ unsigned long flags;
+
+ local_irq_save_hw(flags);
+ local_tsc = &tsc[ipipe_processor_id()];
+ stamp = read_CV();
+ if (unlikely(stamp < local_tsc->low)) {
+ if (unlikely(!++local_tsc->mid))
+ /* 32 bit counter wrapped, increment high word. */
+ local_tsc->high++;
+ }
+ local_tsc->low = stamp;
+ result = local_tsc->full;
+ local_irq_restore_hw(flags);
+
+ return result;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(__ipipe_mach_get_tsc);
+
+/*
+ * Reprogram the timer
+ */
+
+void __ipipe_mach_set_dec(unsigned long delay)
+{
+ unsigned long flags;
+
+ if (delay > 2) {
+ local_irq_save_hw(flags);
+ write_RC((read_CV() + delay) & AT91_TC_REG_MASK);
+ local_irq_restore_hw(flags);
+ } else
+ ipipe_trigger_irq(KERNEL_TIMER_IRQ_NUM);
+}
+EXPORT_SYMBOL(__ipipe_mach_set_dec);
+
+void __ipipe_mach_release_timer(void)
+{
+ __ipipe_mach_set_dec(__ipipe_mach_ticks_per_jiffy);
+}
+EXPORT_SYMBOL(__ipipe_mach_release_timer);
+
+unsigned long __ipipe_mach_get_dec(void)
+{
+ return (read_RC() - read_CV()) & AT91_TC_REG_MASK;
+}
+
+static struct irqaction at91sam926x_timer_irq = {
+ .name = "at91_tick",
+ .flags = IRQF_DISABLED | IRQF_TIMER,
+ .handler = &at91sam926x_timer_interrupt
+};
+
+static char clk_name [] = "tc%";
+
+static struct clk tc = {
+ .name = (const char *) clk_name,
+ .users = 0,
+ .type = CLK_TYPE_PERIPHERAL,
+ .pmc_mask = 1 << (KERNEL_TIMER_IRQ_NUM),
+};
+
+void __init at91sam926x_timer_init(void)
+{
+ unsigned long v;
+
+ if (clk_get_rate(clk_get(NULL, "mck")) != CONFIG_IPIPE_AT91_MCK)
+ at91sam926x_timer_irq.handler = &at91sam926x_bad_freq;
+
+ snprintf(clk_name, sizeof(clk_name), "tc%d", CONFIG_IPIPE_AT91_TC);
+ clk_register(&tc);
+ clk_enable(&tc);
+
+ /* No Sync. */
+ at91_tc_write(AT91_TC_BCR, 0);
+
+ /* program NO signal on XCN */
+ v = readl((void __iomem *) (AT91_VA_BASE_TCB0 + AT91_TC_BMR));
+ v &= ~TCNXCNS(CONFIG_IPIPE_AT91_TC, 3);
+ v |= TCNXCNS(CONFIG_IPIPE_AT91_TC, 1); /* AT91_TC_TCNXCNS_NONE */
+ writel(v, (void __iomem *) (AT91_VA_BASE_TCB0 + AT91_TC_BMR));
+
+ /* Disable the channel */
+ at91_tc_write(AT91_TC_CCR, AT91_TC_CLKDIS);
+
+ /* Select TIMER_CLOCK3 (MCLK/32) as input frequency for TC. */
+ at91_tc_write(AT91_TC_CMR, AT91_TC_TIMER_CLOCK3);
+
+ /* Disable all interrupts. */
+ at91_tc_write(AT91_TC_IDR, ~0ul);
+
+ /* Load the TC register C. */
+ last_crtr = 0;
+ write_RC(LATCH);
+
+ /* Enable CPCS interrupt. */
+ at91_tc_write(AT91_TC_IER, AT91_TC_CPCS);
+
+ /* Set up the interrupt. */
+ setup_irq(KERNEL_TIMER_IRQ_NUM, &at91sam926x_timer_irq);
+
+ /* Enable the channel. */
+ at91_tc_write(AT91_TC_CCR, AT91_TC_CLKEN | AT91_TC_SWTRG);
+
+ at91_timer_initialized = 1;
+}
+
+struct sys_timer at91sam926x_timer = {
+ .init = at91sam926x_timer_init,
+ .offset = at91sam926x_gettimeoffset,
+ .suspend = NULL,
+ .resume = NULL,
+};
+#endif /* CONFIG_IPIPE */
diff -aurdpbB -X nodiff linux-2.6.19.at91/arch/arm/mach-at91rm9200/Kconfig linux-2.6.19.patched/arch/arm/mach-at91rm9200/Kconfig
--- linux-2.6.19.at91/arch/arm/mach-at91rm9200/Kconfig 2007-04-20 14:39:20.000000000 +0200
+++ linux-2.6.19.patched/arch/arm/mach-at91rm9200/Kconfig 2007-04-18 13:53:42.000000000 +0200
@@ -84,24 +84,6 @@ config MACH_KAFA
help
Select this if you are using Sperry-Sun's KAFA board.
-config IPIPE_AT91_TC
- depends on IPIPE
- int "AT91 TC used as time base"
- default 0
- help
- When Adeos interrupt pipeline is enabled, TC0 is used by default
- as time base, but you can use TC1 or TC2 by setting this variable to 1
- or 2. This should only be needed to avoid conflicts with other drivers.
-
-config IPIPE_AT91_MCK
- depends on IPIPE
- int "AT91 Master clock Frequency"
- default 46080000
- help
- When Adeos interrupt pipeline is enabled, AT91 timer is based on
- the AT91 master clock, whose frequency need hence to be known at
- compilation time.
-
endif
# ----------------------------------------------------------
@@ -136,6 +118,38 @@ endif
# ----------------------------------------------------------
+if ARCH_AT91
+
+comment "Ipipe dependent"
+
+config IPIPE_AT91_TC
+ depends on IPIPE
+ int "AT91 TC used as time base"
+ default 0
+ help
+ When Adeos interrupt pipeline is enabled, TC0 is used by default
+ as time base, but you can use TC1 or TC2 by setting this variable to 1
+ or 2. This should only be needed to avoid conflicts with other drivers.
+ At the moment, Adeos/I-Pipe has only been implemented for AT91RM9200 and
+ AT91SAM9261 processors.
+
+config IPIPE_AT91_MCK
+ depends on IPIPE
+ int "AT91 Master clock Frequency"
+ default 59904000 if MACH_AT91RM9200EK
+ default 99328000 if MACH_AT91SAM9261EK
+ default 53000000
+ help
+ When Adeos interrupt pipeline is enabled, AT91 timer is based on
+ the AT91 master clock, whose frequency need hence to be known at
+ compilation time.
+ At the moment, Adeos/I-Pipe has only been implemented for AT91RM9200 and
+ AT91SAM9261 processors.
+
+endif
+
+# ----------------------------------------------------------
+
comment "AT91 Board Options"
config MTD_AT91_DATAFLASH_CARD
Seulement dans linux-2.6.19.patched/include/asm-arm: arch
diff -aurdpbB -X nodiff linux-2.6.19.at91/include/asm-arm/arch-at91rm9200/hardware.h linux-2.6.19.patched/include/asm-arm/arch-at91rm9200/hardware.h
--- linux-2.6.19.at91/include/asm-arm/arch-at91rm9200/hardware.h 2007-04-20 14:44:01.000000000 +0200
+++ linux-2.6.19.patched/include/asm-arm/arch-at91rm9200/hardware.h 2007-04-18 13:54:48.000000000 +0200
@@ -43,8 +43,17 @@
*/
#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS)
#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC)
+
#ifdef CONFIG_IPIPE
-#define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91RM9200_BASE_TCB0)
+#if defined(CONFIG_ARCH_AT91RM9200)
+ #define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91RM9200_BASE_TCB0)
+#elif defined(CONFIG_ARCH_AT91SAM9260)
+ #define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91SAM9260_BASE_TCB0)
+#elif defined(CONFIG_ARCH_AT91SAM9261)
+ #define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91SAM9261_BASE_TCB0)
+#else
+#error "Unsupported AT91 processor"
+#endif
#endif /* CONFIG_IPIPE */
/* Internal SRAM is mapped below the IO devices */
diff -aurdpbB -X nodiff linux-2.6.19.at91/include/asm-arm/arch-at91rm9200/irqs.h linux-2.6.19.patched/include/asm-arm/arch-at91rm9200/irqs.h
--- linux-2.6.19.at91/include/asm-arm/arch-at91rm9200/irqs.h 2007-04-20 14:39:20.000000000 +0200
+++ linux-2.6.19.patched/include/asm-arm/arch-at91rm9200/irqs.h 2007-04-18 13:51:16.000000000 +0200
@@ -44,8 +44,19 @@
#if defined(CONFIG_IPIPE) && !defined(__ASSEMBLY__)
extern unsigned __ipipe_at91_gpio_banks;
-#define __ipipe_mach_irq_mux_p(irq) \
+#if defined(CONFIG_ARCH_AT91RM9200)
+ #define __ipipe_mach_irq_mux_p(irq) \
((unsigned) (irq - AT91RM9200_ID_PIOA) < __ipipe_at91_gpio_banks)
+#elif defined(CONFIG_ARCH_AT91SAM9260)
+ #define __ipipe_mach_irq_mux_p(irq) \
+ ((unsigned) (irq - AT91SAM9260_ID_PIOA) < __ipipe_at91_gpio_banks)
+#elif defined(CONFIG_ARCH_AT91SAM9261)
+ #define __ipipe_mach_irq_mux_p(irq) \
+ ((unsigned) (irq - AT91SAM9261_ID_PIOA) < __ipipe_at91_gpio_banks)
+#else
+#error "Unsupported AT91 processor"
+#endif
+
#endif /* CONFIG_IPIPE && !__ASSEMBLY__ */
diff -aurdpbB -X nodiff linux-2.6.19.at91/include/asm-arm/arch-at91rm9200/timex.h linux-2.6.19.patched/include/asm-arm/arch-at91rm9200/timex.h
--- linux-2.6.19.at91/include/asm-arm/arch-at91rm9200/timex.h 2007-04-20 14:39:20.000000000 +0200
+++ linux-2.6.19.patched/include/asm-arm/arch-at91rm9200/timex.h 2007-04-18 14:55:16.000000000 +0200
@@ -23,19 +23,23 @@
#include <asm/hardware.h>
+#ifndef CONFIG_IPIPE
+
#if defined(CONFIG_ARCH_AT91RM9200)
-#ifndef CONFIG_IPIPE
#define CLOCK_TICK_RATE (AT91_SLOW_CLOCK)
-#else /* !CONFIG_IPIPE */
-#define CLOCK_TICK_RATE (CONFIG_IPIPE_AT91_MCK / 32)
-#endif /* !CONFIG_IPIPE */
#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9261)
#define AT91SAM9_MASTER_CLOCK 99300000
#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16)
-#endif
+#endif /* arch specific */
+
+#else /* !CONFIG_IPIPE */
+
+#define CLOCK_TICK_RATE (CONFIG_IPIPE_AT91_MCK / 32)
+
+#endif /* !CONFIG_IPIPE */
#endif
^ permalink raw reply [flat|nested] 6+ messages in threadend of thread, other threads:[~2007-05-03 11:45 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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[not found] <403B28AE6257B548B66BB88414AC78330174BBDE@STEGOSAURE.adetel.com>
2007-04-24 13:14 ` [Adeos-main] New patch for AT91SAM9261 adeos support for 2.6.19 kernel BOUIN Alexandre
2007-04-24 13:26 ` Gilles Chanteperdrix
[not found] <403B28AE6257B548B66BB88414AC78330174BBEA@STEGOSAURE.adetel.com>
2007-05-03 11:45 ` BOUIN Alexandre
[not found] <403B28AE6257B548B66BB88414AC78330174BBD8@domain.hid>
2007-04-20 15:21 ` BOUIN Alexandre
2007-04-20 15:27 ` Gilles Chanteperdrix
2007-04-20 14:01 Gregory CLEMENT
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