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From: "H. Peter Anvin" <hpa@zytor.com>
To: Grant Grundler <grundler@parisc-linux.org>
Cc: Roland Dreier <rdreier@cisco.com>,
	David Miller <davem@davemloft.net>,
	abraham.manu@gmail.com, greg@kroah.com,
	linux-pci@atrey.karlin.mff.cuni.cz, linux-kernel@vger.kernel.org
Subject: Re: PCIE
Date: Sun, 27 May 2007 22:23:14 -0700	[thread overview]
Message-ID: <465A6742.4090903@zytor.com> (raw)
In-Reply-To: <20070528041802.GB711@colo.lackof.org>

Grant Grundler wrote:
> On Sun, May 27, 2007 at 06:03:29PM -0700, Roland Dreier wrote:
> ...
>>  > I can imagine many systems where the cpu simply doesn't have enough
>>  > interrupt pins to uniquely identify every possible MSI interrupt
>>  > source.
>>
>> I have a hard time imagining a PCI host bus controller that converts
>> MSI interrupts back to wire interrupts that go to pins on the CPU.
>> For one thing it would be hard to maintain the guarantee that
>> MSI interrupts can't pass DMAs.
> 
> Whatever converts the MSI back to CPU IRQ pins would have to participate
> in the "cache coherency domain". This would avoid issues around DMA ordering.
> It _could_ be on the same silicon as the PCI Host bus controller as long
> as the above is true.
> 

Also, don't forget that a lot of platforms provide *no* hardware cache
coherency.

	-hpa

  reply	other threads:[~2007-05-28  5:25 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-05-23 12:15 PCIE Manu Abraham
2007-05-23 15:59 ` PCIE Greg KH
2007-05-23 20:59   ` PCIE Manu Abraham
2007-05-23 21:10     ` PCIE Roland Dreier
2007-05-23 22:11       ` PCIE Manu Abraham
2007-05-23 22:23         ` PCIE Roland Dreier
2007-05-23 23:03           ` PCIE Manu Abraham
2007-05-23 23:51             ` PCIE Roland Dreier
2007-05-24  0:07               ` PCIE Manu Abraham
2007-05-24 22:32               ` PCIE Manu Abraham
2007-05-25  3:25                 ` PCIE Roland Dreier
2007-05-26 15:03                   ` PCIE Manu Abraham
2007-05-26 18:28                     ` PCIE Grant Grundler
2007-05-26 19:27                       ` PCIE Manu Abraham
2007-05-28  1:15                         ` PCIE Roland Dreier
2007-05-28  1:25                           ` PCIE Manu Abraham
2007-05-28  2:04                           ` PCIE Manu Abraham
2007-05-28  2:24                             ` PCIE Roland Dreier
2007-05-28  2:47                               ` PCIE Manu Abraham
2007-05-26 22:49                     ` PCIE David Miller
2007-05-26 22:57                       ` PCIE Manu Abraham
2007-05-26 23:55                       ` PCIE Grant Grundler
2007-05-27  0:00                         ` PCIE David Miller
2007-05-27  0:16                           ` PCIE Grant Grundler
2007-05-27  0:30                             ` PCIE David Miller
2007-05-27  1:01                               ` PCIE Manu Abraham
2007-05-27  1:49                                 ` PCIE Grant Grundler
2007-05-27 20:28                                   ` PCIE Manu Abraham
2007-05-28  1:10                           ` PCIE Roland Dreier
2007-05-27  2:34                       ` PCIE H. Peter Anvin
2007-05-27  7:40                         ` PCIE David Miller
2007-05-27 20:31                           ` PCIE Manu Abraham
2007-05-28  1:05                         ` PCIE Roland Dreier
2007-05-28  1:03                       ` PCIE Roland Dreier
2007-05-28  2:54                         ` PCIE David Miller
2007-05-28  4:18                         ` PCIE Grant Grundler
2007-05-28  5:23                           ` H. Peter Anvin [this message]
2007-05-28  5:22                         ` PCIE H. Peter Anvin

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