From: John Byrne <john.l.byrne@hp.com>
To: Guy Zana <guy@neocleus.com>
Cc: xen-devel@lists.xensource.com
Subject: Re: [RFC][PATCH 0/6] HVM PCI Passthrough (non-IOMMU)
Date: Thu, 07 Jun 2007 19:53:28 -0700 [thread overview]
Message-ID: <4668C4A8.4000208@hp.com> (raw)
In-Reply-To: <9392A06CB0FDC847B3A530B3DC174E7B02A95EDA@mse10be1.mse10.exchange.ms>
Guy,
I tried your patches with a bnx2 NIC on SLES10 and they didn't work.
The first reason was that you mask off the capabilities bit in the PCI
status. If I got rid of this, I could at least get the NIC to configure,
but it didn't work and the dropped packets looked to be random garbage,
so I don't think it was talking to the device properly. (But I
understand almost nothing about PCI device configuration, so I don't
know what to look for.)
I haven't noticed the merge tree springing into existence into on
xenbits, so is there any progress on making into a real feature? It
sounds like most of the work needs to be done between you and Intel, but
I could certainly help with testing.
One thing I am interested in is, with the 1:1 mapping, could we disable
the VT page-fault handling? I've found that the page-fault overhead for
VT is horrible and would probably affect fork-exec benchmarks significantly.
Thanks,
John Byrne
next prev parent reply other threads:[~2007-06-08 2:53 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-05-31 23:04 [RFC][PATCH 0/6] HVM PCI Passthrough (non-IOMMU) Guy Zana
2007-06-08 2:53 ` John Byrne [this message]
2007-06-08 18:23 ` Guy Zana
2007-06-09 2:25 ` John Byrne
2007-06-09 5:55 ` Guy Zana
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