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From: Nick Piggin <nickpiggin@yahoo.com.au>
To: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: "linux-ia64@vger.kernel.org" <linux-ia64@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>,
	"tony.luck@intel.com" <tony.luck@intel.com>,
	"linux-mm@kvack.org" <linux-mm@kvack.org>,
	Christoph Lameter <clameter@sgi.com>,
	Mike.stroya@hp.com, GOTO <y-goto@jp.fujitsu.com>,
	dmosberger@gmail.com, hugh@veritas.com
Subject: Re: [BUGFIX][PATCH] DO flush icache before set_pte() on ia64.
Date: Thu, 05 Jul 2007 04:29:41 +0000	[thread overview]
Message-ID: <468C73B5.1050405@yahoo.com.au> (raw)
In-Reply-To: <20070705125427.9a3b8e8b.kamezawa.hiroyu@jp.fujitsu.com>

KAMEZAWA Hiroyuki wrote:
> On Thu, 05 Jul 2007 13:19:41 +1000
> Nick Piggin <nickpiggin@yahoo.com.au> wrote:
> 
> 
>>>>From what I can work out, it is something like "at this point the page
>>>>should be uptodate, so at least the icache won't contain *inconsistent*
>>>>data, just old data which userspace should take care of flushing if it
>>>>modifies". Is that always true?
>>>
>>> 
>>>I think it's true. But, in this case, i-cache doesn't contain *incositent* data.
>>>There are inconsistency between L2-Dcache and L3-mixed-cache. At L2-icache-miss,
>>>a cpu fetches data from L3 cache.
>>>This case seems defficult to be generalized...
>>
>>If there is something in the icache line that isn't the last data to
>>be stored at that address, isn't that inconsistent?
>>
> 
> Hmm..do we have a chance to add do_flush_cache_if_not_filled_by_dma(page)
> before SetPageUptodate(page) ?

Well you shouldn't strictly need to, because only uptodate pages should
ever be mapped with set_pte, and if you do the flush_icache before the
set_pte, then you effectively get the same result.

And if that's the result you want, then I don't think the flush_icache
before set_pte is a *terrible* way to get it.

-- 
SUSE Labs, Novell Inc.

WARNING: multiple messages have this Message-ID (diff)
From: Nick Piggin <nickpiggin@yahoo.com.au>
To: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: "linux-ia64@vger.kernel.org" <linux-ia64@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>,
	"tony.luck@intel.com" <tony.luck@intel.com>,
	"linux-mm@kvack.org" <linux-mm@kvack.org>,
	Christoph Lameter <clameter@sgi.com>,
	Mike.stroya@hp.com, GOTO <y-goto@jp.fujitsu.com>,
	dmosberger@gmail.com, hugh@veritas.com
Subject: Re: [BUGFIX][PATCH] DO flush icache before set_pte() on ia64.
Date: Thu, 05 Jul 2007 14:29:41 +1000	[thread overview]
Message-ID: <468C73B5.1050405@yahoo.com.au> (raw)
In-Reply-To: <20070705125427.9a3b8e8b.kamezawa.hiroyu@jp.fujitsu.com>

KAMEZAWA Hiroyuki wrote:
> On Thu, 05 Jul 2007 13:19:41 +1000
> Nick Piggin <nickpiggin@yahoo.com.au> wrote:
> 
> 
>>>>From what I can work out, it is something like "at this point the page
>>>>should be uptodate, so at least the icache won't contain *inconsistent*
>>>>data, just old data which userspace should take care of flushing if it
>>>>modifies". Is that always true?
>>>
>>> 
>>>I think it's true. But, in this case, i-cache doesn't contain *incositent* data.
>>>There are inconsistency between L2-Dcache and L3-mixed-cache. At L2-icache-miss,
>>>a cpu fetches data from L3 cache.
>>>This case seems defficult to be generalized...
>>
>>If there is something in the icache line that isn't the last data to
>>be stored at that address, isn't that inconsistent?
>>
> 
> Hmm..do we have a chance to add do_flush_cache_if_not_filled_by_dma(page)
> before SetPageUptodate(page) ?

Well you shouldn't strictly need to, because only uptodate pages should
ever be mapped with set_pte, and if you do the flush_icache before the
set_pte, then you effectively get the same result.

And if that's the result you want, then I don't think the flush_icache
before set_pte is a *terrible* way to get it.

-- 
SUSE Labs, Novell Inc.

WARNING: multiple messages have this Message-ID (diff)
From: Nick Piggin <nickpiggin@yahoo.com.au>
To: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
Cc: "linux-ia64@vger.kernel.org" <linux-ia64@vger.kernel.org>,
	LKML <linux-kernel@vger.kernel.org>,
	"tony.luck@intel.com" <tony.luck@intel.com>,
	"linux-mm@kvack.org" <linux-mm@kvack.org>,
	Christoph Lameter <clameter@sgi.com>,
	Mike.stroya@hp.com, GOTO <y-goto@jp.fujitsu.com>,
	dmosberger@gmail.com, hugh@veritas.com
Subject: Re: [BUGFIX][PATCH] DO flush icache before set_pte() on ia64.
Date: Thu, 05 Jul 2007 14:29:41 +1000	[thread overview]
Message-ID: <468C73B5.1050405@yahoo.com.au> (raw)
In-Reply-To: <20070705125427.9a3b8e8b.kamezawa.hiroyu@jp.fujitsu.com>

KAMEZAWA Hiroyuki wrote:
> On Thu, 05 Jul 2007 13:19:41 +1000
> Nick Piggin <nickpiggin@yahoo.com.au> wrote:
> 
> 
>>>>From what I can work out, it is something like "at this point the page
>>>>should be uptodate, so at least the icache won't contain *inconsistent*
>>>>data, just old data which userspace should take care of flushing if it
>>>>modifies". Is that always true?
>>>
>>> 
>>>I think it's true. But, in this case, i-cache doesn't contain *incositent* data.
>>>There are inconsistency between L2-Dcache and L3-mixed-cache. At L2-icache-miss,
>>>a cpu fetches data from L3 cache.
>>>This case seems defficult to be generalized...
>>
>>If there is something in the icache line that isn't the last data to
>>be stored at that address, isn't that inconsistent?
>>
> 
> Hmm..do we have a chance to add do_flush_cache_if_not_filled_by_dma(page)
> before SetPageUptodate(page) ?

Well you shouldn't strictly need to, because only uptodate pages should
ever be mapped with set_pte, and if you do the flush_icache before the
set_pte, then you effectively get the same result.

And if that's the result you want, then I don't think the flush_icache
before set_pte is a *terrible* way to get it.

-- 
SUSE Labs, Novell Inc.

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  reply	other threads:[~2007-07-05  4:29 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-07-04  6:05 [BUGFIX][PATCH] DO flush icache before set_pte() on ia64 KAMEZAWA Hiroyuki
2007-07-04  6:05 ` KAMEZAWA Hiroyuki
2007-07-04  6:05 ` KAMEZAWA Hiroyuki
2007-07-04  6:31 ` Nick Piggin
2007-07-04  6:31   ` Nick Piggin
2007-07-04  6:31   ` Nick Piggin
2007-07-04  7:38   ` KAMEZAWA Hiroyuki
2007-07-04  7:38     ` KAMEZAWA Hiroyuki
2007-07-04  7:38     ` KAMEZAWA Hiroyuki
2007-07-05  2:04     ` Nick Piggin
2007-07-05  2:04       ` Nick Piggin
2007-07-05  2:04       ` Nick Piggin
2007-07-05  2:47       ` KAMEZAWA Hiroyuki
2007-07-05  2:47         ` KAMEZAWA Hiroyuki
2007-07-05  2:47         ` KAMEZAWA Hiroyuki
2007-07-05  3:19         ` Nick Piggin
2007-07-05  3:19           ` Nick Piggin
2007-07-05  3:19           ` Nick Piggin
2007-07-05  3:54           ` KAMEZAWA Hiroyuki
2007-07-05  3:54             ` KAMEZAWA Hiroyuki
2007-07-05  3:54             ` KAMEZAWA Hiroyuki
2007-07-05  4:29             ` Nick Piggin [this message]
2007-07-05  4:29               ` Nick Piggin
2007-07-05  4:29               ` Nick Piggin
2007-07-06 17:32             ` Christoph Lameter
2007-07-06 17:32               ` Christoph Lameter
2007-07-06 17:32               ` Christoph Lameter
2007-07-06 21:57               ` KAMEZAWA Hiroyuki
2007-07-06 21:57                 ` KAMEZAWA Hiroyuki
2007-07-06 21:57                 ` KAMEZAWA Hiroyuki
2007-07-05 18:13 ` Mike Stroyan
2007-07-05 18:13   ` Mike Stroyan
2007-07-05 18:13   ` Mike Stroyan
2007-07-05 22:18   ` KAMEZAWA Hiroyuki
2007-07-05 22:18     ` KAMEZAWA Hiroyuki
2007-07-05 22:18     ` KAMEZAWA Hiroyuki
2007-07-06  0:20     ` KAMEZAWA Hiroyuki
2007-07-06  0:20       ` KAMEZAWA Hiroyuki
2007-07-06  0:20       ` KAMEZAWA Hiroyuki
2007-07-05 22:27   ` KAMEZAWA Hiroyuki
2007-07-05 22:27     ` KAMEZAWA Hiroyuki
2007-07-05 22:27     ` KAMEZAWA Hiroyuki

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