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From: Albert Lee <albertcc@tw.ibm.com>
To: Mikael Pettersson <mikpe@it.uu.se>
Cc: alan@lxorguk.ukuu.org.uk, bahadir.balban@gmail.com,
	dwm@enoyolf.org, jeff@garzik.org, linux-ide@vger.kernel.org,
	linuxppc-dev@ozlabs.org, sshtylyov@ru.mvista.com
Subject: Re: [PATCH 1/1] libata: pata_pdc2027x PLL input clock fix
Date: Mon, 16 Jul 2007 17:12:25 +0800	[thread overview]
Message-ID: <469B3679.20804@tw.ibm.com> (raw)
In-Reply-To: <200707111026.l6BAQ5kh003472@harpo.it.uu.se>

Mikael Pettersson wrote:
> On Wed, 11 Jul 2007 10:45:35 +0800, Albert Lee wrote:
> 
>>So, it seems both mdelay(37) and do_gettimeofday() are working properly on PowerMac G3.
>>Maybe the calculated wrong PLL input is due to wrong reading of the counter register?
>>Could you please try the attached debug patch for more clue, thanks.
> 
> 
> This, supposedly debug-only, patch gives me much better PLL calibration:
> 
> pata_pdc2027x 0000:00:0e.0: version 0.9
> bccrh [0] bccrl [0]
> bccrhv[0] bccrlv[0]
> bccrh [7FCF] bccrl [15ED]
> bccrhv[7FCF] bccrlv[15D4]
> start[0] end[1072141805] 
> usec_elapsed for mdelay(100) [105500]
> start time: [1184152411]s [689475]us 
> end   time: [1184152411]s [794975]us 
> PLL input clock[-1563248254]Hz
> usec_elapsed for mdelay(37) [35432]
> start time: [1184152411]s [818033]us 
> end   time: [1184152411]s [853465]us 
> bccrh [7FC9] bccrl [1A4B]
> bccrhv[7FC9] bccrlv[1A4B]
> bccrh [7F98] bccrl [3038]
> bccrhv[7F98] bccrlv[301F]
> start[1071946315] end[1070346296] 
> usec_elapsed for mdelay(100) [103571]
> start time: [1184152411]s [874717]us 
> end   time: [1184152411]s [978288]us 
> PLL input clock[15440000]Hz
> usec_elapsed for mdelay(37) [35431]
> start time: [1184152411]s [997039]us 
> end   time: [1184152412]s [32470]us 
> pata_pdc2027x 0000:00:0e.0: PLL input clock 15440 kHz
> 
> and from then on things are fine.
> 
> Weird. I'll try with an older gcc later (been using gcc-4.2.0 so far).
> 

Is the problem reproducible with more reload loops? Maybe we could try
something like:

#!/bin/sh
while : ; do 
  rmmod pata_pdc2027x
  sleep 1
  modprobe pata_pdc2027x
done

and "tail -f /var/log/messages|grep PLL > pll_test.log" to check the
PLL clock.
--
albert


WARNING: multiple messages have this Message-ID (diff)
From: Albert Lee <albertcc@tw.ibm.com>
To: Mikael Pettersson <mikpe@it.uu.se>
Cc: dwm@enoyolf.org, jeff@garzik.org, linux-ide@vger.kernel.org,
	bahadir.balban@gmail.com, linuxppc-dev@ozlabs.org,
	alan@lxorguk.ukuu.org.uk
Subject: Re: [PATCH 1/1] libata: pata_pdc2027x PLL input clock fix
Date: Mon, 16 Jul 2007 17:12:25 +0800	[thread overview]
Message-ID: <469B3679.20804@tw.ibm.com> (raw)
In-Reply-To: <200707111026.l6BAQ5kh003472@harpo.it.uu.se>

Mikael Pettersson wrote:
> On Wed, 11 Jul 2007 10:45:35 +0800, Albert Lee wrote:
> 
>>So, it seems both mdelay(37) and do_gettimeofday() are working properly on PowerMac G3.
>>Maybe the calculated wrong PLL input is due to wrong reading of the counter register?
>>Could you please try the attached debug patch for more clue, thanks.
> 
> 
> This, supposedly debug-only, patch gives me much better PLL calibration:
> 
> pata_pdc2027x 0000:00:0e.0: version 0.9
> bccrh [0] bccrl [0]
> bccrhv[0] bccrlv[0]
> bccrh [7FCF] bccrl [15ED]
> bccrhv[7FCF] bccrlv[15D4]
> start[0] end[1072141805] 
> usec_elapsed for mdelay(100) [105500]
> start time: [1184152411]s [689475]us 
> end   time: [1184152411]s [794975]us 
> PLL input clock[-1563248254]Hz
> usec_elapsed for mdelay(37) [35432]
> start time: [1184152411]s [818033]us 
> end   time: [1184152411]s [853465]us 
> bccrh [7FC9] bccrl [1A4B]
> bccrhv[7FC9] bccrlv[1A4B]
> bccrh [7F98] bccrl [3038]
> bccrhv[7F98] bccrlv[301F]
> start[1071946315] end[1070346296] 
> usec_elapsed for mdelay(100) [103571]
> start time: [1184152411]s [874717]us 
> end   time: [1184152411]s [978288]us 
> PLL input clock[15440000]Hz
> usec_elapsed for mdelay(37) [35431]
> start time: [1184152411]s [997039]us 
> end   time: [1184152412]s [32470]us 
> pata_pdc2027x 0000:00:0e.0: PLL input clock 15440 kHz
> 
> and from then on things are fine.
> 
> Weird. I'll try with an older gcc later (been using gcc-4.2.0 so far).
> 

Is the problem reproducible with more reload loops? Maybe we could try
something like:

#!/bin/sh
while : ; do 
  rmmod pata_pdc2027x
  sleep 1
  modprobe pata_pdc2027x
done

and "tail -f /var/log/messages|grep PLL > pll_test.log" to check the
PLL clock.
--
albert

  reply	other threads:[~2007-07-16  9:12 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-07-11 10:26 [PATCH 1/1] libata: pata_pdc2027x PLL input clock fix Mikael Pettersson
2007-07-11 10:26 ` Mikael Pettersson
2007-07-16  9:12 ` Albert Lee [this message]
2007-07-16  9:12   ` Albert Lee
  -- strict thread matches above, loose matches on Subject: below --
2007-10-14 18:33 Mikael Pettersson
2007-10-14 18:33 ` Mikael Pettersson
2007-08-17 20:51 Mikael Pettersson
2007-08-17 20:51 ` Mikael Pettersson
2007-10-14 17:31 ` Jeff Garzik
2007-10-14 17:31   ` Jeff Garzik
2007-07-10 23:14 Mikael Pettersson
2007-07-11  2:45 ` Albert Lee
2007-07-11  2:45   ` Albert Lee
2007-07-09 23:04 Mikael Pettersson
2007-07-09 23:04 ` Mikael Pettersson
2007-07-10  3:52 ` Albert Lee
2007-07-10  3:52   ` Albert Lee
2007-08-16 19:11 ` Jeff Garzik
2007-08-16 19:11   ` Jeff Garzik
2007-08-16 20:19   ` Alan Cox
2007-08-16 20:19     ` Alan Cox
2007-06-21 11:47 ide/dma not working from 2.6.19 to 2.6.21 Bahadir Balban
2007-06-21 15:28 ` Sergei Shtylyov
2007-06-25  5:22   ` Albert Lee
2007-06-25  9:10     ` Alan Cox
2007-06-26  5:05       ` Albert Lee
2007-06-26  5:43         ` [PATCH 1/1] libata: pata_pdc2027x PLL input clock fix Albert Lee
2007-07-02 14:14           ` Jeff Garzik
2007-07-02 18:13           ` Bartlomiej Zolnierkiewicz
2007-07-02 18:00             ` Sergei Shtylyov

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