From: William Montgomery <william@opinicus.com>
To: "Kok, Auke" <auke-jan.h.kok@intel.com>
Cc: Krzysztof Halasa <khc@pm.waw.pl>, linux-kernel@vger.kernel.org
Subject: Re: e100 PCI bridge problem
Date: Tue, 17 Jul 2007 15:37:09 -0400 [thread overview]
Message-ID: <469D1A65.8030704@opinicus.com> (raw)
In-Reply-To: <469D1093.9070801@intel.com>
Kok, Auke wrote:
>> 00:1e.0 PCI bridge: Intel Corp. 82801BA/CA/DB/EB/ER Hub interface to
>> PCI Bridge (rev 82) (prog-if 00 [Normal decode])
>> Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-
>> ParErr- Stepping- SERR+ FastB2B-
>> Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=fast
>> >TAbort- <TAbort- <MAbort- >SERR- <PERR+
>
>
> PERR+ set... not good - this certainly will cause major issues
>
I know it sounds that way based on the definition (Detected parity error
on hub side), however I have two other identical systems that have been
running fine for months - with this same bit set - only they use an
Adaptec ANA-64044 (4 port card - 10/100 fast ethernet - unfortunately
discontinued).
It seems the Pericom PCI to PCI bridge is having a problem talking to
the LAN controllers behind the Hint bridge.
next prev parent reply other threads:[~2007-07-17 19:38 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-07-13 17:37 e100 PCI bridge problem William Montgomery
2007-07-13 20:36 ` Kok, Auke
2007-07-13 22:30 ` William Montgomery
2007-07-13 22:41 ` Kok, Auke
2007-07-14 0:54 ` William Montgomery
2007-07-14 14:43 ` Krzysztof Halasa
2007-07-14 23:17 ` William Montgomery
2007-07-14 23:49 ` Krzysztof Halasa
2007-07-15 1:27 ` William Montgomery
2007-07-17 18:29 ` William Montgomery
2007-07-17 18:55 ` Kok, Auke
2007-07-17 19:37 ` William Montgomery [this message]
2007-07-17 21:04 ` Krzysztof Halasa
2007-07-17 20:54 ` Krzysztof Halasa
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