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From: Jan Kiszka <jan.kiszka@domain.hid>
To: ROSSIER Daniel <Daniel.Rossier@domain.hid>
Cc: xenomai@xenomai.org
Subject: Re: [Xenomai-help] Event flag from ISR
Date: Fri, 26 Oct 2007 10:26:48 +0200	[thread overview]
Message-ID: <4721A4C8.4070406@domain.hid> (raw)
In-Reply-To: <FDBBB5CC70676540B3EF7CFE83FD94E0DC1C23@domain.hid>

ROSSIER Daniel wrote:
>> -----Original Message-----
>> From: xenomai-help-bounces@domain.hid
> [mailto:xenomai-help-bounces@domain.hid]
>> On Behalf Of Gilles Chanteperdrix
>> Sent: jeudi 25 octobre 2007 19:48
>> To: Patrick
>> Cc: xenomai@xenomai.org
>> Subject: Re: [Xenomai-help] Event flag from ISR
>>
>> Patrick wrote:
>>> Hi all,
>>>
>>>
>>>
>>> I am using a RT event flag structure to start a task from an ISR.
>>>
>>> The task waits on rt_event_wait and when the IRQ occurs the ISR
>> executes
>>> rt_event_signal (the ISR code only clears the flag and calls
>>> rt_event_signal).
>>>
>>> I'm using an oscilloscope to measure the length of the ISR and the
>> first
>>> occurrence lasts about 20us and all the next occurrences last about
>> 4us.
>>>
>>>
>>> My question is why the first ISR is so long?
>>>
>>>
>>>
>>> For information I use xenomai 2.4 rc4 on ARM pxa270 machine with
>> 2.6.20
>>> kernel.
>> Typical worst case interrupt latency on ARM is around 50 us, so 20 us
> is
>> not that long. What you are observing is probably a cache effect. In
>> this case, you should observe 20us after each user-space context switch
>> since on ARM, cache is flushed at each user-space context switch.
> 
> It could make sense to have a look at the L4-embedded microkernel which
> uses the Fast Context Switch Extension (FCSE) of ARM
> and to adapt the mm switch accordingly. But as far as I remember, this
> could introduce some limitations to a process
> size since all threads are sharing a same virtual address space
> subdivided into smaller virtual regions.
> Benchmarks with FCSE reported some significant improvements and I know
> this technics is commonly used for virtualization layer on ARM.

There is already ongoing work toward FCSE for current Linux, which could
then be used by Xenomai as well, see linux-arm-kernel and xenomai-core
[1] archives. I guess anyone willing to join this effort is welcome.

Jan

[1] https://mail.gna.org/public/xenomai-core/2007-09/msg00059.html

-- 
Siemens AG, Corporate Technology, CT SE 2
Corporate Competence Center Embedded Linux


  reply	other threads:[~2007-10-26  8:26 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-10-25 15:35 [Xenomai-help] Event flag from ISR Patrick
2007-10-25 17:47 ` Gilles Chanteperdrix
2007-10-26  8:05   ` ROSSIER Daniel
2007-10-26  8:26     ` Jan Kiszka [this message]
2007-10-26  9:11       ` ROSSIER Daniel
2007-10-26  9:22         ` Sebastian Smolorz
2007-10-26  9:38   ` Patrick

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