Re: [Qemu-devel] [RFC][PATCH] fix sparc32 mxcc 64 bit read word order

[Robert Reif <reif@earthlink.net>]

[-- Attachment #1: Type: text/plain, Size: 922 bytes --]

Blue Swirl wrote:

>On 11/16/07, Robert Reif <reif@earthlink.net> wrote:
>  
>
>>>This patch fixes the word order for 64 bit reads of the mxcc registers.
>>>      
>>>
>
>Otherwise everything seems OK, but it breaks NetBSD version 3 on SS10:
>clock0 at obio0 slot 0 offset 0x200000: mk48t08
>timer0 at obio0 slot 0 offset 0x300000data fault: pc=0xf0111a0c
>addr=0x0 sfsr=126<PERR=0,LVL=1,AT=1,FT=1,FAV,OW>
>panic: kernel fault
>halted
>
>halt, power off
>
>Without the patch I get:
>clock0 at obio0 slot 0 offset 0x200000: mk48t08
>timer0 at obio0 slot 0 offset 0x300000: delay constant 99
>zs0 at obio0 slot 0 offset 0x100000 level 12 softpri 6
>zstty0 at zs0 channel 0 (console i/o)
>zstty1 at zs0 channel 1
>scsi-disk: Unsupported command length, command 79
>
>
>
>  
>
This is a classic case of two wrongs make a right.  OpenBios need to be 
fixed to set mbus module id to start at 8, not 0 for mbus based machines.



[-- Attachment #2: obio.diff.txt --]
[-- Type: text/plain, Size: 533 bytes --]

Index: drivers/obio.c
===================================================================
--- drivers/obio.c	(revision 178)
+++ drivers/obio.c	(working copy)
@@ -891,7 +891,15 @@
         push_str("cache-coherence?");
         fword("property");
 
-        PUSH(i);
+	switch (machine_id) {
+        case 0x71:
+        case 0x72:
+            PUSH(i + 8);
+            break;
+        case 0x80:
+            PUSH(i);
+            break;
+        }
         fword("encode-int");
         push_str("mid");
         fword("property");