[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[Matthew Fettke]

Signed-off-by: Matthew Fettke <mfettke@videon-central.com>
---
 MAKEALL                             |    1 +
 Makefile                            |    3 +
 board/freescale/m5275evb/Makefile   |   40 +++++
 board/freescale/m5275evb/config.mk  |   25 +++
 board/freescale/m5275evb/m5275evb.c |  109 +++++++++++++
 board/freescale/m5275evb/mii.c      |  305 +++++++++++++++++++++++++++++++++++
 board/freescale/m5275evb/u-boot.lds |  143 ++++++++++++++++
 include/configs/M5275EVB.h          |  223 +++++++++++++++++++++++++
 8 files changed, 849 insertions(+), 0 deletions(-)
 create mode 100644 board/freescale/m5275evb/Makefile
 create mode 100644 board/freescale/m5275evb/config.mk
 create mode 100644 board/freescale/m5275evb/m5275evb.c
 create mode 100644 board/freescale/m5275evb/mii.c
 create mode 100644 board/freescale/m5275evb/u-boot.lds
 create mode 100644 include/configs/M5275EVB.h

diff --git a/MAKEALL b/MAKEALL
index c9bd5e1..31e23b0 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -648,6 +648,7 @@ LIST_coldfire="			\
 	M5253EVB		\
 	M5271EVB		\
 	M5272C3			\
+	M5275EVB		\
 	M5282EVB		\
 	M5329EVB		\
 	M54455EVB		\
diff --git a/Makefile b/Makefile
index 78546cf..d2fa634 100644
--- a/Makefile
+++ b/Makefile
@@ -1790,6 +1790,9 @@ M5271EVB_config :		unconfig
 M5272C3_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5272c3
 
+M5275EVB_config :		unconfig
+	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5275evb freescale
+
 M5282EVB_config :		unconfig
 	@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5282evb
 
diff --git a/board/freescale/m5275evb/Makefile b/board/freescale/m5275evb/Makefile
new file mode 100644
index 0000000..9a0fa80
--- /dev/null
+++ b/board/freescale/m5275evb/Makefile
@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o mii.o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/board/freescale/m5275evb/config.mk b/board/freescale/m5275evb/config.mk
new file mode 100644
index 0000000..ccb2cf7
--- /dev/null
+++ b/board/freescale/m5275evb/config.mk
@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xffe00000
diff --git a/board/freescale/m5275evb/m5275evb.c b/board/freescale/m5275evb/m5275evb.c
new file mode 100644
index 0000000..3807779
--- /dev/null
+++ b/board/freescale/m5275evb/m5275evb.c
@@ -0,0 +1,109 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * Copyright (C) 2005-2008 Arthur Shipkowski (art at videon-central.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/immap.h>
+
+#define PERIOD		13	/* system bus period in ns */
+#define SDRAM_TREFI	7800	/* in ns */
+
+int checkboard(void)
+{
+	puts("Board: ");
+	puts("Freescale MCF5275 EVB\n");
+	return 0;
+};
+
+long int initdram(int board_type)
+{
+	volatile sdramctrl_t *sdp = (sdramctrl_t *)(MMAP_SDRAM);
+
+	/* Set up chip select */
+	sdp->sdbar0 = CFG_SDRAM_BASE;
+	sdp->sdbmr0 = MCF_SDRAMC_SDMRn_BAM_32M | MCF_SDRAMC_SDMRn_V;
+
+	/* Set up timing */
+	sdp->sdcfg1 = 0x83711630;
+	sdp->sdcfg2 = 0x46770000;
+
+	/* Enable clock */
+	sdp->sdcr = MCF_SDRAMC_SDCR_MODE_EN | MCF_SDRAMC_SDCR_CKE;
+
+	/* Set precharge */
+	sdp->sdcr |= MCF_SDRAMC_SDCR_IPALL;
+
+	/* Dummy write to start SDRAM */
+	*((volatile unsigned long *)CFG_SDRAM_BASE) = 0xa5a59696;
+
+	/* Send LEMR */
+	sdp->sdmr = MCF_SDRAMC_SDMR_BNKAD_LEMR
+			| MCF_SDRAMC_SDMR_AD(0x0)
+			| MCF_SDRAMC_SDMR_CMD;
+	*((volatile unsigned long *)CFG_SDRAM_BASE) = 0xa5a59696;
+
+	/* Send LMR */
+	sdp->sdmr = 0x058d0000;
+	*((volatile unsigned long *)CFG_SDRAM_BASE) = 0xa5a59696;
+
+	/* Stop sending commands */
+	sdp->sdmr &= ~(MCF_SDRAMC_SDMR_CMD);
+
+	/* Set precharge */
+	sdp->sdcr |= MCF_SDRAMC_SDCR_IPALL;
+	*((volatile unsigned long *)CFG_SDRAM_BASE) = 0xa5a59696;
+
+	/* Stop manual precharge, send 2 IREF */
+	sdp->sdcr &= ~(MCF_SDRAMC_SDCR_IPALL);
+	sdp->sdcr |= MCF_SDRAMC_SDCR_IREF;
+	*((volatile unsigned long *)CFG_SDRAM_BASE) = 0xa5a59696;
+	*((volatile unsigned long *)CFG_SDRAM_BASE) = 0xa5a59696;
+
+	/* Write mode register, clear reset DLL */
+	sdp->sdmr = 0x018d0000;
+	*((volatile unsigned long *)CFG_SDRAM_BASE) = 0xa5a59696;
+
+	/* Stop sending commands */
+	sdp->sdmr &= ~(MCF_SDRAMC_SDMR_CMD);
+	sdp->sdcr &= ~(MCF_SDRAMC_SDCR_MODE_EN);
+
+	/* Turn on auto refresh, lock SDMR */
+	sdp->sdcr =
+		MCF_SDRAMC_SDCR_CKE
+		| MCF_SDRAMC_SDCR_REF
+		| MCF_SDRAMC_SDCR_MUX(1)
+		/* 1 added to round up */
+		| MCF_SDRAMC_SDCR_RCNT((SDRAM_TREFI/(PERIOD*64)) - 1 + 1)
+		| MCF_SDRAMC_SDCR_DQS_OE(0x3);
+
+	return CFG_SDRAM_SIZE * 1024 * 1024;
+};
+
+int testdram(void)
+{
+	/* TODO: XXX XXX XXX */
+	printf("DRAM test not implemented!\n");
+
+	return (0);
+}
diff --git a/board/freescale/m5275evb/mii.c b/board/freescale/m5275evb/mii.c
new file mode 100644
index 0000000..5180133
--- /dev/null
+++ b/board/freescale/m5275evb/mii.c
@@ -0,0 +1,305 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew at freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fec.h>
+#include <asm/immap.h>
+
+#include <config.h>
+#include <net.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#undef MII_DEBUG
+#undef ET_DEBUG
+
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+	volatile gpio_t *gpio = (gpio_t *)MMAP_GPIO;
+
+	if (setclear) {
+		/* Enable Ethernet pins */
+		gpio->par_feci2c |= CFG_FECI2C;
+	} else {
+	}
+
+	return 0;
+}
+
+#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
+#include <miiphy.h>
+
+/* Make MII read/write commands for the FEC. */
+#define mk_mii_read(ADDR, REG)	(0x60020000 | ((ADDR << 23) | (REG & 0x1f) << 18))
+
+#define mk_mii_write(ADDR, REG, VAL)	(0x50020000 | ((ADDR << 23) | (REG & 0x1f) << 18) | (VAL & 0xffff))
+
+/* PHY identification */
+#define PHY_ID_LXT970		0x78100000	/* LXT970 */
+#define PHY_ID_LXT971		0x001378e0	/* LXT971 and 972 */
+#define PHY_ID_82555		0x02a80150	/* Intel 82555 */
+#define PHY_ID_QS6612		0x01814400	/* QS6612 */
+#define PHY_ID_AMD79C784	0x00225610	/* AMD 79C784 */
+#define PHY_ID_LSI80225		0x0016f870	/* LSI 80225 */
+#define PHY_ID_LSI80225B	0x0016f880	/* LSI 80225/B */
+#define PHY_ID_DP83848VV	0x20005C90	/* National 83848 */
+#define PHY_ID_DP83849		0x20005CA2	/* National 82849 */
+#define PHY_ID_KS8721BL		0x00221619	/* Micrel KS8721BL/SL */
+
+#define STR_ID_LXT970		"LXT970"
+#define STR_ID_LXT971		"LXT971"
+#define STR_ID_82555		"Intel82555"
+#define STR_ID_QS6612		"QS6612"
+#define STR_ID_AMD79C784	"AMD79C784"
+#define STR_ID_LSI80225		"LSI80225"
+#define STR_ID_LSI80225B	"LSI80225/B"
+#define STR_ID_DP83848VV	"N83848"
+#define STR_ID_DP83849		"N83849"
+#define STR_ID_KS8721BL		"KS8721BL"
+
+/****************************************************************************
+ * mii_init -- Initialize the MII for MII command without ethernet
+ * This function is a subset of eth_init
+ ****************************************************************************
+ */
+void mii_reset(struct fec_info_s *info)
+{
+	volatile fec_t *fecp = (fec_t *) (info->miibase);
+	int i;
+
+	fecp->ecr = FEC_ECR_RESET;
+	for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
+		udelay(1);
+	}
+	if (i == FEC_RESET_DELAY) {
+		printf("FEC_RESET_DELAY timeout\n");
+	}
+}
+
+/* send command to phy using mii, wait for result */
+uint mii_send(uint mii_cmd)
+{
+	struct fec_info_s *info;
+	struct eth_device *dev;
+	volatile fec_t *ep;
+	uint mii_reply;
+	int j = 0;
+
+	/* retrieve from register structure */
+	dev = eth_get_dev();
+	info = dev->priv;
+
+	ep = (fec_t *) info->miibase;
+
+	ep->mmfr = mii_cmd;	/* command to phy */
+
+	/* wait for mii complete */
+	while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
+		udelay(1);
+		j++;
+	}
+	if (j >= MCFFEC_TOUT_LOOP) {
+		printf("MII not complete\n");
+		return -1;
+	}
+
+	mii_reply = ep->mmfr;	/* result from phy */
+	ep->eir = FEC_EIR_MII;	/* clear MII complete */
+#ifdef ET_DEBUG
+	printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
+	       __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
+#endif
+
+	return (mii_reply & 0xffff);	/* data read from phy */
+}
+#endif	/* CFG_DISCOVER_PHY || (CONFIG_COMMANDS & CONFIG_CMD_MII) */
+
+#if defined(CFG_DISCOVER_PHY)
+int mii_discover_phy(struct eth_device *dev)
+{
+#define MAX_PHY_PASSES 11
+	struct fec_info_s *info = dev->priv;
+	int phyaddr, pass;
+	uint phyno, phytype;
+
+	if (info->phyname_init)
+		return info->phy_addr;
+
+	phyaddr = -1;		/* didn't find a PHY yet */
+	for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
+		if (pass > 1) {
+			/* PHY may need more time to recover from reset.
+			 * The LXT970 needs 50ms typical, no maximum is
+			 * specified, so wait 10ms before try again.
+			 * With 11 passes this gives it 100ms to wake up.
+			 */
+			udelay(10000);	/* wait 10ms */
+		}
+
+		for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
+
+			phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1));
+#ifdef ET_DEBUG
+			printf("PHY type 0x%x pass %d type\n", phytype, pass);
+#endif
+			if (phytype != 0xffff) {
+				phyaddr = phyno;
+				phytype <<= 16;
+				phytype |=
+				    mii_send(mk_mii_read(phyno, PHY_PHYIDR2));
+
+				switch (phytype & 0xffffffff) {
+				case PHY_ID_KS8721BL:
+					strcpy(info->phy_name,
+					       STR_ID_KS8721BL);
+					info->phyname_init = 1;
+					break;
+				default:
+					strcpy(info->phy_name, "unknown");
+					info->phyname_init = 1;
+					break;
+				}
+
+#ifdef ET_DEBUG
+				printf("PHY @ 0x%x pass %d type ", phyno, pass);
+				switch (phytype & 0xffffffff) {
+				case PHY_ID_KS8721BL:
+					printf(STR_ID_KS8721BL);
+					break;
+				default:
+					printf("0x%08x\n", phytype);
+					break;
+				}
+#endif
+			}
+		}
+	}
+	if (phyaddr < 0)
+		printf("No PHY device found.\n");
+
+	return phyaddr;
+}
+#endif				/* CFG_DISCOVER_PHY */
+
+void mii_init(void) __attribute__((weak,alias("__mii_init")));
+
+void __mii_init(void)
+{
+	volatile fec_t *fecp;
+	struct fec_info_s *info;
+	struct eth_device *dev;
+	int miispd = 0, i = 0;
+	u16 autoneg = 0;
+
+	/* retrieve from register structure */
+	dev = eth_get_dev();
+	info = dev->priv;
+
+	fecp = (fec_t *) info->miibase;
+
+	fecpin_setclear(dev, 1);
+
+	mii_reset(info);
+
+	/* We use strictly polling mode only */
+	fecp->eimr = 0;
+
+	/* Clear any pending interrupt */
+	fecp->eir = 0xffffffff;
+
+	/* Set MII speed */
+	miispd = (gd->bus_clk / 1000000) / 5;
+	fecp->mscr = miispd << 1;
+
+	info->phy_addr = mii_discover_phy(dev);
+
+#define AUTONEGLINK		(PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)
+	while (i < MCFFEC_TOUT_LOOP) {
+		autoneg = 0;
+		miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &autoneg);
+		i++;
+
+		if ((autoneg & AUTONEGLINK) == AUTONEGLINK)
+			break;
+
+		udelay(500);
+	}
+	if (i >= MCFFEC_TOUT_LOOP) {
+		printf("Auto Negotiation not complete\n");
+	}
+
+	/* adapt to the half/full speed settings */
+	info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
+	info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
+}
+
+/*****************************************************************************
+ * Read and write a MII PHY register, routines used by MII Utilities
+ *
+ * FIXME: These routines are expected to return 0 on success, but mii_send
+ *	  does _not_ return an error code. Maybe 0xFFFF means error, i.e.
+ *	  no PHY connected...
+ *	  For now always return 0.
+ * FIXME: These routines only work after calling eth_init() at least once!
+ *	  Otherwise they hang in mii_send() !!! Sorry!
+ *****************************************************************************/
+
+int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+		       unsigned short *value)
+{
+	short rdreg;		/* register working value */
+
+#ifdef MII_DEBUG
+	printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
+#endif
+	rdreg = mii_send(mk_mii_read(addr, reg));
+
+	*value = rdreg;
+
+#ifdef MII_DEBUG
+	printf("0x%04x\n", *value);
+#endif
+
+	return 0;
+}
+
+int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+			unsigned short value)
+{
+	short rdreg;		/* register working value */
+
+#ifdef MII_DEBUG
+	printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
+#endif
+
+	rdreg = mii_send(mk_mii_write(addr, reg, value));
+
+#ifdef MII_DEBUG
+	printf("0x%04x\n", value);
+#endif
+
+	return 0;
+}
+
+#endif				/* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
diff --git a/board/freescale/m5275evb/u-boot.lds b/board/freescale/m5275evb/u-boot.lds
new file mode 100644
index 0000000..c461d20
--- /dev/null
+++ b/board/freescale/m5275evb/u-boot.lds
@@ -0,0 +1,143 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text)	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data)	}
+  .rel.rodata    : { *(.rel.rodata)	}
+  .rela.rodata   : { *(.rela.rodata)	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    /* WARNING - the following is hand-optimized to fit within	*/
+    /* the sector layout of our flash chips!	XXX FIXME XXX	*/
+
+    cpu/mcf52x2/start.o	(.text)
+    common/dlmalloc.o	(.text)
+    lib_generic/string.o	(.text)
+    lib_generic/vsprintf.o	(.text)
+    lib_generic/crc32.o	(.text)
+    lib_generic/zlib.o	(.text)
+
+/*    . = env_offset; */
+    common/environment.o(.text)
+
+    *(.text)
+    *(.fixup)
+    *(.got1)
+  }
+  _etext = .;
+  PROVIDE (etext = .);
+  .rodata    :
+  {
+    *(.rodata)
+    *(.rodata1)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x00FF) & 0xFFFFFF00;
+  _erotext = .;
+  PROVIDE (erotext = .);
+    .reloc   :
+  {
+    __got_start = .;
+    *(.got)
+    __got_end = .;
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  . = .;
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+  . = .;
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(256);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(256);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   _sbss = .;
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+   . = ALIGN(4);
+   _ebss = .;
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
new file mode 100644
index 0000000..41edf04
--- /dev/null
+++ b/include/configs/M5275EVB.h
@@ -0,0 +1,223 @@
+/*
+ * Configuation settings for the Motorola MC5275EVB board.
+ *
+ * By Arthur Shipkowski <art@videon-central.com>
+ * Copyright (C) 2005 Videon Central, Inc.
+ *
+ * Based off of M5272C3 board code by Josef Baumgartner
+ * <josef.baumgartner@telex.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _M5275EVB_H
+#define _M5275EVB_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_MCF52x2			/* define processor family */
+#define CONFIG_M5275			/* define processor type */
+#define CONFIG_M5275EVB			/* define board type */
+
+#define CONFIG_MCFTMR
+
+#define CONFIG_MCFUART
+#define CFG_UART_PORT		(0)
+#define CONFIG_BAUDRATE		19200
+#define CFG_BAUDRATE_TABLE	{ 9600 , 19200 , 38400 , 57600, 115200 }
+
+/* Configuration for environment
+ * Environment is embedded in u-boot in the second sector of the flash
+ */
+#ifndef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_ENV_OFFSET		0x4000
+#define CFG_ENV_SECT_SIZE	0x2000
+#define CFG_ENV_IS_IN_FLASH	1
+#define CFG_ENV_IS_EMBEDDED	1
+#else
+#define CFG_ENV_ADDR		0xffe04000
+#define CFG_ENV_SECT_SIZE	0x2000
+#define CFG_ENV_IS_IN_FLASH	1
+#endif
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/* Available command configuration */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_DHCP
+
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_LOADB
+
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+#define CONFIG_NET_MULTI	1
+#define CONFIG_MII		1
+#define CFG_DISCOVER_PHY
+#define CFG_RX_ETH_BUFFER	8
+#define CFG_FAULT_ECHO_LINK_DOWN
+#define CFG_FEC0_PINMUX		0
+#define CFG_FEC0_MIIBASE	CFG_FEC0_IOBASE
+#define CFG_FEC1_PINMUX		0
+#define CFG_FEC1_MIIBASE	CFG_FEC1_IOBASE
+#define MCFFEC_TOUT_LOOP	50000
+#define CONFIG_HAS_ETH1
+/* If CFG_DISCOVER_PHY is not defined - hardcoded */
+#ifndef CFG_DISCOVER_PHY
+#define FECDUPLEX		FULL
+#define FECSPEED		_100BASET
+#else
+#ifndef CFG_FAULT_ECHO_LINK_DOWN
+#define CFG_FAULT_ECHO_LINK_DOWN
+#endif
+#endif
+#endif
+
+/* I2C */
+#define CONFIG_FSL_I2C
+#define CONFIG_HARD_I2C		/* I2C with hw support */
+#undef CONFIG_SOFT_I2C
+#define CFG_I2C_SPEED		80000
+#define CFG_I2C_SLAVE		0x7F
+#define CFG_I2C_OFFSET		0x00000300
+#define CFG_IMMR		CFG_MBAR
+
+#ifdef CONFIG_MCFFEC
+#define CONFIG_ETHADDR		00:06:3b:01:41:55
+#define CONFIG_ETH1ADDR		00:0e:0c:bc:e5:60
+#endif
+
+#define CFG_PROMPT		"-> "
+#define CFG_LONGHELP		/* undef to save memory	*/
+
+#if (CONFIG_CMD_KGDB)
+#	define CFG_CBSIZE	1024
+#else
+#	define CFG_CBSIZE	256
+#endif
+#define CFG_PBSIZE		(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
+#define CFG_MAXARGS		16
+#define CFG_BARGSIZE		CFG_CBSIZE
+
+#define CFG_LOAD_ADDR		0x800000
+
+#define CONFIG_BOOTDELAY	5
+#define CONFIG_BOOTCOMMAND	"bootm ffe40000"
+#define CFG_MEMTEST_START	0x400
+#define CFG_MEMTEST_END		0x380000
+
+#define CFG_HZ			1000
+#define CFG_CLK			150000000
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+
+#define CFG_MBAR		0x40000000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR	0x20000000
+#define CFG_INIT_RAM_END	0x10000	/* End of used area in internal SRAM */
+#define CFG_GBL_DATA_SIZE	1000	/* bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE		0x00000000
+#define CFG_SDRAM_SIZE		16	/* SDRAM size in MB */
+#define CFG_FLASH_BASE		0xffe00000
+
+#ifdef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_MONITOR_BASE	0x20000
+#else
+#define CFG_MONITOR_BASE	(CFG_FLASH_BASE + 0x400)
+#endif
+
+#define CFG_MONITOR_LEN		0x20000
+#define CFG_MALLOC_LEN		(256 << 10)
+#define CFG_BOOTPARAMS_LEN	64*1024
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial mmap for Linux */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
+#define CFG_MAX_FLASH_SECT	11	/* max number of sectors on one chip */
+#define CFG_FLASH_ERASE_TOUT	1000
+
+#define CFG_FLASH_CFI		1
+#define CFG_FLASH_CFI_DRIVER	1
+#define CFG_FLASH_SIZE		0x200000
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE	16
+
+/*-----------------------------------------------------------------------
+ * Memory bank definitions
+ */
+#define CFG_AR0_PRELIM		(CFG_FLASH_BASE >> 16)
+#define CFG_CR0_PRELIM		0x1980
+#define CFG_MR0_PRELIM		0x001F0001
+
+#define CFG_AR1_PRELIM		0x3000
+#define CFG_CR1_PRELIM		0x1900
+#define CFG_MR1_PRELIM		0x00070001
+
+/*-----------------------------------------------------------------------
+ * Port configuration
+ */
+#define CFG_FECI2C		0x0FA0
+
+#endif	/* _M5275EVB_H */
-- 
1.5.3.7

[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[David van Geest]

On Jan 21, 2008 3:24 PM, Matthew Fettke <matthew.fettke@gmail.com> wrote:

> Signed-off-by: Matthew Fettke <mfettke@videon-central.com>


You have no idea how happy I am to see this patch. I was working on my own,
but hadn't tried it out yet.  Once this is applied, is it put right into the
git tree, or does that not happen until next release?
Anyway, thanks!

-David van Geest
[ Rhythm Reloaded ]
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[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[David van Geest]

> To get this board working with the current git tree you'll need both
> patches plus the patch of include/asm-m68k/io.h by TsiChung Liew (see
> his patch "ColdFire: Fix CFI Flash low level Read/Write macro" on Jan 15
> 2008).


I'm having trouble applying the patch mentioned above (I've never used git
to apply patches before).  I cloned the repository, then used: git-apply
--check patch1 to check my patch file.  I get the following output:

error: patch failed: include/asm-m68k/io.h:28
error: include/asm-m68k/io.h: patch does not apply

My 'patch1' file is a plain text file containing all the stuff encapsulated
by the --- at the top and bottom of the email message.

I also tried setting the head to v1.3.1 with: git checkout v1.3.1 and
repeating the same process, but got same results.  Am I supposed to be
applying the patch to a different version?  If so, what version and how
should I do it?

I can try out the M5275EVB patch and give feedback when I get this worked
out.

Thanks!
- David
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[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[Liew Tsi Chung]

David,
 
    Matthew's patch is based of commit f18889c2f1... Jan 17 09:35:26 2008 +0100 Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master. When you cloned the latest as today, there are dozen of patches since then, so the patches show errors when you applied.
 
    First, you create a new branch based of master if you use the main stream branch. git-branch newbranch master. Change your branch to newbranch. git-checkout newbranch. Reset to the commit mentioned above. git-reset --hard f18889c2f1... Update the two patches from Matthew (Make sure no unwrap text and unix file format) git-apply --whitespace=strip patch. Use git-add to apply all the new files just added, then temporary create a commit git-commit (Otherwise, rebase won't work). To merge with updated u-boot. git-rebase master newbranch. There maybe other methods to apply the patch, but this is the method I used so far.
 
    Hope this help.
 
Regards,
TsiChung
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[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[David van Geest]

Thanks for your responses, guys.  I've tried both of your methods, and both
give me similar errors.  In the m5275evb patch, everything works except
MAKEALL and Makefile.  In the mcf5275 patch, there are a lot more errors.

I should note that I couldn't find the exact commit TsiChung mentions... the
number you cite is missing a 6.... but I assume that was a type and we're
talking about the same one: I found and am using:

f188896c2f1594fe749fdb99bbc8c54023cfab3a Wolfgang Denk [Thu, 17 Jan 2008
08:35:26 +0000]
Merge branch 'master' of git+ssh://10.10.0.7/home/wd/git/u-boot/master

Here's what I'm doing:

david at chiron:~$ git clone git://www.denx.de/git/u-boot.git u-boot/
Initialized empty Git repository in /home/david/u-boot/.git/
remote: Generating pack...
remote: Counting objects: 1299
remote: Done counting 51432 objects.
remote: Deltifying 51432 objects...
remote:  100% (51432/51432) done
Indexing 51432 objects...
remote: Total 51432 (delta 41342), reused 51070 (delta 41043)
 100% (51432/51432) done
Resolving 41342 deltas...
 100% (41342/41342) done
david at chiron:~$ cp mcf5275patch u-boot/
david at chiron:~$ cp m5275evbPatch u-boot/
david at chiron:~$ cd u-boot
david at chiron:~/u-boot$ git-branch patched master
david at chiron:~/u-boot$ git-branch
* master
  patched
david at chiron:~/u-boot$ git-checkout patched
Switched to branch "patched"
david at chiron:~/u-boot$ git-reset --hard
f188896c2f1594fe749fdb99bbc8c54023cfab3a

HEAD is now at f188896... Merge branch 'master' of
git+ssh://10.10.0.7/home/wd/git/u-boot/master
david at chiron:~/u-boot$ git-apply --whitespace=strip mcf5275patch
error: patch failed: cpu/mcf52x2/cpu.c:6
error: cpu/mcf52x2/cpu.c: patch does not apply
error: patch failed: cpu/mcf52x2/cpu_init.c:10
error: cpu/mcf52x2/cpu_init.c: patch does not apply
error: patch failed: cpu/mcf52x2/interrupts.c:59
error: cpu/mcf52x2/interrupts.c: patch does not apply
error: patch failed: cpu/mcf52x2/speed.c:65
error: cpu/mcf52x2/speed.c: patch does not apply
error: patch failed: cpu/mcf52x2/start.S:197
error: cpu/mcf52x2/start.S: patch does not apply
error: patch failed: include/asm-m68k/immap.h:146
error: include/asm-m68k/immap.h: patch does not apply
david at chiron:~/u-boot$ git-apply --whitespace=strip m5275evbPatch
error: patch failed: MAKEALL:648
error: MAKEALL: patch does not apply
error: patch failed: Makefile:1790
error: Makefile: patch does not apply


Trying to use the patch command, I get the following:

david at chiron:~/u-boot$ patch -p1 <m5275evbPatch
patching file MAKEALL
Hunk #1 FAILED at 648.
1 out of 1 hunk FAILED -- saving rejects to file MAKEALL.rej
patching file Makefile
Hunk #1 FAILED at 1790.
1 out of 1 hunk FAILED -- saving rejects to file Makefile.rej
patching file board/freescale/m5275evb/Makefile
patching file board/freescale/m5275evb/config.mk
patching file board/freescale/m5275evb/m5275evb.c
patching file board/freescale/m5275evb/mii.c
patching file board/freescale/m5275evb/u-boot.lds
patching file include/configs/M5275EVB.h

david at chiron:~/u-boot$ patch -p1 <mcf5275patch
patching file CREDITS
patching file cpu/mcf52x2/config.mk
patching file cpu/mcf52x2/cpu.c
Hunk #1 FAILED at 6.
Hunk #2 FAILED at 183.
2 out of 2 hunks FAILED -- saving rejects to file cpu/mcf52x2/cpu.c.rej
patching file cpu/mcf52x2/cpu_init.c
Hunk #1 FAILED at 10.
Hunk #2 succeeded at 248 with fuzz 2.
1 out of 2 hunks FAILED -- saving rejects to file cpu/mcf52x2/cpu_init.c.rej
patching file cpu/mcf52x2/interrupts.c
Hunk #1 succeeded at 59 with fuzz 2.
Hunk #2 FAILED at 81.
1 out of 2 hunks FAILED -- saving rejects to file
cpu/mcf52x2/interrupts.c.rej
patching file cpu/mcf52x2/speed.c
Hunk #1 FAILED at 65.
1 out of 1 hunk FAILED -- saving rejects to file cpu/mcf52x2/speed.c.rej
patching file cpu/mcf52x2/start.S
Hunk #1 succeeded at 197 with fuzz 2.
Hunk #2 succeeded at 405 with fuzz 2.
patching file include/asm-m68k/immap.h
Hunk #1 succeeded@146 with fuzz 2.
patching file include/asm-m68k/immap_5275.h
patching file include/asm-m68k/m5275.h

Any ideas?
-David
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[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[Liew Tsi Chung]

David,
 
    Make sure your patch is wrap text when you export or save as from email. Aso, make sure your patches do not contain (CR+LF) newlines.
 
unwrap text in your patch:
...
8 files changed, 849 insertions(+), 0 deletions(-)  create mode 100644 board/freescale/m5275evb/Makefile  create mode 100644 board/freescale/m5275evb/config.mk
 create mode 100644 board/freescale/m5275evb/m5275evb.c
 create mode 100644 board/freescale/m5275evb/mii.c  create mode 100644 board/freescale/m5275evb/u-boot.lds
 create mode 100644 include/configs/M5275EVB.h
...

wrap text in your patch:
...
 8 files changed, 849 insertions(+), 0 deletions(-)
 create mode 100644 board/freescale/m5275evb/Makefile
 create mode 100644 board/freescale/m5275evb/config.mk
 create mode 100644 board/freescale/m5275evb/m5275evb.c
 create mode 100644 board/freescale/m5275evb/mii.c
 create mode 100644 board/freescale/m5275evb/u-boot.lds
 create mode 100644 include/configs/M5275EVB.h
...

Regards,
TsiChung

[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[David van Geest]

Thanks, TsiChung.  With the patches you emailed me it worked fine.  It must
have been a problem with the way I was creating the patch files, although I
still can't see a difference between my files and yours.  What I was doing
was copy-pasting from gmail to gedit, and I guess that is messing with
newlines, because the wrap text seems to be fine. Anyway, I have u-boot
compiled and will probably try it out on our board tomorrow.

Thanks very much for your help.
-David
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[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[David van Geest]

OK, I've tried out the patched version.... and I can't get it to boot.  I've
erased the flash with CF Flasher and reprogrammed, verified, etc.  I've
tried programming with both the srec and the bin, and both give the same
results.

In the terminal I get the following:

U-Boot 1.3.1-gad73dc9b (Jan 24 2008 - 16:52:46)

CPU:   Freescale Coldfire MCF5275 at 150 MHz
Board: Freescale MCF5275 EVB
I2C:   ready
DRAM:  16 MB
FLASH:

*** Unexpected exception ***
Vector Number: 2  Format: 04  Fault Status: 8

PC: 00fea364    SR: 00002708    SP: 00f8fe30
D0: 00000004    D1: 00000004    D2: ffe00154    D3: 00000055
D4: 00fea2ce    D5: 00ff3106    D6: 00fea2ce    D7: 00f9ff8a
A0: 98989898    A1: 00fff422    A2: 00fff422    A3: 00fff422
A4: 00fea3ae    A5: 00ff7500    A6: 00f8fe88

*** Please Reset Board! ***

This is exactly the same on every reset.  I tried recompiling u-boot using
both the main tree and the coldfire tree, both give the same results.  Any
ideas?
Thanks,
- David
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[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[Liew Tsi Chung]

David,
 
	After you applied the 5275 patches, did you perform a git rebase? One ColdFire patch "Fix CFI Flash low level Read/Write macro" is required. The original macros have address and value swap, and it will cause exception whenever there is a CFI flash low level read/write performs.

	Your current branch set to patched. Use "git-rebase master patched" to update the patches from master branch (after f188896c2f1594fe749fdb99bbc8c54023cfab3a) to patched branch.

Regards,
TsiChung

[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[Matthew Fettke]

> *** Unexpected exception ***
> Vector Number: 2  Format: 04  Fault Status: 8
> 
> PC: 00fea364    SR: 00002708    SP: 00f8fe30
> D0: 00000004    D1: 00000004    D2: ffe00154    D3: 00000055
> D4: 00fea2ce    D5: 00ff3106    D6: 00fea2ce    D7: 00f9ff8a
> A0: 98989898    A1: 00fff422    A2: 00fff422    A3: 00fff422
> A4: 00fea3ae    A5: 00ff7500    A6: 00f8fe88
> 
> *** Please Reset Board! ***
> 
I made a branch and followed the procedure you outlined a couple of
posts ago, and I get the same error. However, once you pick up the
CFI patch it works properly.

Can you please confirm that you've picked up the CFI patch? If so, can
you let us know what hardware you're trying to run this on.

Matt

[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[David van Geest]

I know this is a rather long email, but I want to give all the details.
Bear with me :-).

I was under the impression that the CFI patch was already included in the
f188896c... commit and that I didn't need to apply it.  I had tried the
git-rebase, but it gave me errors and then wouldn't build.  I assumed that
the git-rebase step was only required for future patches, so figured I would
sort it out later.  I should have mentioned that in my last email, I
apologize for the miscommunication.

Here's the git-rebase output:

david at chiron:~/u-boot-coldfire$ git-rebase master patched
Already on branch "patched"
First, rewinding head to replay your work on top of it...

HEAD is now at 33dac03... Coding Style Cleanup; update CHANGELOG

Applying ColdFire: Added MCF5275 cpu support.

Wrote tree ab2c1c1174d5a83b77fb13ef256dea1ad52bfc76
Committed: 70fb3f277a4032eb9d94e840247a9912de4678be

Applying ColdFire: Added M5275EVB support.

error: patch failed: MAKEALL:648
error: MAKEALL: patch does not apply
Using index info to reconstruct a base tree...
Falling back to patching base and 3-way merge...
Auto-merged MAKEALL
Auto-merged Makefile
Wrote tree de37f7363a7d043338a21751cbedfbc1cff75ab8
Committed: dcba0b1aea040e60724b6fabd273f3ce42efa36f

Resulting in these build errors:

make[1]: Leaving directory `/home/david/u-boot/drivers/pcmcia'
make -C drivers/spi/
make[1]: Entering directory `/home/david/u-boot/drivers/spi'
mpc8xxx_spi.c:26:29: error: asm/mpc8xxx_spi.h: No such file or directory
make[1]: *** No rule to make target `.depend', needed by `libspi.a'.  Stop.
make[1]: Leaving directory `/home/david/u-boot/drivers/spi'
make: *** [drivers/spi/libspi.a] Error 2

I have applied the CFI patch from the original email using git-am, that
seems to work fine.  U-boot compiles successfully with these warnings:

david at chiron:~/u-boot$ ./MAKEALL M5275EVB
Configuring for M5275EVB board...
board.c: In function 'init_baudrate':
board.c:179: warning: pointer targets in passing argument 2 of 'getenv_r'
differ in signedness
board.c:182: warning: pointer targets in passing argument 1 of
'simple_strtoul' differ in signedness
m68k_linux.c: In function 'do_bootm_linux':
m68k_linux.c:154: warning: implicit declaration of function 'do_reset'
m68k-elf-ld: warning: library search path "/lib" is unsafe for
cross-compilation
m68k-elf-ld: warning: library search path "/usr/lib" is unsafe for
cross-compilation
m68k-elf-ld: warning: library search path "/usr/local/lib" is unsafe for
cross-compilation
./MAKEALL: 265: ppc_8xx-size: not found

I programmed the board (an M5275EVB Rev. B) with the srec using CF Flasher,
and U-Boot boots to the prompt.

However, I've run into these problems,  and I'm wondering if guys have as
well, or if I'm doing something wrong.

1)  I can't save environment variables using saveenv.  I can change them
just fine, and saveenv runs as usual, but on reset, I get a "*** Warning -
bad CRC, using default environment "

example:

->
printenv

bootcmd=bootm
ffe40000
bootdelay=5

baudrate=19200

ethaddr=00:06:3b:01:41:55

eth1addr=00:0e:0c:bc:e5:60

stdin=serial

stdout=serial

stderr=serial

ethact=FEC0



Environment size: 156/8188
bytes
-> setenv ipaddr 192.168.1.101

->
printenv

bootcmd=bootm
ffe40000
bootdelay=5

baudrate=19200

ethaddr=00:06:3b:01:41:55

eth1addr=00:0e:0c:bc:e5:60

stdin=serial

stdout=serial

stderr=serial

ethact=FEC0

ipaddr=192.168.1.101



Environment size: 177/8188
bytes
->
saveenv

Saving Environment to
Flash...
Un-Protected 1
sectors
Erasing
Flash...
.
done

Erased 1
sectors
Writing to Flash...
done
Protected 1
sectors
->



U-Boot 1.3.1-ge4d87286 (Jan 26 2008 -
13:23:51)


CPU:   Freescale Coldfire MCF5275 at 150
MHz
Board: Freescale MCF5275
EVB
I2C:
ready
DRAM:  16
MB
FLASH:  2
MB
*** Warning - bad CRC, using default
environment

etc.

2) Ethernet does not seem to work.  After setting the ipaddr, serverip, and
netmask variables, I run tftpboot and don't get anything but checksum
errors.  The TFTP transfer works fine with the exact same setup (router, ip
addresses, etc.) when I use dBug.  I've run Wireshark on the ethernet
interface and haven't seen a single packet from the board while running the
tftpboot command.  I've tried pinging the board, seen the packets sent on
Wireshark, and got no response.

->
printenv

bootcmd=bootm
ffe40000
bootdelay=5

baudrate=19200

ethaddr=00:06:3b:01:41:55

eth1addr=00:0e:0c:bc:e5:60

stdin=serial

stdout=serial

stderr=serial

ethact=FEC0

ipaddr=192.168.1.101

serverip=192.168.1.100

netmask=255.255.255.0

Environment size: 222/8188 bytes
-> tftpboot 0x50000 image.bin

Using FEC0
device
TFTP from server 192.168.1.100; our IP address is 192.168.1.101

Filename 'image.bin'.

Load address:
0x50000
Loading: checksum
bad
checksum
bad
checksum
bad


Abort

->

Anything to clear this up would help.  Do either of you have ethernet and
saveenv working? Thanks for your help and your patience.

-David
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[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[Matthew Fettke]

> 1)  I can't save environment variables using saveenv.  I can change them just fine, and saveenv runs as usual, but on reset, I get a "*** Warning - bad CRC, using default environment "

I have the same problem. I haven't done any testing with the saveenv so
it more than likely needs some tweaking. The README mentions it quite a
bit so you may want to start there.

> 2) Ethernet does not seem to work.  After setting the ipaddr, serverip, and netmask variables, I run tftpboot and don't get anything but checksum errors
...  
> I've tried pinging the board, seen the packets sent on Wireshark, and got no response.

I use DHCP to get my IP address:
  -> setenv autoload no
  -> dhcp
  BOOTP broadcast 1
  DHCP client bound to address XXX.XXX.XXX.152
  -> ping XXX.XXX.XXX.189
  Using FEC0 device
  host XXX.XXX.XXX.189 is alive

However, if I try to ping the board I get a "Destination Host
Unreachable" error - apparently this is normal U-Boot behaviour.

I can also successfully use TFTP. 
  -> set serverip XXX.XXX.XXX.55
  -> tftpboot 20000 image.bin
  Using FEC0 device
  TFTP from server XXX.XXX.XXX.55; our IP address is XXX.XXX.XXX.152
  Filename 'image.bin'.
  Load address: 0x20000
  Loading:
  #################################################################
  done
  Bytes transferred = 1279856 (138770 hex)

I'm no real expert on this board/CPU so, other than sharing the commands 
I've used, I'm afraid I can't provide too much advice. I'm going to start
looking into the saveenv problem now.

Matt

[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[Liew Tsi Chung]

Matthew,

	I spotted a few issues:

	1. in cpu/mcf52x2/interrupt.c should be
		imlr0 &= 0xFFFFFFFE;

	2. in include/asm-m68k/immap.h CFG_TMRINTR_PRI should set to
0x1E for timer interrupt to work probably.
		#define CFG_TMRINTR_PRI	(0x1E)

	3. in board/freescale/m5275evb/u-boot.lds, this will take care
the environment problem. When the . = DEFINED(env_offset) ? env_offset :
.; is commented, u-boot does not know where to retrieve the env data
from flash; therefore, it always shows bad CRC when booting.

		cpu/mcf52x2/start.o	(.text)
		common/dlmalloc.o		(.text)
		lib_generic/string.o	(.text)
		ilb_generic/zlib.o	(.text)

		. = DEFINED(env_offset) ? env_offset : .;
		common/environment.o	(.text)

Regards,
TsiChung	

[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[Matthew Fettke]

>         1. in cpu/mcf52x2/interrupt.c should be
>                 imlr0 &= 0xFFFFFFFE;

Could you please specify whether you're referring to the line in the
interrupt_init() function or dtimer_intr_setup() function (or both)?

>         2. in include/asm-m68k/immap.h CFG_TMRINTR_PRI should set to
> 0x1E for timer interrupt to work probably.
>                 #define CFG_TMRINTR_PRI (0x1E)

OK, I've changed that.
 
>         3. in board/freescale/m5275evb/u-boot.lds, this will take care
> the environment problem. When the . = DEFINED(env_offset) ? env_offset :
> .; is commented, u-boot does not know where to retrieve the env data
> from flash; therefore, it always shows bad CRC when booting.

I've changed this too, and I can confirm it works.

If you can clear up the first point I'll send out a new patch asap.

Matt

[U-Boot-Users] [PATCH] ColdFire: Added M5275EVB support.

[David van Geest]

> I use DHCP to get my IP address:
>  -> setenv autoload no
>  -> dhcp
>  BOOTP broadcast 1
>  DHCP client bound to address XXX.XXX.XXX.152
>  -> ping XXX.XXX.XXX.189
>  Using FEC0 device
>  host XXX.XXX.XXX.189 is alive


I've tried DHCP as well, and I get the following:
-> dhcp
BOOTP broadcast 1
checksum bad
checksum bad

Abort

Have tried pinging the devel computer as well:
-> ping 192.168.1.100
Using FEC0 device
checksum bad
checksum bad

Abort
ping failed; host 192.168.1.100 is not alive

DHCP on the router is working fine; other computers on the LAN get IP
addresses without any trouble.  I have also tried using DHCP with the board
plugged into my college's network which uses DHCP, still didn't work.  Have
also tried using static IPs with a crossover cable straight from the board
to the computer, and that didn't work either.  I'm using FEC0 and have
tested the cable.  TsiChung, have you had any Ethernet problems?  Is it
possible that I need some other patch that was recently applied?

I modified u-boot.lds to fix the saveenv, and it worked fine for me.

Thanks,
-David
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