* question: trap handler query....
@ 2008-01-22 20:40 Mukesh Rathor
2008-01-22 21:13 ` Daniel Stodden
0 siblings, 1 reply; 2+ messages in thread
From: Mukesh Rathor @ 2008-01-22 20:40 UTC (permalink / raw)
To: xen-devel
Hi all,
I've a question. how would a cpu know from an IPI, if it's on a trap handler
underneath. Looking at entry.S, I see that trap handlers push entry vector on
stack, so I suppose one could walk down the frames (there's prob a better
way). Moreover, what if the IPI comes right before the entry vector is pushed?
Does x86 disable upon trap?
Thanks for any help,
Mukesh
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: question: trap handler query....
2008-01-22 20:40 question: trap handler query Mukesh Rathor
@ 2008-01-22 21:13 ` Daniel Stodden
0 siblings, 0 replies; 2+ messages in thread
From: Daniel Stodden @ 2008-01-22 21:13 UTC (permalink / raw)
To: mukesh.rathor; +Cc: Xen Developers
On Tue, 2008-01-22 at 12:40 -0800, Mukesh Rathor wrote:
> Hi all,
> I've a question. how would a cpu know from an IPI, if it's on a trap handler
> underneath. Looking at entry.S, I see that trap handlers push entry vector on
> stack, so I suppose one could walk down the frames (there's prob a better
> way).
the better way is to check the interrupted privilege level in the pushed
CS register (bits 1-0). if it's zero, it's been in xen when it happened.
> Moreover, what if the IPI comes right before the entry vector is pushed?
exception entry by itself is atomic. either you get a complete stack
frame (as pushed by the cpu, i.e. up to rip/error_code, i.e. not
including the SAVE_ALL macros) or remain at the instruction yet to cause
the trap. nowhere in between.
> Does x86 disable upon trap?
..interrupts you mean? typically no. only on interrupt gates.
regards,
daniel
--
Daniel Stodden
LRR - Lehrstuhl für Rechnertechnik und Rechnerorganisation
Institut für Informatik der TU München D-85748 Garching
http://www.lrr.in.tum.de/~stodden mailto:stodden@cs.tum.edu
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