Re: simple MPC5200B system

[Andre Schwarz <andre.schwarz@matrix-vision.de>]

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Grant Likely schrieb:
> On Tue, Mar 18, 2008 at 4:34 AM, Andre Schwarz
> <andre.schwarz@matrix-vision.de> wrote:
>   
>>  Grant,
>>
>>  sorry for having troubled you. Looks like the build system has been in an
>> invalid state...
>>
>>  After doing a git-pull and "make distclean" + "make mpc5200_defconfig" the
>> system is finally up and running.
>>     
>
> Heh; I hate it when that happens.  :-)
>
> Congratulations.
>
> g.
>
>
>   
Grant,

this leads to the next questions ... :-)

I've read some discussions about the "interrupt-map" attribute of the 
pci node. I tried to follow Ben and David in their explanations - 
obviously I didn't really get it.
Looks like there are a lot of people outside who need some enlightenment 
... including me, of course.

Maybe you can clarify this ?

Taken from motionpro.dts ...

    interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
                                 c000 0 0 2 &mpc5200_pic 1 1 3
                                 c000 0 0 3 &mpc5200_pic 1 2 3
                                 c000 0 0 4 &mpc5200_pic 1 3 3

                                 c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
                                 c800 0 0 2 &mpc5200_pic 1 2 3
                                 c800 0 0 3 &mpc5200_pic 1 3 3
                                 c800 0 0 4 &mpc5200_pic 0 0 3>;


First parameter seems to be the slot number, i.e. IDSEL line of the PCI 
device.
How is this value coded ? Are these the bits 15..11 of the configuration 
address ?

2nd + 3rd paramter : no clue ! can you explain ?

4th : seem to be INT_A ... _D of a PCI device. Usually a device uses 
only INT_A. Do we need 4 entries in any case ?

5th : ok - parent pic

6th ... 8th  : IRQ representation of the parent pic, which gives :

    6th : 0=CRIT for irq0 pin, 1=MAIN for irq1..3 pins
    7th : irq number. 1 for the irq0 pin inside CRIT level. irq1..3 have 
number 1..3 inside MAIN level.
    8th : should be 3 = "level low" which is default for PCI.




regards,
Andre


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