Re: [PATCH] drm/amdgpu: fix scratch register access method in SRIOV

["Christian König" <ckoenig.leichtzumerken@gmail.com>]

Am 01.06.22 um 09:27 schrieb ZhenGuo Yin:
> The scratch register should be accessed through MMIO instead of RLCG
> in SRIOV, since it being used in RLCG register access function.
>
> Fixes: 0e1314781b9c("drm/amdgpu: nuke dynamic gfx scratch reg allocation")

Maybe better but the register offset into a local constant then.

Apart from that looks good to me.

Regards,
Christian.

> ---
>   drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index c5f46d264b23..8331e0c5e18e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -3784,7 +3784,7 @@ static int gfx_v10_0_ring_test_ring(struct amdgpu_ring *ring)
>   	unsigned i;
>   	int r;
>   
> -	WREG32_SOC15(GC, 0, mmSCRATCH_REG0, 0xCAFEDEAD);
> +	WREG32(SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0), 0xCAFEDEAD);
>   	r = amdgpu_ring_alloc(ring, 3);
>   	if (r) {
>   		DRM_ERROR("amdgpu: cp failed to lock ring %d (%d).\n",
> @@ -3799,7 +3799,7 @@ static int gfx_v10_0_ring_test_ring(struct amdgpu_ring *ring)
>   	amdgpu_ring_commit(ring);
>   
>   	for (i = 0; i < adev->usec_timeout; i++) {
> -		tmp = RREG32_SOC15(GC, 0, mmSCRATCH_REG0);
> +		tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0));
>   		if (tmp == 0xDEADBEEF)
>   			break;
>   		if (amdgpu_emu_mode == 1)