[PATCH v2] ARM: OMAP3: Check for L2 cache enabled

[PATCH v2] ARM: OMAP3: Check for L2 cache enabled

[Dirk Behme]

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Enabling L2 cache of Cortex-A8 based OMAP3 has to be done by 
bootloader. Check if this is done and warn if not.

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>

----

Changes in v2: Fix a typo.

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Index: linux-beagle/arch/arm/mach-omap2/id.c
===================================================================
--- linux-beagle.orig/arch/arm/mach-omap2/id.c
+++ linux-beagle/arch/arm/mach-omap2/id.c
@@ -267,3 +267,26 @@ void __init omap2_check_revision(void)
 
 }
 
+#ifdef CONFIG_ARCH_OMAP3
+/*
+ * OMAP3 has L2 cache which has to be enabled by bootloader.
+ */
+static int __init omap3_check_l2cache(void)
+{
+	u32 val;
+
+	/* Get CP15 AUX register, bit 1 enabled indicates L2 cache is on */
+	asm volatile("mrc p15, 0, %0, c1, c0, 1":"=r" (val));
+
+	if ((val & 0x2) == 0) {
+		printk(KERN_WARNING "Warning: L2 cache not enabled. Check "
+		       "your bootloader. L2 off results in performance loss\n");
+	} else {
+		pr_info("OMAP3 L2 cache enabled");
+	}
+
+	return 0;
+}
+
+arch_initcall(omap3_check_l2cache);
+#endif /* CONFIG_ARCH_OMAP3 */

Re: [PATCH v2] ARM: OMAP3: Check for L2 cache enabled

[Felipe Balbi]

On Sat, May 10, 2008 at 08:41:15PM +0200, Dirk Behme wrote:
>
> Enabling L2 cache of Cortex-A8 based OMAP3 has to be done by bootloader. 
> Check if this is done and warn if not.
>
> Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
>
> ----
>
> Changes in v2: Fix a typo.

> Index: linux-beagle/arch/arm/mach-omap2/id.c
> ===================================================================
> --- linux-beagle.orig/arch/arm/mach-omap2/id.c
> +++ linux-beagle/arch/arm/mach-omap2/id.c
> @@ -267,3 +267,26 @@ void __init omap2_check_revision(void)
>  
>  }
>  
> +#ifdef CONFIG_ARCH_OMAP3
> +/*
> + * OMAP3 has L2 cache which has to be enabled by bootloader.
> + */
> +static int __init omap3_check_l2cache(void)
> +{
> +	u32 val;
> +
> +	/* Get CP15 AUX register, bit 1 enabled indicates L2 cache is on */
> +	asm volatile("mrc p15, 0, %0, c1, c0, 1":"=r" (val));
> +
> +	if ((val & 0x2) == 0) {

The {} are unneeded here.

> +		printk(KERN_WARNING "Warning: L2 cache not enabled. Check "
> +		       "your bootloader. L2 off results in performance loss\n");
> +	} else {

same here.

> +		pr_info("OMAP3 L2 cache enabled");
> +	}
> +
> +	return 0;
> +}
> +
> +arch_initcall(omap3_check_l2cache);
> +#endif /* CONFIG_ARCH_OMAP3 */


-- 
Best Regards,

Felipe Balbi
me@felipebalbi.com
http://blog.felipebalbi.com