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* [Xenomai-core] [PATCH] add Blackfin BF52x, BF54x support to adeos
@ 2008-05-08  8:52 yi li
  2008-05-22  9:02 ` Philippe Gerum
  0 siblings, 1 reply; 4+ messages in thread
From: yi li @ 2008-05-08  8:52 UTC (permalink / raw)
  To: Xenomai-core


[-- Attachment #1.1: Type: text/plain, Size: 413 bytes --]

Hi,

Attached two patches to make xenomai/adeos work with ADI's blackfin process
BF52x and BF54x.

The patches are based on xenomai-2.4.0. It has been tested on BF527-EZkit,
BF548-Ezkit and BF561-Ezkit, using blackfin uClinux 2008R1 branch.

Adeos patch in xenomai-2.4.0 cannot work with blackfin uClinux 2008R1
branch/release. Please use a modified patch at
uclinux-dist/bfin_patch/adeos_patch.

Regards,
-Li Yi

[-- Attachment #1.2: Type: text/html, Size: 462 bytes --]

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: adeos-bf54x.patch --]
[-- Type: text/x-diff; name=adeos-bf54x.patch, Size: 11285 bytes --]

diff -uprN -x .svn linux-kernel/arch/blackfin/kernel/time.c linux-kernel.adeos.new/arch/blackfin/kernel/time.c
--- linux-kernel/arch/blackfin/kernel/time.c	2008-05-08 15:36:46.000000000 +0800
+++ linux-kernel.adeos.new/arch/blackfin/kernel/time.c	2008-05-08 13:58:42.000000000 +0800
@@ -33,6 +33,7 @@
 #include <linux/interrupt.h>
 #include <linux/time.h>
 #include <linux/irq.h>
+#include <linux/delay.h>
 
 #include <asm/blackfin.h>
 #include <asm/time.h>
@@ -64,6 +65,10 @@ time_sched_init(irqreturn_t(*timer_routi
 	/* We use TIMER0 in PWM_OUT, periodic mode. */
 	bfin_write_TIMER_DISABLE(1);    /* Disable TIMER0 for now. */
 	__builtin_bfin_ssync();
+	bfin_write_TIMER_STATUS(0x1000); /* stop timer immediately */
+	__builtin_bfin_ssync();
+	while (bfin_read_TIMER_STATUS() & 0x1000) /* check TRUN0, timer stoped? */
+		mdelay(10);
 	bfin_write_TIMER0_CONFIG(0x59); /* IRQ enable, periodic, PWM_OUT, SCLKed, OUT PAD disabled */
 	__builtin_bfin_ssync();
 	bfin_write_TIMER0_PERIOD(get_sclk() / HZ);
@@ -72,6 +77,7 @@ time_sched_init(irqreturn_t(*timer_routi
 	__builtin_bfin_ssync();
 	bfin_write_TIMER_ENABLE(1);     /* Enable TIMER0. */
 	__builtin_bfin_ssync();
+
 #else /* !CONFIG_IPIPE */
 	u32 tcount;
 
diff -uprN -x .svn linux-kernel/arch/blackfin/mach-bf527/Kconfig linux-kernel.adeos.new/arch/blackfin/mach-bf527/Kconfig
--- linux-kernel/arch/blackfin/mach-bf527/Kconfig	2008-05-08 11:51:03.000000000 +0800
+++ linux-kernel.adeos.new/arch/blackfin/mach-bf527/Kconfig	2008-05-08 15:52:29.000000000 +0800
@@ -170,7 +170,7 @@ config IRQ_PORTH_INTB
 	default 11
 config IRQ_TMR0
 	int "IRQ_TMR0"
-	default 12
+	default 8
 config IRQ_TMR1
 	int "IRQ_TMR1"
 	default 12
diff -uprN -x .svn linux-kernel/arch/blackfin/mach-bf548/Kconfig linux-kernel.adeos.new/arch/blackfin/mach-bf548/Kconfig
--- linux-kernel/arch/blackfin/mach-bf548/Kconfig	2008-05-08 11:51:03.000000000 +0800
+++ linux-kernel.adeos.new/arch/blackfin/mach-bf548/Kconfig	2008-04-30 12:06:51.000000000 +0800
@@ -250,7 +250,7 @@ config IRQ_OTPSEC
 	default 11
 config IRQ_TIMER0
 	int "IRQ_TIMER0"
-	default 11
+	default 8 
 config IRQ_TIMER1
 	int "IRQ_TIMER1"
 	default 11
diff -uprN -x .svn linux-kernel/arch/blackfin/mach-common/ints-priority.c linux-kernel.adeos.new/arch/blackfin/mach-common/ints-priority.c
--- linux-kernel/arch/blackfin/mach-common/ints-priority.c	2008-05-08 15:36:47.000000000 +0800
+++ linux-kernel.adeos.new/arch/blackfin/mach-common/ints-priority.c	2008-05-07 10:21:57.000000000 +0800
@@ -1222,6 +1222,7 @@ int __ipipe_get_irq_priority(unsigned ir
 int __ipipe_get_irqthread_priority(unsigned irq)
 {
 	int ient, prio;
+	int demux_irq;
 
 	/* The returned priority value is rescaled to [0..IVG13+1]
 	 * with 0 being the lowest effective priority level. */
@@ -1229,17 +1230,37 @@ int __ipipe_get_irqthread_priority(unsig
 	if (irq <= IRQ_CORETMR)
 		return IVG13 - irq + 1;
 
-	if (irq == IRQ_PROG_INTA)
-		/* The GPIO demux interrupt is given a lower priority
-		 * than the GPIO IRQs, so that its threaded handler
-		 * unmasks the interrupt line after the decoded IRQs
-		 * have been processed. */
-		return IVG13 - PRIO_GPIODEMUX(irq);
-
-	if (irq >= IRQ_PF0)
-		/* GPIO IRQs are given the priority of the demux
-		 * interrupt. */
-		return IVG13 - PRIO_GPIODEMUX(irq) + 1;
+	/* GPIO IRQs are given the priority of the demux
+	 * interrupt. */
+	if (IS_GPIOIRQ(irq)) {
+#if defined(CONFIG_BF54x)
+		u32 bank = PINT_2_BANK(irq2pint_lut[irq - SYS_IRQS]);
+		demux_irq = (bank == 0 ? IRQ_PINT0 :
+				bank == 1 ? IRQ_PINT1 :
+				bank == 2 ? IRQ_PINT2 :
+				IRQ_PINT3);
+#elif defined(CONFIG_BF561)
+		demux_irq = (irq >= IRQ_PF32 ? IRQ_PROG2_INTA :
+				irq >= IRQ_PF16 ? IRQ_PROG1_INTA :
+				IRQ_PROG0_INTA);
+#elif defined(CONFIG_BF52x)
+		demux_irq = (irq >= IRQ_PH0 ? IRQ_PORTH_INTA :	
+				irq >= IRQ_PG0 ? IRQ_PORTG_INTA :	
+				IRQ_PORTF_INTA);	
+#else
+		demux_irq = irq;
+#endif
+		return IVG13 - PRIO_GPIODEMUX(demux_irq) + 1;
+	}
+	
+	/* The GPIO demux interrupt is given a lower priority
+	 * than the GPIO IRQs, so that its threaded handler
+	 * unmasks the interrupt line after the decoded IRQs
+	 * have been processed. */
+	prio = PRIO_GPIODEMUX(irq);
+	/* demux irq? */
+	if (prio != -1) 
+		return IVG13 - prio;
 
 	for (ient = 0; ient < NR_PERI_INTS; ient++) {
 		struct ivgx *ivg = ivg_table + ient;
@@ -1265,7 +1286,6 @@ asmlinkage int __ipipe_grab_irq(int vec,
 {
 	struct ivgx *ivg_stop = ivg7_13[vec-IVG7].istop;
 	struct ivgx *ivg = ivg7_13[vec-IVG7].ifirst;
-	unsigned long sic_status;
 	int irq;
 
 	if (likely(vec == EVT_IVTMR_P)) {
@@ -1274,16 +1294,37 @@ asmlinkage int __ipipe_grab_irq(int vec,
 	}
 
 	__builtin_bfin_ssync();
- 	sic_status = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR();
 
-	for(;; ivg++) {
-		if (ivg >= ivg_stop)  {
+#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
+	unsigned long sic_status[3];
+
+	sic_status[0] = bfin_read_SIC_ISR0() & bfin_read_SIC_IMASK0();
+	sic_status[1] = bfin_read_SIC_ISR1() & bfin_read_SIC_IMASK1();
+#ifdef CONFIG_BF54x
+	sic_status[2] = bfin_read_SIC_ISR2() & bfin_read_SIC_IMASK2();
+#endif
+	for (;; ivg++) {
+		if (ivg >= ivg_stop) {
+			atomic_inc(&num_spurious);
+			return 0;
+		}
+		if (sic_status[(ivg->irqno - IVG7) / 32] & ivg->isrflag)
+				break;
+	}
+#else
+	unsigned long sic_status;
+
+	sic_status = bfin_read_SIC_IMASK() & bfin_read_SIC_ISR();
+
+	for (;; ivg++) {
+		if (ivg >= ivg_stop) {
 			atomic_inc(&num_spurious);
 			return 0;
 		}
 		else if (sic_status & ivg->isrflag)
 			break;
 	}
+#endif
 
 	irq = ivg->irqno;
 
diff -uprN -x .svn linux-kernel/drivers/serial/bfin_5xx.c linux-kernel.adeos.new/drivers/serial/bfin_5xx.c
--- linux-kernel/drivers/serial/bfin_5xx.c	2008-05-08 15:36:47.000000000 +0800
+++ linux-kernel.adeos.new/drivers/serial/bfin_5xx.c	2008-05-06 16:10:04.000000000 +0800
@@ -1081,9 +1081,11 @@ void __ipipe_serial_debug(const char *fm
 			status = UART_GET_LSR(uart);
 		} while (!(status & THRE));
 
+#ifndef CONFIG_BF54x
 		tmp = UART_GET_LCR(uart);
 		tmp &= ~DLAB;
 		UART_PUT_LCR(uart, tmp);
+#endif
 
 		UART_PUT_CHAR(uart, buf[i]);
 		if (buf[i] == '\n') {
diff -uprN -x .svn linux-kernel/include/asm-blackfin/ipipe.h linux-kernel.adeos.new/include/asm-blackfin/ipipe.h
--- linux-kernel/include/asm-blackfin/ipipe.h	2008-05-08 15:36:47.000000000 +0800
+++ linux-kernel.adeos.new/include/asm-blackfin/ipipe.h	2008-05-07 15:56:12.000000000 +0800
@@ -221,6 +221,9 @@ void ipipe_init_irq_threads(void);
 
 int ipipe_start_irq_thread(unsigned irq, struct irq_desc *desc);
 
+#define IS_SYSIRQ(irq)		((irq) > IRQ_CORETMR && (irq) <= SYS_IRQS)
+#define IS_GPIOIRQ(irq)		((irq) >= GPIO_IRQ_BASE && (irq) < NR_IRQS)
+
 #if defined(CONFIG_BF533)
 #define IRQ_SYSTMR		IRQ_TMR0
 #define IRQ_PRIOTMR		CONFIG_TIMER0
@@ -229,15 +232,34 @@ int ipipe_start_irq_thread(unsigned irq,
 #define IRQ_SYSTMR		IRQ_TMR0
 #define IRQ_PRIOTMR		CONFIG_IRQ_TMR0
 #define PRIO_GPIODEMUX(irq)	CONFIG_IRQ_PROG_INTA
+#elif defined(CONFIG_BF52x)
+#define IRQ_SYSTMR		IRQ_TMR0
+#define IRQ_PRIOTMR		CONFIG_IRQ_TMR0
+#define PRIO_GPIODEMUX(irq)	((irq) == IRQ_PORTF_INTA ? CONFIG_IRQ_PORTF_INTA : \
+				 (irq) == IRQ_PORTG_INTA ? CONFIG_IRQ_PORTG_INTA : \
+				 (irq) == IRQ_PORTH_INTA ? CONFIG_IRQ_PORTH_INTA : \
+				 -1)
 #elif defined(CONFIG_BF561)
 #define IRQ_SYSTMR		IRQ_TIMER0
 #define IRQ_PRIOTMR		CONFIG_IRQ_TIMER0
 #define PRIO_GPIODEMUX(irq)	((irq) == IRQ_PROG0_INTA ? CONFIG_IRQ_PROG0_INTA : \
 				 (irq) == IRQ_PROG1_INTA ? CONFIG_IRQ_PROG1_INTA : \
-				 CONFIG_IRQ_PROG2_INTA)
+				 (irq) == IRQ_PROG2_INTA ? CONFIG_IRQ_PROG2_INTA : \
+				 -1)
 #define bfin_write_TIMER_DISABLE(val)	bfin_write_TMRS8_DISABLE(val)
 #define bfin_write_TIMER_ENABLE(val)	bfin_write_TMRS8_ENABLE(val)
 #define bfin_write_TIMER_STATUS(val)	bfin_write_TMRS8_STATUS(val)
+#elif defined(CONFIG_BF548)
+#define IRQ_SYSTMR		IRQ_TIMER0
+#define IRQ_PRIOTMR		CONFIG_IRQ_TIMER0
+#define PRIO_GPIODEMUX(irq)	((irq) == IRQ_PINT0 ? CONFIG_IRQ_PINT0 : \
+				 (irq) == IRQ_PINT1 ? CONFIG_IRQ_PINT1 : \
+				 (irq) == IRQ_PINT2 ? CONFIG_IRQ_PINT2 : \
+				 (irq) == IRQ_PINT3 ? CONFIG_IRQ_PINT3 : \
+				 -1)
+#define bfin_write_TIMER_DISABLE(val)	bfin_write_TIMER_DISABLE0(val)
+#define bfin_write_TIMER_ENABLE(val)	bfin_write_TIMER_ENABLE0(val)
+#define bfin_write_TIMER_STATUS(val)	bfin_write_TIMER_STATUS0(val)
 #endif
 
 #else /* !CONFIG_IPIPE */
diff -uprN -x .svn linux-kernel/include/asm-blackfin/mach-bf527/cdefBF52x_base.h linux-kernel.adeos.new/include/asm-blackfin/mach-bf527/cdefBF52x_base.h
--- linux-kernel/include/asm-blackfin/mach-bf527/cdefBF52x_base.h	2008-05-08 11:46:42.000000000 +0800
+++ linux-kernel.adeos.new/include/asm-blackfin/mach-bf527/cdefBF52x_base.h	2008-05-06 17:55:37.000000000 +0800
@@ -51,7 +51,7 @@ static __inline__ void bfin_write_PLL_CT
 	if (val == bfin_read_PLL_CTL())
 		return;
 
-	local_irq_save(flags);
+	local_irq_save_hw(flags);
 	/* Enable the PLL Wakeup bit in SIC IWR */
 	iwr0 = bfin_read32(SIC_IWR0);
 	iwr1 = bfin_read32(SIC_IWR1);
@@ -65,7 +65,7 @@ static __inline__ void bfin_write_PLL_CT
 
 	bfin_write32(SIC_IWR0, iwr0);
 	bfin_write32(SIC_IWR1, iwr1);
-	local_irq_restore(flags);
+	local_irq_restore_hw(flags);
 }
 #define bfin_read_PLL_DIV()			bfin_read16(PLL_DIV)
 #define bfin_write_PLL_DIV(val)			bfin_write16(PLL_DIV, val)
@@ -78,7 +78,7 @@ static __inline__ void bfin_write_VR_CTL
 	if (val == bfin_read_VR_CTL())
 		return;
 
-	local_irq_save(flags);
+	local_irq_save_hw(flags);
 	/* Enable the PLL Wakeup bit in SIC IWR */
 	iwr0 = bfin_read32(SIC_IWR0);
 	iwr1 = bfin_read32(SIC_IWR1);
@@ -92,7 +92,7 @@ static __inline__ void bfin_write_VR_CTL
 
 	bfin_write32(SIC_IWR0, iwr0);
 	bfin_write32(SIC_IWR1, iwr1);
-	local_irq_restore(flags);
+	local_irq_restore_hw(flags);
 }
 #define bfin_read_PLL_STAT()			bfin_read16(PLL_STAT)
 #define bfin_write_PLL_STAT(val)		bfin_write16(PLL_STAT, val)
diff -uprN -x .svn linux-kernel/include/asm-blackfin/mach-bf527/irq.h linux-kernel.adeos.new/include/asm-blackfin/mach-bf527/irq.h
--- linux-kernel/include/asm-blackfin/mach-bf527/irq.h	2008-05-08 11:46:42.000000000 +0800
+++ linux-kernel.adeos.new/include/asm-blackfin/mach-bf527/irq.h	2008-05-06 18:04:13.000000000 +0800
@@ -121,6 +121,9 @@
 #define IRQ_USB_INT2		BFIN_IRQ(54)	/* USB_INT2 Interrupt */
 #define IRQ_USB_DMA		BFIN_IRQ(55)	/* USB_DMAINT Interrupt */
 
+#define IRQ_SW_INT1		BFIN_IRQ(56)
+#define IRQ_SW_INT2		BFIN_IRQ(57)
+
 #define SYS_IRQS        	BFIN_IRQ(63)	/* 70 */
 
 #define IRQ_PF0         71
diff -uprN -x .svn linux-kernel/include/asm-blackfin/mach-bf548/irq.h linux-kernel.adeos.new/include/asm-blackfin/mach-bf548/irq.h
--- linux-kernel/include/asm-blackfin/mach-bf548/irq.h	2008-05-08 11:46:41.000000000 +0800
+++ linux-kernel.adeos.new/include/asm-blackfin/mach-bf548/irq.h	2008-05-06 15:43:42.000000000 +0800
@@ -158,7 +158,10 @@ Events         (highest priority)  EMU  
 #define IRQ_PINT2		BFIN_IRQ(94)	/* PINT2 Interrupt */
 #define IRQ_PINT3		BFIN_IRQ(95)	/* PINT3 Interrupt */
 
-#define SYS_IRQS        	IRQ_PINT3
+#define	IRQ_SW_INT1		BFIN_IRQ(96)	/*Software Int 1 */
+#define	IRQ_SW_INT2		BFIN_IRQ(97)	/*Software Int 2 (reserved for SYSCALL) */
+
+#define SYS_IRQS        	IRQ_SW_INT2
 
 #define BFIN_PA_IRQ(x)		((x) + SYS_IRQS + 1)
 #define IRQ_PA0			BFIN_PA_IRQ(0)

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #3: xenomai-bf54x.patch --]
[-- Type: text/x-diff; name=xenomai-bf54x.patch, Size: 543 bytes --]

Index: xenomai-2.4.0/include/asm-blackfin/calibration.h
===================================================================
--- xenomai-2.4.0/include/asm-blackfin/calibration.h	(revision 6654)
+++ xenomai-2.4.0/include/asm-blackfin/calibration.h	(working copy)
@@ -36,6 +36,10 @@
 #define __sched_latency 7500
 #elif defined(CONFIG_BF561)
 #define __sched_latency 3000
+#elif defined(CONFIG_BF54x)
+#define __sched_latency 3000
+#elif defined(CONFIG_BF52x)
+#define __sched_latency 3000
 #else
 #error "unsupported Blackfin processor"
 #endif

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Xenomai-core] [PATCH] add Blackfin BF52x, BF54x support to adeos
  2008-05-08  8:52 [Xenomai-core] [PATCH] add Blackfin BF52x, BF54x support to adeos yi li
@ 2008-05-22  9:02 ` Philippe Gerum
  2008-05-28  7:19   ` yi li
  0 siblings, 1 reply; 4+ messages in thread
From: Philippe Gerum @ 2008-05-22  9:02 UTC (permalink / raw)
  To: yi li; +Cc: Xenomai-core

yi li wrote:
> Hi,
> 
> Attached two patches to make xenomai/adeos work with ADI's blackfin
> process BF52x and BF54x.
> 
> The patches are based on xenomai-2.4.0. It has been tested on
> BF527-EZkit, BF548-Ezkit and BF561-Ezkit, using blackfin uClinux 2008R1
> branch.
>

Merged, thanks.

> Adeos patch in xenomai-2.4.0 cannot work with blackfin uClinux 2008R1
> branch/release. Please use a modified patch at
> uclinux-dist/bfin_patch/adeos_patch.
> 
> Regards,
> -Li Yi
> 
> 
> 
> 
> ------------------------------------------------------------------------
> 
> _______________________________________________
> Xenomai-core mailing list
> Xenomai-core@domain.hid
> https://mail.gna.org/listinfo/xenomai-core


-- 
Philippe.


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Xenomai-core] [PATCH] add Blackfin BF52x, BF54x support to adeos
  2008-05-22  9:02 ` Philippe Gerum
@ 2008-05-28  7:19   ` yi li
  2008-06-02 19:25     ` Philippe Gerum
  0 siblings, 1 reply; 4+ messages in thread
From: yi li @ 2008-05-28  7:19 UTC (permalink / raw)
  To: rpm; +Cc: Xenomai-core

[-- Attachment #1: Type: text/plain, Size: 261 bytes --]

Hi Philippe,

Attached patch adds other two fixes to make adeos work on BF548. The
patch is based on previous adeos-bf54x.patch. Please have a look.

Regards,

-Yi

On Thu, May 22, 2008 at 5:02 PM, Philippe Gerum <rpm@xenomai.org> wrote:

>
> Merged, thanks.
>

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #2: adeos-bf54x_2.patch --]
[-- Type: text/x-diff; name=adeos-bf54x_2.patch, Size: 3486 bytes --]

diff -uprN -x .svn linux-kernel/arch/blackfin/mach-common/ints-priority.c linux-kernel.2/arch/blackfin/mach-common/ints-priority.c
--- linux-kernel/arch/blackfin/mach-common/ints-priority.c	2008-05-28 14:44:56.000000000 +0800
+++ linux-kernel.2/arch/blackfin/mach-common/ints-priority.c	2008-05-28 15:14:51.000000000 +0800
@@ -1024,46 +1024,96 @@ int __init init_arch_irq(void)
 # endif
 #elif defined(CONFIG_BF54x)
 			case IRQ_PINT0:
+#ifdef CONFIG_IPIPE
+				__set_irq_demux_handler(irq, bfin_demux_gpio_irq,
+						1, "GPIO demux");
+#else /* !CONFIG_IPIPE */
 				set_irq_chained_handler(irq,
 							bfin_demux_gpio_irq);
+#endif
 				break;
 			case IRQ_PINT1:
+#ifdef CONFIG_IPIPE
+				__set_irq_demux_handler(irq, bfin_demux_gpio_irq,
+						1, "GPIO demux");
+#else /* !CONFIG_IPIPE */
 				set_irq_chained_handler(irq,
 							bfin_demux_gpio_irq);
+#endif
 				break;
 			case IRQ_PINT2:
+#ifdef CONFIG_IPIPE
+				__set_irq_demux_handler(irq, bfin_demux_gpio_irq,
+						1, "GPIO demux");
+#else /* !CONFIG_IPIPE */
 				set_irq_chained_handler(irq,
 							bfin_demux_gpio_irq);
+#endif
 				break;
 			case IRQ_PINT3:
+#ifdef CONFIG_IPIPE
+				__set_irq_demux_handler(irq, bfin_demux_gpio_irq,
+						1, "GPIO demux");
+#else /* !CONFIG_IPIPE */
 				set_irq_chained_handler(irq,
 							bfin_demux_gpio_irq);
+#endif
 				break;
 #elif defined(CONFIG_BF52x)
 			case IRQ_PORTF_INTA:
+#ifdef CONFIG_IPIPE
+				__set_irq_demux_handler(irq, bfin_demux_gpio_irq,
+						1, "GPIO demux");
+#else /* !CONFIG_IPIPE */
 				set_irq_chained_handler(irq,
 							bfin_demux_gpio_irq);
+#endif
 				break;
 			case IRQ_PORTG_INTA:
+#ifdef CONFIG_IPIPE
+				__set_irq_demux_handler(irq, bfin_demux_gpio_irq,
+						1, "GPIO demux");
+#else /* !CONFIG_IPIPE */
 				set_irq_chained_handler(irq,
 							bfin_demux_gpio_irq);
+#endif
 				break;
 			case IRQ_PORTH_INTA:
+#ifdef CONFIG_IPIPE
+				__set_irq_demux_handler(irq, bfin_demux_gpio_irq,
+						1, "GPIO demux");
+#else /* !CONFIG_IPIPE */
 				set_irq_chained_handler(irq,
 							bfin_demux_gpio_irq);
+#endif
 				break;
 #elif defined(CONFIG_BF561)
 			case IRQ_PROG0_INTA:
+#ifdef CONFIG_IPIPE
+				__set_irq_demux_handler(irq, bfin_demux_gpio_irq,
+						1, "GPIO demux");
+#else /* !CONFIG_IPIPE */
 				set_irq_chained_handler(irq,
 							bfin_demux_gpio_irq);
+#endif
 				break;
 			case IRQ_PROG1_INTA:
+#ifdef CONFIG_IPIPE
+				__set_irq_demux_handler(irq, bfin_demux_gpio_irq,
+						1, "GPIO demux");
+#else /* !CONFIG_IPIPE */
 				set_irq_chained_handler(irq,
 							bfin_demux_gpio_irq);
+#endif
 				break;
 			case IRQ_PROG2_INTA:
+#ifdef CONFIG_IPIPE
+				__set_irq_demux_handler(irq, bfin_demux_gpio_irq,
+						1, "GPIO demux");
+#else /* !CONFIG_IPIPE */
 				set_irq_chained_handler(irq,
 							bfin_demux_gpio_irq);
+#endif
 				break;
 #endif
 			default:
diff -uprN -x .svn linux-kernel/include/asm-blackfin/ipipe.h linux-kernel.2/include/asm-blackfin/ipipe.h
--- linux-kernel/include/asm-blackfin/ipipe.h	2008-05-28 14:44:56.000000000 +0800
+++ linux-kernel.2/include/asm-blackfin/ipipe.h	2008-05-28 15:14:51.000000000 +0800
@@ -260,6 +260,7 @@ int ipipe_start_irq_thread(unsigned irq,
 #define bfin_write_TIMER_DISABLE(val)	bfin_write_TIMER_DISABLE0(val)
 #define bfin_write_TIMER_ENABLE(val)	bfin_write_TIMER_ENABLE0(val)
 #define bfin_write_TIMER_STATUS(val)	bfin_write_TIMER_STATUS0(val)
+#define bfin_read_TIMER_STATUS(val)	bfin_read_TIMER_STATUS0(val)
 #endif
 
 #else /* !CONFIG_IPIPE */

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Xenomai-core] [PATCH] add Blackfin BF52x, BF54x support to adeos
  2008-05-28  7:19   ` yi li
@ 2008-06-02 19:25     ` Philippe Gerum
  0 siblings, 0 replies; 4+ messages in thread
From: Philippe Gerum @ 2008-06-02 19:25 UTC (permalink / raw)
  To: yi li; +Cc: Xenomai-core

yi li wrote:
> Hi Philippe,
> 
> Attached patch adds other two fixes to make adeos work on BF548. The
> patch is based on previous adeos-bf54x.patch. Please have a look.
>

Merged, thanks.

-- 
Philippe.


^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2008-06-02 19:25 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2008-05-08  8:52 [Xenomai-core] [PATCH] add Blackfin BF52x, BF54x support to adeos yi li
2008-05-22  9:02 ` Philippe Gerum
2008-05-28  7:19   ` yi li
2008-06-02 19:25     ` Philippe Gerum

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