From: Heiko Stuebner <heiko@sntech.de>
To: Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Linus Walleij <linus.walleij@linaro.org>,
linux-arm-kernel@lists.infradead.org
Cc: Samuel Holland <samuel@sholland.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Maxime Ripard <mripard@kernel.org>, Ondrej Jirman <x@xff.cz>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-sunxi@lists.linux.dev, Samuel Holland <samuel@sholland.org>
Subject: Re: [PATCH 1/6] dt-bindings: pinctrl: Add compatibles for Allwinner D1/D1s
Date: Fri, 01 Jul 2022 15:02:23 +0200 [thread overview]
Message-ID: <4880134.Sgy9Pd6rRy@phil> (raw)
In-Reply-To: <20220626021148.56740-2-samuel@sholland.org>
Am Sonntag, 26. Juni 2022, 04:11:42 CEST schrieb Samuel Holland:
> D1 contains a pin controller similar to previous SoCs, but with some
> register layout changes. It includes 6 interrupt-capable pin banks.
>
> D1s is a low pin count version of the D1 SoC, with some pins omitted.
> The remaining pins have the same function assignments as D1.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
On a D1-Nezha
Tested-by: Heiko Stuebner <heiko@sntech.de>
WARNING: multiple messages have this Message-ID (diff)
From: Heiko Stuebner <heiko@sntech.de>
To: Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Linus Walleij <linus.walleij@linaro.org>,
linux-arm-kernel@lists.infradead.org
Cc: Samuel Holland <samuel@sholland.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Maxime Ripard <mripard@kernel.org>, Ondrej Jirman <x@xff.cz>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-sunxi@lists.linux.dev, Samuel Holland <samuel@sholland.org>
Subject: Re: [PATCH 1/6] dt-bindings: pinctrl: Add compatibles for Allwinner D1/D1s
Date: Fri, 01 Jul 2022 15:02:23 +0200 [thread overview]
Message-ID: <4880134.Sgy9Pd6rRy@phil> (raw)
In-Reply-To: <20220626021148.56740-2-samuel@sholland.org>
Am Sonntag, 26. Juni 2022, 04:11:42 CEST schrieb Samuel Holland:
> D1 contains a pin controller similar to previous SoCs, but with some
> register layout changes. It includes 6 interrupt-capable pin banks.
>
> D1s is a low pin count version of the D1 SoC, with some pins omitted.
> The remaining pins have the same function assignments as D1.
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
On a D1-Nezha
Tested-by: Heiko Stuebner <heiko@sntech.de>
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next prev parent reply other threads:[~2022-07-01 13:02 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-26 2:11 [PATCH 0/6] pinctrl: sunxi: Allwinner D1/D1s support Samuel Holland
2022-06-26 2:11 ` Samuel Holland
2022-06-26 2:11 ` [PATCH 1/6] dt-bindings: pinctrl: Add compatibles for Allwinner D1/D1s Samuel Holland
2022-06-26 2:11 ` Samuel Holland
2022-06-26 10:37 ` Krzysztof Kozlowski
2022-06-26 10:37 ` Krzysztof Kozlowski
2022-07-01 13:02 ` Heiko Stuebner [this message]
2022-07-01 13:02 ` Heiko Stuebner
2022-07-11 8:58 ` Linus Walleij
2022-07-11 8:58 ` Linus Walleij
2022-07-12 10:14 ` Samuel Holland
2022-07-12 10:14 ` Samuel Holland
2022-07-13 2:56 ` Samuel Holland
2022-07-13 2:56 ` Samuel Holland
2022-06-26 2:11 ` [PATCH 2/6] pinctrl: sunxi: Add I/O bias setting for H6 R-PIO Samuel Holland
2022-06-26 2:11 ` Samuel Holland
2022-06-27 20:34 ` Jernej Škrabec
2022-06-27 20:34 ` Jernej Škrabec
2022-06-28 3:18 ` Samuel Holland
2022-06-28 3:18 ` Samuel Holland
2022-07-01 13:03 ` Heiko Stuebner
2022-07-01 13:03 ` Heiko Stuebner
2022-06-26 2:11 ` [PATCH 3/6] pinctrl: sunxi: Support the 2.5V I/O bias mode Samuel Holland
2022-06-26 2:11 ` Samuel Holland
2022-06-27 20:43 ` Jernej Škrabec
2022-06-27 20:43 ` Jernej Škrabec
2022-06-28 3:29 ` Samuel Holland
2022-06-28 3:29 ` Samuel Holland
2022-07-02 19:48 ` Jernej Škrabec
2022-07-02 19:48 ` Jernej Škrabec
2022-07-01 13:04 ` Heiko Stuebner
2022-07-01 13:04 ` Heiko Stuebner
2022-06-26 2:11 ` [PATCH 4/6] pinctrl: sunxi: Refactor register/offset calculation Samuel Holland
2022-06-26 2:11 ` Samuel Holland
2022-07-01 13:07 ` Heiko Stuebner
2022-07-01 13:07 ` Heiko Stuebner
2022-07-02 20:29 ` Jernej Škrabec
2022-07-02 20:29 ` Jernej Škrabec
2022-06-26 2:11 ` [PATCH 5/6] pinctrl: sunxi: Make some layout parameters dynamic Samuel Holland
2022-06-26 2:11 ` Samuel Holland
2022-07-01 13:09 ` Heiko Stuebner
2022-07-01 13:09 ` Heiko Stuebner
2022-07-02 20:33 ` Jernej Škrabec
2022-07-02 20:33 ` Jernej Škrabec
2022-06-26 2:11 ` [PATCH 6/6] pinctrl: sunxi: Add driver for Allwinner D1/D1s Samuel Holland
2022-06-26 2:11 ` Samuel Holland
2022-07-01 13:13 ` Heiko Stuebner
2022-07-01 13:13 ` Heiko Stuebner
2022-07-01 15:16 ` Samuel Holland
2022-07-01 15:16 ` Samuel Holland
2022-07-02 14:47 ` Andre Przywara
2022-07-02 14:47 ` Andre Przywara
2022-07-02 15:43 ` Samuel Holland
2022-07-02 15:43 ` Samuel Holland
2022-07-04 9:42 ` Andre Przywara
2022-07-04 9:42 ` Andre Przywara
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