From: "Jan Beulich" <jbeulich@novell.com>
To: Kevin Tian <kevin.tian@intel.com>,
"xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>
Subject: Re: [Patch] x86: enforce strict memory order for x2apic
Date: Thu, 25 Sep 2008 09:24:47 +0100 [thread overview]
Message-ID: <48DB66EF.76E4.0078.0@novell.com> (raw)
In-Reply-To: <D8078B8B3B09934AA9F8F2D5FB3F28CE08873AF318@pdsmsx502.ccr.corp.intel.com>
>>> "Tian, Kevin" <kevin.tian@intel.com> 25.09.08 08:55 >>>
>We kick a fix by simply using 'mb' instead of 'wmb'.
>This can effectively enforce program order, as args
>for WRMSR are loaded from memory. Those memory loads
>are ordered by mb and so does WRMSR. Alternative is
The whole change looks a little dubious to me, perhaps largely as I can't
spot which WRMSR (loading its arguments from memory) you're talking
about.
>to add a 'fence' parameter to send_IPI_mask and then
>only use 'mb' in x2apic version. We think it's not
>necessary to go with that complexity.
On the other hand you're penalizing LAPIC systems with this, too. I'm
not certain that's better than fixing the (incorrect) assumptions just in
the x2APIC case.
Jan
next prev parent reply other threads:[~2008-09-25 8:24 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-09-25 6:55 [Patch] x86: enforce strict memory order for x2apic Tian, Kevin
2008-09-25 8:24 ` Jan Beulich [this message]
2008-09-25 8:29 ` Tian, Kevin
2008-09-25 8:36 ` Keir Fraser
2008-09-25 8:38 ` Tian, Kevin
2008-09-25 8:40 ` Tian, Kevin
2008-09-25 9:04 ` Keir Fraser
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