[Qemu-devel] [RESEND] [PATCH] Add Core Duo Definition

[Qemu-devel] [RESEND] [PATCH] Add Core Duo Definition

[Alexander Graf]

[-- Attachment #1: Type: text/plain, Size: 742 bytes --]

Hi,

This patch adds a CPU definition for the Core Duo CPU. I tried to
resemble the original as closely as possible and document what features
are missing still. This patch enables the use of a recent CPU definition
on 32 bit platforms.

It also fixes two issues that went along the line:

- invalid xlevel in core2duo spec
   While looking though the CPUIDs again, I found that xlevel is actually 8.

- non-PSE36 support
   The CoreDuo CPUID does not expose the PSE36 capability, but CPUID
0x80000008 is tied to 36 bits. This broke Windows XP installation for
me, so I just set it to 32 bits width when PSE36 is not available. The
original CPU also exposes 32 bit width in CPUID 0x80000008.

Signed-off-by: Alexander Graf <agraf@suse.de>




[-- Attachment #2: coreduo.patch --]
[-- Type: text/x-patch, Size: 2063 bytes --]

Index: target-i386/helper.c
===================================================================
--- target-i386/helper.c	(revision 5433)
+++ target-i386/helper.c	(working copy)
@@ -183,7 +183,7 @@
         .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3,
         .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
         /* Missing: .ext3_features = CPUID_EXT3_LAHF_LM */
-        .xlevel = 0x8000000A,
+        .xlevel = 0x80000008,
         .model_id = "Intel(R) Core(TM)2 Duo CPU     T7700  @ 2.40GHz",
     },
 #endif
@@ -199,6 +199,25 @@
         .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
     },
     {
+        .name = "coreduo",
+        .level = 10,
+        .family = 6,
+        .model = 14,
+        .stepping = 8,
+	/* The original CPU also implements these features:
+               CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT,
+               CPUID_TM, CPUID_PBE */
+        .features = PPRO_FEATURES | CPUID_VME |
+            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA,
+	/* The original CPU also implements these ext features:
+               CPUID_EXT_VMX, CPUID_EXT_EST, CPUID_EXT_TM2, CPUID_EXT_XTPR,
+               CPUID_EXT_PDCM */
+        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
+        .ext2_features = CPUID_EXT2_NX,
+        .xlevel = 0x80000008,
+        .model_id = "Genuine Intel(R) CPU           T2600  @ 2.16GHz",
+    },
+    {
         .name = "486",
         .level = 0,
         .family = 4,
Index: target-i386/op_helper.c
===================================================================
--- target-i386/op_helper.c	(revision 5433)
+++ target-i386/op_helper.c	(working copy)
@@ -2026,7 +2026,10 @@
 #if defined(USE_KQEMU)
             EAX = 0x00000020;	/* 32 bits physical */
 #else
-            EAX = 0x00000024;	/* 36 bits physical */
+            if (env->cpuid_features & CPUID_PSE36)
+                EAX = 0x00000024; /* 36 bits physical */
+            else
+                EAX = 0x00000020; /* 32 bits physical */
 #endif
         }
         EBX = 0;

Re: [Qemu-devel] [RESEND] [PATCH] Add Core Duo Definition

[Aurelien Jarno]

On Tue, Oct 14, 2008 at 01:08:43PM +0200, Alexander Graf wrote:
> Hi,
> 
> This patch adds a CPU definition for the Core Duo CPU. I tried to
> resemble the original as closely as possible and document what features
> are missing still. This patch enables the use of a recent CPU definition
> on 32 bit platforms.
> 
> It also fixes two issues that went along the line:
> 
> - invalid xlevel in core2duo spec
>   While looking though the CPUIDs again, I found that xlevel is actually 8.
> 
> - non-PSE36 support
>   The CoreDuo CPUID does not expose the PSE36 capability, but CPUID
> 0x80000008 is tied to 36 bits. This broke Windows XP installation for
> me, so I just set it to 32 bits width when PSE36 is not available. The
> original CPU also exposes 32 bit width in CPUID 0x80000008.

Thanks, applied.

> Index: target-i386/helper.c
> ===================================================================
> --- target-i386/helper.c	(revision 5433)
> +++ target-i386/helper.c	(working copy)
> @@ -183,7 +183,7 @@
>          .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3,
>          .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
>          /* Missing: .ext3_features = CPUID_EXT3_LAHF_LM */
> -        .xlevel = 0x8000000A,
> +        .xlevel = 0x80000008,
>          .model_id = "Intel(R) Core(TM)2 Duo CPU     T7700  @ 2.40GHz",
>      },
>  #endif
> @@ -199,6 +199,25 @@
>          .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
>      },
>      {
> +        .name = "coreduo",
> +        .level = 10,
> +        .family = 6,
> +        .model = 14,
> +        .stepping = 8,
> +	/* The original CPU also implements these features:
> +               CPUID_DTS, CPUID_ACPI, CPUID_SS, CPUID_HT,
> +               CPUID_TM, CPUID_PBE */
> +        .features = PPRO_FEATURES | CPUID_VME |
> +            CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA,
> +	/* The original CPU also implements these ext features:
> +               CPUID_EXT_VMX, CPUID_EXT_EST, CPUID_EXT_TM2, CPUID_EXT_XTPR,
> +               CPUID_EXT_PDCM */
> +        .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR,
> +        .ext2_features = CPUID_EXT2_NX,
> +        .xlevel = 0x80000008,
> +        .model_id = "Genuine Intel(R) CPU           T2600  @ 2.16GHz",
> +    },
> +    {
>          .name = "486",
>          .level = 0,
>          .family = 4,
> Index: target-i386/op_helper.c
> ===================================================================
> --- target-i386/op_helper.c	(revision 5433)
> +++ target-i386/op_helper.c	(working copy)
> @@ -2026,7 +2026,10 @@
>  #if defined(USE_KQEMU)
>              EAX = 0x00000020;	/* 32 bits physical */
>  #else
> -            EAX = 0x00000024;	/* 36 bits physical */
> +            if (env->cpuid_features & CPUID_PSE36)
> +                EAX = 0x00000024; /* 36 bits physical */
> +            else
> +                EAX = 0x00000020; /* 32 bits physical */
>  #endif
>          }
>          EBX = 0;
> 


-- 
  .''`.  Aurelien Jarno	            | GPG: 1024D/F1BCDB73
 : :' :  Debian developer           | Electrical Engineer
 `. `'   aurel32@debian.org         | aurelien@aurel32.net
   `-    people.debian.org/~aurel32 | www.aurel32.net