[Qemu-devel] Re: [PATCH] x86: Fix conditions for Virtual Wire IRQ delivery

[Jan Kiszka <jan.kiszka@siemens.com>]

Jan Kiszka wrote:
> QEMU is implementing the Virtual Wire mode to attach the PIC to modern,
> APIC-supporting CPUs. But Intel's MP spec says that PIC interrupts then
> flow through the APICs, thus they also have to be enabled. Patch below
> fixes the test logic accordingly, avoiding delivery in case an APIC is
> disabled.
> 
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
>  hw/apic.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> Index: b/hw/apic.c
> ===================================================================
> --- a/hw/apic.c
> +++ b/hw/apic.c
> @@ -526,7 +526,7 @@ int apic_accept_pic_intr(CPUState *env)
>  
>      lvt0 = s->lvt[APIC_LVT_LINT0];
>  
> -    if ((s->apicbase & MSR_IA32_APICBASE_ENABLE) == 0 ||
> +    if ((s->apicbase & MSR_IA32_APICBASE_ENABLE) &&
>          (lvt0 & APIC_LVT_MASKED) == 0)
>          return 1;
>  

This patch turned out to be incorrect (SDM 3A, 5.3.1), please ignore it.

Jan

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