* [PATCH 00/10] Restructure EMMA2RH port
@ 2008-10-23 16:23 Shinya Kuribayashi
2008-10-23 16:27 ` [PATCH 01/12] MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processors Shinya Kuribayashi
` (12 more replies)
0 siblings, 13 replies; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-23 16:23 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
Hi,
there have been many NEC EMMA SoCs so far, and with great pleasure we
have many Linux ports running on EMMA these days. Even though most
those ports are not submitted to upstream, but I'd like to reorganize
current EMMA2RH ports into more easy maintainable shape as a reference.
There are a lot of things to do. For the first step, I'd like to
introduce arch/mips/emma/ and include/asm/emma/ directories so that all
EMMA related sourches/headers can be easily shared across various EMMA
products/ports.
Here's the first attempt to try to change things as mentioned above.
Some possible improvements and cleanups are also included. Patches will
follow, please review. Any comments are highly appreciated.
Thanks in advance,
P.S. I'm also planning to do more cleanups around IRQ codes, register
definition style, and so on. But that'll be some other time.
--
Shinya Kuribayashi
NEC Electronics
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 01/12] MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processors
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
@ 2008-10-23 16:27 ` Shinya Kuribayashi
2008-10-23 16:29 ` [PATCH 03/12] MIPS: Move arch/mips/emma2rh/ into arch/mips/emma/ Shinya Kuribayashi
` (11 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-23 16:27 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
We already have sufficient infrastructure to support VR5500 and VR5500A
series processors. Here's a Makefile support to make it selectable by
ports, and enable it for NEC EMMA2RH Markeins board.
This patch also fixes a confused target help, and adds 1Gb PageMask bits
supported by VR5500 and its variants.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
arch/mips/Kconfig | 18 +++++++++++++++---
arch/mips/Makefile | 2 ++
arch/mips/include/asm/mipsregs.h | 1 +
arch/mips/include/asm/module.h | 2 ++
arch/mips/kernel/Makefile | 1 +
arch/mips/lib/Makefile | 1 +
arch/mips/lib/dump_tlb.c | 1 +
arch/mips/mm/Makefile | 1 +
8 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 5f149b0..e6ad125 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -249,10 +249,9 @@ config MARKEINS
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_HAS_CPU_R5000
+ select SYS_HAS_CPU_R5500
help
- This enables support for the R5432-based NEC Mark-eins
- boards with R5500 CPU.
+ This enables support for the NEC Mark-eins board with VR5500 CPU.
config MACH_VR41XX
bool "NEC VR4100 series based machines"
@@ -1092,6 +1091,16 @@ config CPU_R5432
select CPU_SUPPORTS_32BIT_KERNEL
select CPU_SUPPORTS_64BIT_KERNEL
+config CPU_R5500
+ bool "R5500"
+ depends on SYS_HAS_CPU_R5500
+ select CPU_HAS_LLSC
+ select CPU_SUPPORTS_32BIT_KERNEL
+ select CPU_SUPPORTS_64BIT_KERNEL
+ help
+ NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
+ instruction set.
+
config CPU_R6000
bool "R6000"
depends on EXPERIMENTAL
@@ -1202,6 +1211,9 @@ config SYS_HAS_CPU_R5000
config SYS_HAS_CPU_R5432
bool
+config SYS_HAS_CPU_R5500
+ bool
+
config SYS_HAS_CPU_R6000
bool
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 7f39fd8..c2197c3 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -131,6 +131,8 @@ cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_
cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap
cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \
-Wa,--trap
+cflags-$(CONFIG_CPU_R5500) += $(call cc-option,-march=r5500,-march=r5000) \
+ -Wa,--trap
cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \
-Wa,--trap
cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 9798660..9316324 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -192,6 +192,7 @@
#define PM_16M 0x01ffe000
#define PM_64M 0x07ffe000
#define PM_256M 0x1fffe000
+#define PM_1G 0x7fffe000
#endif
diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h
index de6d09e..e2e09b2 100644
--- a/arch/mips/include/asm/module.h
+++ b/arch/mips/include/asm/module.h
@@ -98,6 +98,8 @@ search_module_dbetables(unsigned long addr)
#define MODULE_PROC_FAMILY "R5000 "
#elif defined CONFIG_CPU_R5432
#define MODULE_PROC_FAMILY "R5432 "
+#elif defined CONFIG_CPU_R5500
+#define MODULE_PROC_FAMILY "R5500 "
#elif defined CONFIG_CPU_R6000
#define MODULE_PROC_FAMILY "R6000 "
#elif defined CONFIG_CPU_NEVADA
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index d9da711..b1372c2 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_CPU_R4X00) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R5000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R6000) += r6000_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R5432) += r4k_fpu.o r4k_switch.o
+obj-$(CONFIG_CPU_R5500) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_R8000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_RM7000) += r4k_fpu.o r4k_switch.o
obj-$(CONFIG_CPU_RM9000) += r4k_fpu.o r4k_switch.o
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index 8810dfb..dbcf651 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_CPU_R4300) += dump_tlb.o
obj-$(CONFIG_CPU_R4X00) += dump_tlb.o
obj-$(CONFIG_CPU_R5000) += dump_tlb.o
obj-$(CONFIG_CPU_R5432) += dump_tlb.o
+obj-$(CONFIG_CPU_R5500) += dump_tlb.o
obj-$(CONFIG_CPU_R6000) +=
obj-$(CONFIG_CPU_R8000) +=
obj-$(CONFIG_CPU_RM7000) += dump_tlb.o
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c
index 465ff0e..779821c 100644
--- a/arch/mips/lib/dump_tlb.c
+++ b/arch/mips/lib/dump_tlb.c
@@ -25,6 +25,7 @@ static inline const char *msk2str(unsigned int mask)
case PM_16M: return "16Mb";
case PM_64M: return "64Mb";
case PM_256M: return "256Mb";
+ case PM_1G: return "1Gb";
#endif
}
return "";
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index 44e8dd8..95ba32b 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_CPU_R4300) += c-r4k.o cex-gen.o tlb-r4k.o
obj-$(CONFIG_CPU_R4X00) += c-r4k.o cex-gen.o tlb-r4k.o
obj-$(CONFIG_CPU_R5000) += c-r4k.o cex-gen.o tlb-r4k.o
obj-$(CONFIG_CPU_R5432) += c-r4k.o cex-gen.o tlb-r4k.o
+obj-$(CONFIG_CPU_R5500) += c-r4k.o cex-gen.o tlb-r4k.o
obj-$(CONFIG_CPU_R8000) += c-r4k.o cex-gen.o tlb-r8k.o
obj-$(CONFIG_CPU_RM7000) += c-r4k.o cex-gen.o tlb-r4k.o
obj-$(CONFIG_CPU_RM9000) += c-r4k.o cex-gen.o tlb-r4k.o
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 03/12] MIPS: Move arch/mips/emma2rh/ into arch/mips/emma/
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
2008-10-23 16:27 ` [PATCH 01/12] MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processors Shinya Kuribayashi
@ 2008-10-23 16:29 ` Shinya Kuribayashi
2008-10-23 16:30 ` [PATCH 04/12] MIPS: Move <asm/emma2rh> to <asm/emma> dir Shinya Kuribayashi
` (10 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-23 16:29 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
git mv arch/mips/{emma2rh,emma} and fixups Makefiles. We'll put all NEC
EMMA series based machines there in the future.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
arch/mips/Makefile | 6 -
arch/mips/emma/common/Makefile | 13 ++
arch/mips/emma/common/irq.c | 105 ++++++++++++++++
arch/mips/emma/common/irq_emma2rh.c | 106 ++++++++++++++++
arch/mips/emma/common/prom.c | 72 +++++++++++
arch/mips/emma/markeins/Makefile | 13 ++
arch/mips/emma/markeins/irq.c | 132 ++++++++++++++++++++
arch/mips/emma/markeins/irq_markeins.c | 158 ++++++++++++++++++++++++
arch/mips/emma/markeins/led.c | 60 +++++++++
arch/mips/emma/markeins/platform.c | 191 +++++++++++++++++++++++++++++
arch/mips/emma/markeins/setup.c | 135 ++++++++++++++++++++
arch/mips/emma2rh/common/Makefile | 13 --
arch/mips/emma2rh/common/irq.c | 105 ----------------
arch/mips/emma2rh/common/irq_emma2rh.c | 106 ----------------
arch/mips/emma2rh/common/prom.c | 72 -----------
arch/mips/emma2rh/markeins/Makefile | 13 --
arch/mips/emma2rh/markeins/irq.c | 132 --------------------
arch/mips/emma2rh/markeins/irq_markeins.c | 158 ------------------------
arch/mips/emma2rh/markeins/led.c | 60 ---------
arch/mips/emma2rh/markeins/platform.c | 191 -----------------------------
arch/mips/emma2rh/markeins/setup.c | 135 --------------------
21 files changed, 988 insertions(+), 988 deletions(-)
create mode 100644 arch/mips/emma/common/Makefile
create mode 100644 arch/mips/emma/common/irq.c
create mode 100644 arch/mips/emma/common/irq_emma2rh.c
create mode 100644 arch/mips/emma/common/prom.c
create mode 100644 arch/mips/emma/markeins/Makefile
create mode 100644 arch/mips/emma/markeins/irq.c
create mode 100644 arch/mips/emma/markeins/irq_markeins.c
create mode 100644 arch/mips/emma/markeins/led.c
create mode 100644 arch/mips/emma/markeins/platform.c
create mode 100644 arch/mips/emma/markeins/setup.c
delete mode 100644 arch/mips/emma2rh/common/Makefile
delete mode 100644 arch/mips/emma2rh/common/irq.c
delete mode 100644 arch/mips/emma2rh/common/irq_emma2rh.c
delete mode 100644 arch/mips/emma2rh/common/prom.c
delete mode 100644 arch/mips/emma2rh/markeins/Makefile
delete mode 100644 arch/mips/emma2rh/markeins/irq.c
delete mode 100644 arch/mips/emma2rh/markeins/irq_markeins.c
delete mode 100644 arch/mips/emma2rh/markeins/led.c
delete mode 100644 arch/mips/emma2rh/markeins/platform.c
delete mode 100644 arch/mips/emma2rh/markeins/setup.c
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index a1d1f77..1bd4fe7 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -402,15 +402,15 @@ libs-$(CONFIG_PNX8550_STB810) += arch/mips/nxp/pnx8550/stb810/
load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000
#
-# NEC EMMA2RH boards
+# Common NEC EMMAXXX
#
-core-$(CONFIG_SOC_EMMA2RH) += arch/mips/emma2rh/common/
+core-$(CONFIG_SOC_EMMA) += arch/mips/emma/common/
cflags-$(CONFIG_SOC_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
#
# NEC EMMA2RH Mark-eins
#
-core-$(CONFIG_NEC_MARKEINS) += arch/mips/emma2rh/markeins/
+core-$(CONFIG_NEC_MARKEINS) += arch/mips/emma/markeins/
load-$(CONFIG_NEC_MARKEINS) += 0xffffffff88100000
#
diff --git a/arch/mips/emma/common/Makefile b/arch/mips/emma/common/Makefile
new file mode 100644
index 0000000..cb0fd32
--- /dev/null
+++ b/arch/mips/emma/common/Makefile
@@ -0,0 +1,13 @@
+#
+# arch/mips/emma2rh/common/Makefile
+# Makefile for the common code of NEC EMMA2RH based board.
+#
+# Copyright (C) NEC Electronics Corporation 2005-2006
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+
+obj-$(CONFIG_NEC_MARKEINS) += irq.o irq_emma2rh.o prom.o
diff --git a/arch/mips/emma/common/irq.c b/arch/mips/emma/common/irq.c
new file mode 100644
index 0000000..91cbd95
--- /dev/null
+++ b/arch/mips/emma/common/irq.c
@@ -0,0 +1,105 @@
+/*
+ * arch/mips/emma2rh/common/irq.c
+ * This file is common irq dispatcher.
+ *
+ * Copyright (C) NEC Electronics Corporation 2005-2006
+ *
+ * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/types.h>
+
+#include <asm/system.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+
+#include <asm/emma2rh/emma2rh.h>
+
+/*
+ * the first level int-handler will jump here if it is a emma2rh irq
+ */
+void emma2rh_irq_dispatch(void)
+{
+ u32 intStatus;
+ u32 bitmask;
+ u32 i;
+
+ intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0)
+ & emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
+
+#ifdef EMMA2RH_SW_CASCADE
+ if (intStatus &
+ (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
+ u32 swIntStatus;
+ swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
+ & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
+ for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
+ if (swIntStatus & bitmask) {
+ do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
+ return;
+ }
+ }
+ }
+#endif
+
+ for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
+ if (intStatus & bitmask) {
+ do_IRQ(EMMA2RH_IRQ_BASE + i);
+ return;
+ }
+ }
+
+ intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1)
+ & emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
+
+#ifdef EMMA2RH_GPIO_CASCADE
+ if (intStatus &
+ (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
+ u32 gpioIntStatus;
+ gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
+ & emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
+ if (gpioIntStatus & bitmask) {
+ do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
+ return;
+ }
+ }
+ }
+#endif
+
+ for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
+ if (intStatus & bitmask) {
+ do_IRQ(EMMA2RH_IRQ_BASE + i);
+ return;
+ }
+ }
+
+ intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2)
+ & emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
+
+ for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
+ if (intStatus & bitmask) {
+ do_IRQ(EMMA2RH_IRQ_BASE + i);
+ return;
+ }
+ }
+}
diff --git a/arch/mips/emma/common/irq_emma2rh.c b/arch/mips/emma/common/irq_emma2rh.c
new file mode 100644
index 0000000..96df37b
--- /dev/null
+++ b/arch/mips/emma/common/irq_emma2rh.c
@@ -0,0 +1,106 @@
+/*
+ * arch/mips/emma2rh/common/irq_emma2rh.c
+ * This file defines the irq handler for EMMA2RH.
+ *
+ * Copyright (C) NEC Electronics Corporation 2005-2006
+ *
+ * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+/*
+ * EMMA2RH defines 64 IRQs.
+ *
+ * This file exports one function:
+ * emma2rh_irq_init(u32 irq_base);
+ */
+
+#include <linux/interrupt.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+
+#include <asm/debug.h>
+
+#include <asm/emma2rh/emma2rh.h>
+
+/* number of total irqs supported by EMMA2RH */
+#define NUM_EMMA2RH_IRQ 96
+
+static int emma2rh_irq_base = -1;
+
+void ll_emma2rh_irq_enable(int);
+void ll_emma2rh_irq_disable(int);
+
+static void emma2rh_irq_enable(unsigned int irq)
+{
+ ll_emma2rh_irq_enable(irq - emma2rh_irq_base);
+}
+
+static void emma2rh_irq_disable(unsigned int irq)
+{
+ ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
+}
+
+struct irq_chip emma2rh_irq_controller = {
+ .name = "emma2rh_irq",
+ .ack = emma2rh_irq_disable,
+ .mask = emma2rh_irq_disable,
+ .mask_ack = emma2rh_irq_disable,
+ .unmask = emma2rh_irq_enable,
+};
+
+void emma2rh_irq_init(u32 irq_base)
+{
+ u32 i;
+
+ for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++)
+ set_irq_chip_and_handler(i, &emma2rh_irq_controller,
+ handle_level_irq);
+
+ emma2rh_irq_base = irq_base;
+}
+
+void ll_emma2rh_irq_enable(int emma2rh_irq)
+{
+ u32 reg_value;
+ u32 reg_bitmask;
+ u32 reg_index;
+
+ reg_index = EMMA2RH_BHIF_INT_EN_0
+ + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
+ * (emma2rh_irq / 32);
+ reg_value = emma2rh_in32(reg_index);
+ reg_bitmask = 0x1 << (emma2rh_irq % 32);
+ db_assert((reg_value & reg_bitmask) == 0);
+ emma2rh_out32(reg_index, reg_value | reg_bitmask);
+}
+
+void ll_emma2rh_irq_disable(int emma2rh_irq)
+{
+ u32 reg_value;
+ u32 reg_bitmask;
+ u32 reg_index;
+
+ reg_index = EMMA2RH_BHIF_INT_EN_0
+ + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
+ * (emma2rh_irq / 32);
+ reg_value = emma2rh_in32(reg_index);
+ reg_bitmask = 0x1 << (emma2rh_irq % 32);
+ db_assert((reg_value & reg_bitmask) != 0);
+ emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
+}
diff --git a/arch/mips/emma/common/prom.c b/arch/mips/emma/common/prom.c
new file mode 100644
index 0000000..97bf29e
--- /dev/null
+++ b/arch/mips/emma/common/prom.c
@@ -0,0 +1,72 @@
+/*
+ * arch/mips/emma2rh/common/prom.c
+ * This file is prom file.
+ *
+ * Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ * This file is based on the arch/mips/ddb5xxx/common/prom.c
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/bootmem.h>
+
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+#include <asm/emma2rh/emma2rh.h>
+
+const char *get_system_type(void)
+{
+#ifdef CONFIG_NEC_MARKEINS
+ return "NEC EMMA2RH Mark-eins";
+#else
+#error Unknown NEC board
+#endif
+}
+
+/* [jsun@junsun.net] PMON passes arguments in C main() style */
+void __init prom_init(void)
+{
+ int argc = fw_arg0;
+ char **arg = (char **)fw_arg1;
+ int i;
+
+ /* if user passes kernel args, ignore the default one */
+ if (argc > 1)
+ arcs_cmdline[0] = '\0';
+
+ /* arg[0] is "g", the rest is boot parameters */
+ for (i = 1; i < argc; i++) {
+ if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
+ >= sizeof(arcs_cmdline))
+ break;
+ strcat(arcs_cmdline, arg[i]);
+ strcat(arcs_cmdline, " ");
+ }
+
+#ifdef CONFIG_NEC_MARKEINS
+ add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM);
+#else
+#error Unknown NEC board
+#endif
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
diff --git a/arch/mips/emma/markeins/Makefile b/arch/mips/emma/markeins/Makefile
new file mode 100644
index 0000000..3c8b864
--- /dev/null
+++ b/arch/mips/emma/markeins/Makefile
@@ -0,0 +1,13 @@
+#
+# arch/mips/emma2rh/markeins/Makefile
+# Makefile for the common code of NEC EMMA2RH based board.
+#
+# Copyright (C) NEC Electronics Corporation 2005-2006
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+
+obj-$(CONFIG_NEC_MARKEINS) += irq.o irq_markeins.o setup.o led.o platform.o
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
new file mode 100644
index 0000000..6bcf6a0
--- /dev/null
+++ b/arch/mips/emma/markeins/irq.c
@@ -0,0 +1,132 @@
+/*
+ * arch/mips/emma2rh/markeins/irq.c
+ * This file defines the irq handler for EMMA2RH.
+ *
+ * Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+#include <linux/delay.h>
+
+#include <asm/irq_cpu.h>
+#include <asm/system.h>
+#include <asm/mipsregs.h>
+#include <asm/debug.h>
+#include <asm/addrspace.h>
+#include <asm/bootinfo.h>
+
+#include <asm/emma2rh/emma2rh.h>
+
+/*
+ * IRQ mapping
+ *
+ * 0-7: 8 CPU interrupts
+ * 0 - software interrupt 0
+ * 1 - software interrupt 1
+ * 2 - most Vrc5477 interrupts are routed to this pin
+ * 3 - (optional) some other interrupts routed to this pin for debugg
+ * 4 - not used
+ * 5 - not used
+ * 6 - not used
+ * 7 - cpu timer (used by default)
+ *
+ */
+
+extern void emma2rh_sw_irq_init(u32 base);
+extern void emma2rh_gpio_irq_init(u32 base);
+extern void emma2rh_irq_init(u32 base);
+extern void emma2rh_irq_dispatch(void);
+
+static struct irqaction irq_cascade = {
+ .handler = no_action,
+ .flags = 0,
+ .mask = CPU_MASK_NONE,
+ .name = "cascade",
+ .dev_id = NULL,
+ .next = NULL,
+};
+
+void __init arch_init_irq(void)
+{
+ u32 reg;
+
+ db_run(printk("markeins_irq_setup invoked.\n"));
+
+ /* by default, interrupts are disabled. */
+ emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0);
+ emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0);
+ emma2rh_out32(EMMA2RH_BHIF_INT_EN_2, 0);
+ emma2rh_out32(EMMA2RH_BHIF_INT1_EN_0, 0);
+ emma2rh_out32(EMMA2RH_BHIF_INT1_EN_1, 0);
+ emma2rh_out32(EMMA2RH_BHIF_INT1_EN_2, 0);
+ emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, 0);
+
+ clear_c0_status(0xff00);
+ set_c0_status(0x0400);
+
+#define GPIO_PCI (0xf<<15)
+ /* setup GPIO interrupt for PCI interface */
+ /* direction input */
+ reg = emma2rh_in32(EMMA2RH_GPIO_DIR);
+ emma2rh_out32(EMMA2RH_GPIO_DIR, reg & ~GPIO_PCI);
+ /* disable interrupt */
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI);
+ /* level triggerd */
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE);
+ emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI);
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A);
+ emma2rh_out32(EMMA2RH_GPIO_INT_CND_A, reg & (~GPIO_PCI));
+ /* interrupt clear */
+ emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI);
+
+ /* init all controllers */
+ emma2rh_irq_init(EMMA2RH_IRQ_BASE);
+ emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE);
+ emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE);
+ mips_cpu_irq_init();
+
+ /* setup cascade interrupts */
+ setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade);
+ setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade);
+ setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade);
+}
+
+asmlinkage void plat_irq_dispatch(void)
+{
+ unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
+
+ if (pending & STATUSF_IP7)
+ do_IRQ(CPU_IRQ_BASE + 7);
+ else if (pending & STATUSF_IP2)
+ emma2rh_irq_dispatch();
+ else if (pending & STATUSF_IP1)
+ do_IRQ(CPU_IRQ_BASE + 1);
+ else if (pending & STATUSF_IP0)
+ do_IRQ(CPU_IRQ_BASE + 0);
+ else
+ spurious_interrupt();
+}
+
+
diff --git a/arch/mips/emma/markeins/irq_markeins.c b/arch/mips/emma/markeins/irq_markeins.c
new file mode 100644
index 0000000..fba5c15
--- /dev/null
+++ b/arch/mips/emma/markeins/irq_markeins.c
@@ -0,0 +1,158 @@
+/*
+ * arch/mips/emma2rh/markeins/irq_markeins.c
+ * This file defines the irq handler for Mark-eins.
+ *
+ * Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/types.h>
+#include <linux/ptrace.h>
+
+#include <asm/debug.h>
+#include <asm/emma2rh/emma2rh.h>
+
+static int emma2rh_sw_irq_base = -1;
+static int emma2rh_gpio_irq_base = -1;
+
+void ll_emma2rh_sw_irq_enable(int reg);
+void ll_emma2rh_sw_irq_disable(int reg);
+void ll_emma2rh_gpio_irq_enable(int reg);
+void ll_emma2rh_gpio_irq_disable(int reg);
+
+static void emma2rh_sw_irq_enable(unsigned int irq)
+{
+ ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base);
+}
+
+static void emma2rh_sw_irq_disable(unsigned int irq)
+{
+ ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base);
+}
+
+struct irq_chip emma2rh_sw_irq_controller = {
+ .name = "emma2rh_sw_irq",
+ .ack = emma2rh_sw_irq_disable,
+ .mask = emma2rh_sw_irq_disable,
+ .mask_ack = emma2rh_sw_irq_disable,
+ .unmask = emma2rh_sw_irq_enable,
+};
+
+void emma2rh_sw_irq_init(u32 irq_base)
+{
+ u32 i;
+
+ for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++)
+ set_irq_chip_and_handler(i, &emma2rh_sw_irq_controller,
+ handle_level_irq);
+
+ emma2rh_sw_irq_base = irq_base;
+}
+
+void ll_emma2rh_sw_irq_enable(int irq)
+{
+ u32 reg;
+
+ db_assert(irq >= 0);
+ db_assert(irq < NUM_EMMA2RH_IRQ_SW);
+
+ reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
+ reg |= 1 << irq;
+ emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
+}
+
+void ll_emma2rh_sw_irq_disable(int irq)
+{
+ u32 reg;
+
+ db_assert(irq >= 0);
+ db_assert(irq < 32);
+
+ reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
+ reg &= ~(1 << irq);
+ emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
+}
+
+static void emma2rh_gpio_irq_enable(unsigned int irq)
+{
+ ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
+}
+
+static void emma2rh_gpio_irq_disable(unsigned int irq)
+{
+ ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base);
+}
+
+static void emma2rh_gpio_irq_ack(unsigned int irq)
+{
+ irq -= emma2rh_gpio_irq_base;
+ emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
+ ll_emma2rh_gpio_irq_disable(irq);
+}
+
+static void emma2rh_gpio_irq_end(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
+}
+
+struct irq_chip emma2rh_gpio_irq_controller = {
+ .name = "emma2rh_gpio_irq",
+ .ack = emma2rh_gpio_irq_ack,
+ .mask = emma2rh_gpio_irq_disable,
+ .mask_ack = emma2rh_gpio_irq_ack,
+ .unmask = emma2rh_gpio_irq_enable,
+ .end = emma2rh_gpio_irq_end,
+};
+
+void emma2rh_gpio_irq_init(u32 irq_base)
+{
+ u32 i;
+
+ for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++)
+ set_irq_chip(i, &emma2rh_gpio_irq_controller);
+
+ emma2rh_gpio_irq_base = irq_base;
+}
+
+void ll_emma2rh_gpio_irq_enable(int irq)
+{
+ u32 reg;
+
+ db_assert(irq >= 0);
+ db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
+
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ reg |= 1 << irq;
+ emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
+}
+
+void ll_emma2rh_gpio_irq_disable(int irq)
+{
+ u32 reg;
+
+ db_assert(irq >= 0);
+ db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
+
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ reg &= ~(1 << irq);
+ emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
+}
diff --git a/arch/mips/emma/markeins/led.c b/arch/mips/emma/markeins/led.c
new file mode 100644
index 0000000..b65254c
--- /dev/null
+++ b/arch/mips/emma/markeins/led.c
@@ -0,0 +1,60 @@
+/*
+ * arch/mips/emma2rh/markeins/led.c
+ * This file defines the led display for Mark-eins.
+ *
+ * Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/string.h>
+#include <asm/emma2rh/emma2rh.h>
+
+const unsigned long clear = 0x20202020;
+
+#define LED_BASE 0xb1400038
+
+void markeins_led_clear(void)
+{
+ emma2rh_out32(LED_BASE, clear);
+ emma2rh_out32(LED_BASE + 4, clear);
+}
+
+void markeins_led(const char *str)
+{
+ int i;
+ int len = strlen(str);
+
+ markeins_led_clear();
+ if (len > 8)
+ len = 8;
+
+ if (emma2rh_in32(0xb0000800) & (0x1 << 18))
+ for (i = 0; i < len; i++)
+ emma2rh_out8(LED_BASE + i, str[i]);
+ else
+ for (i = 0; i < len; i++)
+ emma2rh_out8(LED_BASE + (i & 4) + (3 - (i & 3)),
+ str[i]);
+}
+
+void markeins_led_hex(u32 val)
+{
+ char str[10];
+
+ sprintf(str, "%08x", val);
+ markeins_led(str);
+}
diff --git a/arch/mips/emma/markeins/platform.c b/arch/mips/emma/markeins/platform.c
new file mode 100644
index 0000000..fb9cda2
--- /dev/null
+++ b/arch/mips/emma/markeins/platform.c
@@ -0,0 +1,191 @@
+/*
+ * arch/mips/emma2rh/markeins/platofrm.c
+ * This file sets up platform devices for EMMA2RH Mark-eins.
+ *
+ * Copyright(C) MontaVista Software Inc, 2006
+ *
+ * Author: dmitry pervushin <dpervushin@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/ioport.h>
+#include <linux/serial_8250.h>
+#include <linux/mtd/physmap.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/addrspace.h>
+#include <asm/time.h>
+#include <asm/bcache.h>
+#include <asm/irq.h>
+#include <asm/reboot.h>
+#include <asm/traps.h>
+
+#include <asm/emma2rh/emma2rh.h>
+
+
+#define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */
+
+static struct resource i2c_emma_resources_0[] = {
+ {
+ .name = NULL,
+ .start = EMMA2RH_IRQ_PIIC0,
+ .end = EMMA2RH_IRQ_PIIC0,
+ .flags = IORESOURCE_IRQ
+ }, {
+ .name = NULL,
+ .start = EMMA2RH_PIIC0_BASE,
+ .end = EMMA2RH_PIIC0_BASE + 0x1000,
+ .flags = 0
+ },
+};
+
+struct resource i2c_emma_resources_1[] = {
+ {
+ .name = NULL,
+ .start = EMMA2RH_IRQ_PIIC1,
+ .end = EMMA2RH_IRQ_PIIC1,
+ .flags = IORESOURCE_IRQ
+ }, {
+ .name = NULL,
+ .start = EMMA2RH_PIIC1_BASE,
+ .end = EMMA2RH_PIIC1_BASE + 0x1000,
+ .flags = 0
+ },
+};
+
+struct resource i2c_emma_resources_2[] = {
+ {
+ .name = NULL,
+ .start = EMMA2RH_IRQ_PIIC2,
+ .end = EMMA2RH_IRQ_PIIC2,
+ .flags = IORESOURCE_IRQ
+ }, {
+ .name = NULL,
+ .start = EMMA2RH_PIIC2_BASE,
+ .end = EMMA2RH_PIIC2_BASE + 0x1000,
+ .flags = 0
+ },
+};
+
+struct platform_device i2c_emma_devices[] = {
+ [0] = {
+ .name = I2C_EMMA2RH,
+ .id = 0,
+ .resource = i2c_emma_resources_0,
+ .num_resources = ARRAY_SIZE(i2c_emma_resources_0),
+ },
+ [1] = {
+ .name = I2C_EMMA2RH,
+ .id = 1,
+ .resource = i2c_emma_resources_1,
+ .num_resources = ARRAY_SIZE(i2c_emma_resources_1),
+ },
+ [2] = {
+ .name = I2C_EMMA2RH,
+ .id = 2,
+ .resource = i2c_emma_resources_2,
+ .num_resources = ARRAY_SIZE(i2c_emma_resources_2),
+ },
+};
+
+#define EMMA2RH_SERIAL_CLOCK 18544000
+#define EMMA2RH_SERIAL_FLAGS UPF_BOOT_AUTOCONF | UPF_SKIP_TEST
+
+static struct plat_serial8250_port platform_serial_ports[] = {
+ [0] = {
+ .membase= (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3),
+ .irq = EMMA2RH_IRQ_PFUR0,
+ .uartclk = EMMA2RH_SERIAL_CLOCK,
+ .regshift = 4,
+ .iotype = UPIO_MEM,
+ .flags = EMMA2RH_SERIAL_FLAGS,
+ }, [1] = {
+ .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3),
+ .irq = EMMA2RH_IRQ_PFUR1,
+ .uartclk = EMMA2RH_SERIAL_CLOCK,
+ .regshift = 4,
+ .iotype = UPIO_MEM,
+ .flags = EMMA2RH_SERIAL_FLAGS,
+ }, [2] = {
+ .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3),
+ .irq = EMMA2RH_IRQ_PFUR2,
+ .uartclk = EMMA2RH_SERIAL_CLOCK,
+ .regshift = 4,
+ .iotype = UPIO_MEM,
+ .flags = EMMA2RH_SERIAL_FLAGS,
+ }, [3] = {
+ .flags = 0,
+ },
+};
+
+static struct platform_device serial_emma = {
+ .name = "serial8250",
+ .dev = {
+ .platform_data = &platform_serial_ports,
+ },
+};
+
+static struct platform_device *devices[] = {
+ &i2c_emma_devices[0],
+ &i2c_emma_devices[1],
+ &i2c_emma_devices[2],
+ &serial_emma,
+};
+
+static struct mtd_partition markeins_parts[] = {
+ [0] = {
+ .name = "RootFS",
+ .offset = 0x00000000,
+ .size = 0x00c00000,
+ },
+ [1] = {
+ .name = "boot code area",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x00100000,
+ },
+ [2] = {
+ .name = "kernel image",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x00300000,
+ },
+ [3] = {
+ .name = "RootFS2",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x00c00000,
+ },
+ [4] = {
+ .name = "boot code area2",
+ .offset = MTDPART_OFS_APPEND,
+ .size = 0x00100000,
+ },
+ [5] = {
+ .name = "kernel image2",
+ .offset = MTDPART_OFS_APPEND,
+ .size = MTDPART_SIZ_FULL,
+ },
+};
+
+static int __init platform_devices_setup(void)
+{
+ physmap_set_partitions(markeins_parts, ARRAY_SIZE(markeins_parts));
+ return platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+arch_initcall(platform_devices_setup);
+
diff --git a/arch/mips/emma/markeins/setup.c b/arch/mips/emma/markeins/setup.c
new file mode 100644
index 0000000..b6a23ad
--- /dev/null
+++ b/arch/mips/emma/markeins/setup.c
@@ -0,0 +1,135 @@
+/*
+ * arch/mips/emma2rh/markeins/setup.c
+ * This file is setup for EMMA2RH Mark-eins.
+ *
+ * Copyright (C) NEC Electronics Corporation 2004-2006
+ *
+ * This file is based on the arch/mips/ddb5xxx/ddb5477/setup.c.
+ *
+ * Copyright 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+
+#include <asm/time.h>
+#include <asm/reboot.h>
+
+#include <asm/emma2rh/emma2rh.h>
+
+#define USE_CPU_COUNTER_TIMER /* whether we use cpu counter */
+
+extern void markeins_led(const char *);
+
+static int bus_frequency = 0;
+
+static void markeins_machine_restart(char *command)
+{
+ static void (*back_to_prom) (void) = (void (*)(void))0xbfc00000;
+
+ printk("cannot EMMA2RH Mark-eins restart.\n");
+ markeins_led("restart.");
+ back_to_prom();
+}
+
+static void markeins_machine_halt(void)
+{
+ printk("EMMA2RH Mark-eins halted.\n");
+ markeins_led("halted.");
+ while (1) ;
+}
+
+static void markeins_machine_power_off(void)
+{
+ printk("EMMA2RH Mark-eins halted. Please turn off the power.\n");
+ markeins_led("poweroff.");
+ while (1) ;
+}
+
+static unsigned long __initdata emma2rh_clock[4] = {
+ 166500000, 187312500, 199800000, 210600000
+};
+
+static unsigned int __init detect_bus_frequency(unsigned long rtc_base)
+{
+ u32 reg;
+
+ /* detect from boot strap */
+ reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
+ reg = (reg >> 4) & 0x3;
+
+ return emma2rh_clock[reg];
+}
+
+void __init plat_time_init(void)
+{
+ u32 reg;
+ if (bus_frequency == 0)
+ bus_frequency = detect_bus_frequency(0);
+
+ reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
+ if ((reg & 0x3) == 0)
+ reg = (reg >> 6) & 0x3;
+ else {
+ reg = emma2rh_in32(EMMA2RH_BHIF_MAIN_CTRL);
+ reg = (reg >> 4) & 0x3;
+ }
+ mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2;
+}
+
+static void markeins_board_init(void);
+extern void markeins_irq_setup(void);
+
+static void inline __init markeins_sio_setup(void)
+{
+}
+
+void __init plat_mem_setup(void)
+{
+ /* initialize board - we don't trust the loader */
+ markeins_board_init();
+
+ set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE));
+
+ _machine_restart = markeins_machine_restart;
+ _machine_halt = markeins_machine_halt;
+ pm_power_off = markeins_machine_power_off;
+
+ /* setup resource limits */
+ ioport_resource.start = EMMA2RH_PCI_IO_BASE;
+ ioport_resource.end = EMMA2RH_PCI_IO_BASE + EMMA2RH_PCI_IO_SIZE - 1;
+ iomem_resource.start = EMMA2RH_IO_BASE;
+ iomem_resource.end = EMMA2RH_ROM_BASE - 1;
+
+ /* Reboot on panic */
+ panic_timeout = 180;
+
+ markeins_sio_setup();
+}
+
+static void __init markeins_board_init(void)
+{
+ u32 val;
+
+ val = emma2rh_in32(EMMA2RH_PBRD_INT_EN); /* open serial interrupts. */
+ emma2rh_out32(EMMA2RH_PBRD_INT_EN, val | 0xaa);
+ val = emma2rh_in32(EMMA2RH_PBRD_CLKSEL); /* set serial clocks. */
+ emma2rh_out32(EMMA2RH_PBRD_CLKSEL, val | 0x5); /* 18MHz */
+ emma2rh_out32(EMMA2RH_PCI_CONTROL, 0);
+
+ markeins_led("MVL E2RH");
+}
diff --git a/arch/mips/emma2rh/common/Makefile b/arch/mips/emma2rh/common/Makefile
deleted file mode 100644
index cb0fd32..0000000
--- a/arch/mips/emma2rh/common/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# arch/mips/emma2rh/common/Makefile
-# Makefile for the common code of NEC EMMA2RH based board.
-#
-# Copyright (C) NEC Electronics Corporation 2005-2006
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-
-obj-$(CONFIG_NEC_MARKEINS) += irq.o irq_emma2rh.o prom.o
diff --git a/arch/mips/emma2rh/common/irq.c b/arch/mips/emma2rh/common/irq.c
deleted file mode 100644
index 91cbd95..0000000
--- a/arch/mips/emma2rh/common/irq.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * arch/mips/emma2rh/common/irq.c
- * This file is common irq dispatcher.
- *
- * Copyright (C) NEC Electronics Corporation 2005-2006
- *
- * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/types.h>
-
-#include <asm/system.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-
-#include <asm/emma2rh/emma2rh.h>
-
-/*
- * the first level int-handler will jump here if it is a emma2rh irq
- */
-void emma2rh_irq_dispatch(void)
-{
- u32 intStatus;
- u32 bitmask;
- u32 i;
-
- intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0)
- & emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
-
-#ifdef EMMA2RH_SW_CASCADE
- if (intStatus &
- (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
- u32 swIntStatus;
- swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
- & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
- for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
- if (swIntStatus & bitmask) {
- do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
- return;
- }
- }
- }
-#endif
-
- for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
- if (intStatus & bitmask) {
- do_IRQ(EMMA2RH_IRQ_BASE + i);
- return;
- }
- }
-
- intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1)
- & emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
-
-#ifdef EMMA2RH_GPIO_CASCADE
- if (intStatus &
- (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
- u32 gpioIntStatus;
- gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
- & emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
- for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
- if (gpioIntStatus & bitmask) {
- do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
- return;
- }
- }
- }
-#endif
-
- for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
- if (intStatus & bitmask) {
- do_IRQ(EMMA2RH_IRQ_BASE + i);
- return;
- }
- }
-
- intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2)
- & emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
-
- for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
- if (intStatus & bitmask) {
- do_IRQ(EMMA2RH_IRQ_BASE + i);
- return;
- }
- }
-}
diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c
deleted file mode 100644
index 96df37b..0000000
--- a/arch/mips/emma2rh/common/irq_emma2rh.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * arch/mips/emma2rh/common/irq_emma2rh.c
- * This file defines the irq handler for EMMA2RH.
- *
- * Copyright (C) NEC Electronics Corporation 2005-2006
- *
- * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-/*
- * EMMA2RH defines 64 IRQs.
- *
- * This file exports one function:
- * emma2rh_irq_init(u32 irq_base);
- */
-
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-
-#include <asm/debug.h>
-
-#include <asm/emma2rh/emma2rh.h>
-
-/* number of total irqs supported by EMMA2RH */
-#define NUM_EMMA2RH_IRQ 96
-
-static int emma2rh_irq_base = -1;
-
-void ll_emma2rh_irq_enable(int);
-void ll_emma2rh_irq_disable(int);
-
-static void emma2rh_irq_enable(unsigned int irq)
-{
- ll_emma2rh_irq_enable(irq - emma2rh_irq_base);
-}
-
-static void emma2rh_irq_disable(unsigned int irq)
-{
- ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
-}
-
-struct irq_chip emma2rh_irq_controller = {
- .name = "emma2rh_irq",
- .ack = emma2rh_irq_disable,
- .mask = emma2rh_irq_disable,
- .mask_ack = emma2rh_irq_disable,
- .unmask = emma2rh_irq_enable,
-};
-
-void emma2rh_irq_init(u32 irq_base)
-{
- u32 i;
-
- for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++)
- set_irq_chip_and_handler(i, &emma2rh_irq_controller,
- handle_level_irq);
-
- emma2rh_irq_base = irq_base;
-}
-
-void ll_emma2rh_irq_enable(int emma2rh_irq)
-{
- u32 reg_value;
- u32 reg_bitmask;
- u32 reg_index;
-
- reg_index = EMMA2RH_BHIF_INT_EN_0
- + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
- * (emma2rh_irq / 32);
- reg_value = emma2rh_in32(reg_index);
- reg_bitmask = 0x1 << (emma2rh_irq % 32);
- db_assert((reg_value & reg_bitmask) == 0);
- emma2rh_out32(reg_index, reg_value | reg_bitmask);
-}
-
-void ll_emma2rh_irq_disable(int emma2rh_irq)
-{
- u32 reg_value;
- u32 reg_bitmask;
- u32 reg_index;
-
- reg_index = EMMA2RH_BHIF_INT_EN_0
- + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
- * (emma2rh_irq / 32);
- reg_value = emma2rh_in32(reg_index);
- reg_bitmask = 0x1 << (emma2rh_irq % 32);
- db_assert((reg_value & reg_bitmask) != 0);
- emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
-}
diff --git a/arch/mips/emma2rh/common/prom.c b/arch/mips/emma2rh/common/prom.c
deleted file mode 100644
index 97bf29e..0000000
--- a/arch/mips/emma2rh/common/prom.c
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * arch/mips/emma2rh/common/prom.c
- * This file is prom file.
- *
- * Copyright (C) NEC Electronics Corporation 2004-2006
- *
- * This file is based on the arch/mips/ddb5xxx/common/prom.c
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/sched.h>
-#include <linux/bootmem.h>
-
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-#include <asm/emma2rh/emma2rh.h>
-
-const char *get_system_type(void)
-{
-#ifdef CONFIG_NEC_MARKEINS
- return "NEC EMMA2RH Mark-eins";
-#else
-#error Unknown NEC board
-#endif
-}
-
-/* [jsun@junsun.net] PMON passes arguments in C main() style */
-void __init prom_init(void)
-{
- int argc = fw_arg0;
- char **arg = (char **)fw_arg1;
- int i;
-
- /* if user passes kernel args, ignore the default one */
- if (argc > 1)
- arcs_cmdline[0] = '\0';
-
- /* arg[0] is "g", the rest is boot parameters */
- for (i = 1; i < argc; i++) {
- if (strlen(arcs_cmdline) + strlen(arg[i] + 1)
- >= sizeof(arcs_cmdline))
- break;
- strcat(arcs_cmdline, arg[i]);
- strcat(arcs_cmdline, " ");
- }
-
-#ifdef CONFIG_NEC_MARKEINS
- add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM);
-#else
-#error Unknown NEC board
-#endif
-}
-
-void __init prom_free_prom_memory(void)
-{
-}
diff --git a/arch/mips/emma2rh/markeins/Makefile b/arch/mips/emma2rh/markeins/Makefile
deleted file mode 100644
index 3c8b864..0000000
--- a/arch/mips/emma2rh/markeins/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# arch/mips/emma2rh/markeins/Makefile
-# Makefile for the common code of NEC EMMA2RH based board.
-#
-# Copyright (C) NEC Electronics Corporation 2005-2006
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software Foundation; either version 2 of the License, or
-# (at your option) any later version.
-#
-
-obj-$(CONFIG_NEC_MARKEINS) += irq.o irq_markeins.o setup.o led.o platform.o
diff --git a/arch/mips/emma2rh/markeins/irq.c b/arch/mips/emma2rh/markeins/irq.c
deleted file mode 100644
index 6bcf6a0..0000000
--- a/arch/mips/emma2rh/markeins/irq.c
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * arch/mips/emma2rh/markeins/irq.c
- * This file defines the irq handler for EMMA2RH.
- *
- * Copyright (C) NEC Electronics Corporation 2004-2006
- *
- * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/delay.h>
-
-#include <asm/irq_cpu.h>
-#include <asm/system.h>
-#include <asm/mipsregs.h>
-#include <asm/debug.h>
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-
-#include <asm/emma2rh/emma2rh.h>
-
-/*
- * IRQ mapping
- *
- * 0-7: 8 CPU interrupts
- * 0 - software interrupt 0
- * 1 - software interrupt 1
- * 2 - most Vrc5477 interrupts are routed to this pin
- * 3 - (optional) some other interrupts routed to this pin for debugg
- * 4 - not used
- * 5 - not used
- * 6 - not used
- * 7 - cpu timer (used by default)
- *
- */
-
-extern void emma2rh_sw_irq_init(u32 base);
-extern void emma2rh_gpio_irq_init(u32 base);
-extern void emma2rh_irq_init(u32 base);
-extern void emma2rh_irq_dispatch(void);
-
-static struct irqaction irq_cascade = {
- .handler = no_action,
- .flags = 0,
- .mask = CPU_MASK_NONE,
- .name = "cascade",
- .dev_id = NULL,
- .next = NULL,
-};
-
-void __init arch_init_irq(void)
-{
- u32 reg;
-
- db_run(printk("markeins_irq_setup invoked.\n"));
-
- /* by default, interrupts are disabled. */
- emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0);
- emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0);
- emma2rh_out32(EMMA2RH_BHIF_INT_EN_2, 0);
- emma2rh_out32(EMMA2RH_BHIF_INT1_EN_0, 0);
- emma2rh_out32(EMMA2RH_BHIF_INT1_EN_1, 0);
- emma2rh_out32(EMMA2RH_BHIF_INT1_EN_2, 0);
- emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, 0);
-
- clear_c0_status(0xff00);
- set_c0_status(0x0400);
-
-#define GPIO_PCI (0xf<<15)
- /* setup GPIO interrupt for PCI interface */
- /* direction input */
- reg = emma2rh_in32(EMMA2RH_GPIO_DIR);
- emma2rh_out32(EMMA2RH_GPIO_DIR, reg & ~GPIO_PCI);
- /* disable interrupt */
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
- emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg & ~GPIO_PCI);
- /* level triggerd */
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_MODE);
- emma2rh_out32(EMMA2RH_GPIO_INT_MODE, reg | GPIO_PCI);
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_CND_A);
- emma2rh_out32(EMMA2RH_GPIO_INT_CND_A, reg & (~GPIO_PCI));
- /* interrupt clear */
- emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI);
-
- /* init all controllers */
- emma2rh_irq_init(EMMA2RH_IRQ_BASE);
- emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE);
- emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE);
- mips_cpu_irq_init();
-
- /* setup cascade interrupts */
- setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade);
- setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_GPIO_CASCADE, &irq_cascade);
- setup_irq(CPU_IRQ_BASE + CPU_EMMA2RH_CASCADE, &irq_cascade);
-}
-
-asmlinkage void plat_irq_dispatch(void)
-{
- unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
-
- if (pending & STATUSF_IP7)
- do_IRQ(CPU_IRQ_BASE + 7);
- else if (pending & STATUSF_IP2)
- emma2rh_irq_dispatch();
- else if (pending & STATUSF_IP1)
- do_IRQ(CPU_IRQ_BASE + 1);
- else if (pending & STATUSF_IP0)
- do_IRQ(CPU_IRQ_BASE + 0);
- else
- spurious_interrupt();
-}
-
-
diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c
deleted file mode 100644
index fba5c15..0000000
--- a/arch/mips/emma2rh/markeins/irq_markeins.c
+++ /dev/null
@@ -1,158 +0,0 @@
-/*
- * arch/mips/emma2rh/markeins/irq_markeins.c
- * This file defines the irq handler for Mark-eins.
- *
- * Copyright (C) NEC Electronics Corporation 2004-2006
- *
- * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-
-#include <asm/debug.h>
-#include <asm/emma2rh/emma2rh.h>
-
-static int emma2rh_sw_irq_base = -1;
-static int emma2rh_gpio_irq_base = -1;
-
-void ll_emma2rh_sw_irq_enable(int reg);
-void ll_emma2rh_sw_irq_disable(int reg);
-void ll_emma2rh_gpio_irq_enable(int reg);
-void ll_emma2rh_gpio_irq_disable(int reg);
-
-static void emma2rh_sw_irq_enable(unsigned int irq)
-{
- ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base);
-}
-
-static void emma2rh_sw_irq_disable(unsigned int irq)
-{
- ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base);
-}
-
-struct irq_chip emma2rh_sw_irq_controller = {
- .name = "emma2rh_sw_irq",
- .ack = emma2rh_sw_irq_disable,
- .mask = emma2rh_sw_irq_disable,
- .mask_ack = emma2rh_sw_irq_disable,
- .unmask = emma2rh_sw_irq_enable,
-};
-
-void emma2rh_sw_irq_init(u32 irq_base)
-{
- u32 i;
-
- for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++)
- set_irq_chip_and_handler(i, &emma2rh_sw_irq_controller,
- handle_level_irq);
-
- emma2rh_sw_irq_base = irq_base;
-}
-
-void ll_emma2rh_sw_irq_enable(int irq)
-{
- u32 reg;
-
- db_assert(irq >= 0);
- db_assert(irq < NUM_EMMA2RH_IRQ_SW);
-
- reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
- reg |= 1 << irq;
- emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
-}
-
-void ll_emma2rh_sw_irq_disable(int irq)
-{
- u32 reg;
-
- db_assert(irq >= 0);
- db_assert(irq < 32);
-
- reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
- reg &= ~(1 << irq);
- emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
-}
-
-static void emma2rh_gpio_irq_enable(unsigned int irq)
-{
- ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
-}
-
-static void emma2rh_gpio_irq_disable(unsigned int irq)
-{
- ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base);
-}
-
-static void emma2rh_gpio_irq_ack(unsigned int irq)
-{
- irq -= emma2rh_gpio_irq_base;
- emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
- ll_emma2rh_gpio_irq_disable(irq);
-}
-
-static void emma2rh_gpio_irq_end(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
-}
-
-struct irq_chip emma2rh_gpio_irq_controller = {
- .name = "emma2rh_gpio_irq",
- .ack = emma2rh_gpio_irq_ack,
- .mask = emma2rh_gpio_irq_disable,
- .mask_ack = emma2rh_gpio_irq_ack,
- .unmask = emma2rh_gpio_irq_enable,
- .end = emma2rh_gpio_irq_end,
-};
-
-void emma2rh_gpio_irq_init(u32 irq_base)
-{
- u32 i;
-
- for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++)
- set_irq_chip(i, &emma2rh_gpio_irq_controller);
-
- emma2rh_gpio_irq_base = irq_base;
-}
-
-void ll_emma2rh_gpio_irq_enable(int irq)
-{
- u32 reg;
-
- db_assert(irq >= 0);
- db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
-
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
- reg |= 1 << irq;
- emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
-}
-
-void ll_emma2rh_gpio_irq_disable(int irq)
-{
- u32 reg;
-
- db_assert(irq >= 0);
- db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
-
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
- reg &= ~(1 << irq);
- emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
-}
diff --git a/arch/mips/emma2rh/markeins/led.c b/arch/mips/emma2rh/markeins/led.c
deleted file mode 100644
index b65254c..0000000
--- a/arch/mips/emma2rh/markeins/led.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * arch/mips/emma2rh/markeins/led.c
- * This file defines the led display for Mark-eins.
- *
- * Copyright (C) NEC Electronics Corporation 2004-2006
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/string.h>
-#include <asm/emma2rh/emma2rh.h>
-
-const unsigned long clear = 0x20202020;
-
-#define LED_BASE 0xb1400038
-
-void markeins_led_clear(void)
-{
- emma2rh_out32(LED_BASE, clear);
- emma2rh_out32(LED_BASE + 4, clear);
-}
-
-void markeins_led(const char *str)
-{
- int i;
- int len = strlen(str);
-
- markeins_led_clear();
- if (len > 8)
- len = 8;
-
- if (emma2rh_in32(0xb0000800) & (0x1 << 18))
- for (i = 0; i < len; i++)
- emma2rh_out8(LED_BASE + i, str[i]);
- else
- for (i = 0; i < len; i++)
- emma2rh_out8(LED_BASE + (i & 4) + (3 - (i & 3)),
- str[i]);
-}
-
-void markeins_led_hex(u32 val)
-{
- char str[10];
-
- sprintf(str, "%08x", val);
- markeins_led(str);
-}
diff --git a/arch/mips/emma2rh/markeins/platform.c b/arch/mips/emma2rh/markeins/platform.c
deleted file mode 100644
index fb9cda2..0000000
--- a/arch/mips/emma2rh/markeins/platform.c
+++ /dev/null
@@ -1,191 +0,0 @@
-/*
- * arch/mips/emma2rh/markeins/platofrm.c
- * This file sets up platform devices for EMMA2RH Mark-eins.
- *
- * Copyright(C) MontaVista Software Inc, 2006
- *
- * Author: dmitry pervushin <dpervushin@ru.mvista.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/ioport.h>
-#include <linux/serial_8250.h>
-#include <linux/mtd/physmap.h>
-
-#include <asm/cpu.h>
-#include <asm/bootinfo.h>
-#include <asm/addrspace.h>
-#include <asm/time.h>
-#include <asm/bcache.h>
-#include <asm/irq.h>
-#include <asm/reboot.h>
-#include <asm/traps.h>
-
-#include <asm/emma2rh/emma2rh.h>
-
-
-#define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */
-
-static struct resource i2c_emma_resources_0[] = {
- {
- .name = NULL,
- .start = EMMA2RH_IRQ_PIIC0,
- .end = EMMA2RH_IRQ_PIIC0,
- .flags = IORESOURCE_IRQ
- }, {
- .name = NULL,
- .start = EMMA2RH_PIIC0_BASE,
- .end = EMMA2RH_PIIC0_BASE + 0x1000,
- .flags = 0
- },
-};
-
-struct resource i2c_emma_resources_1[] = {
- {
- .name = NULL,
- .start = EMMA2RH_IRQ_PIIC1,
- .end = EMMA2RH_IRQ_PIIC1,
- .flags = IORESOURCE_IRQ
- }, {
- .name = NULL,
- .start = EMMA2RH_PIIC1_BASE,
- .end = EMMA2RH_PIIC1_BASE + 0x1000,
- .flags = 0
- },
-};
-
-struct resource i2c_emma_resources_2[] = {
- {
- .name = NULL,
- .start = EMMA2RH_IRQ_PIIC2,
- .end = EMMA2RH_IRQ_PIIC2,
- .flags = IORESOURCE_IRQ
- }, {
- .name = NULL,
- .start = EMMA2RH_PIIC2_BASE,
- .end = EMMA2RH_PIIC2_BASE + 0x1000,
- .flags = 0
- },
-};
-
-struct platform_device i2c_emma_devices[] = {
- [0] = {
- .name = I2C_EMMA2RH,
- .id = 0,
- .resource = i2c_emma_resources_0,
- .num_resources = ARRAY_SIZE(i2c_emma_resources_0),
- },
- [1] = {
- .name = I2C_EMMA2RH,
- .id = 1,
- .resource = i2c_emma_resources_1,
- .num_resources = ARRAY_SIZE(i2c_emma_resources_1),
- },
- [2] = {
- .name = I2C_EMMA2RH,
- .id = 2,
- .resource = i2c_emma_resources_2,
- .num_resources = ARRAY_SIZE(i2c_emma_resources_2),
- },
-};
-
-#define EMMA2RH_SERIAL_CLOCK 18544000
-#define EMMA2RH_SERIAL_FLAGS UPF_BOOT_AUTOCONF | UPF_SKIP_TEST
-
-static struct plat_serial8250_port platform_serial_ports[] = {
- [0] = {
- .membase= (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR0_BASE + 3),
- .irq = EMMA2RH_IRQ_PFUR0,
- .uartclk = EMMA2RH_SERIAL_CLOCK,
- .regshift = 4,
- .iotype = UPIO_MEM,
- .flags = EMMA2RH_SERIAL_FLAGS,
- }, [1] = {
- .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR1_BASE + 3),
- .irq = EMMA2RH_IRQ_PFUR1,
- .uartclk = EMMA2RH_SERIAL_CLOCK,
- .regshift = 4,
- .iotype = UPIO_MEM,
- .flags = EMMA2RH_SERIAL_FLAGS,
- }, [2] = {
- .membase = (void __iomem*)KSEG1ADDR(EMMA2RH_PFUR2_BASE + 3),
- .irq = EMMA2RH_IRQ_PFUR2,
- .uartclk = EMMA2RH_SERIAL_CLOCK,
- .regshift = 4,
- .iotype = UPIO_MEM,
- .flags = EMMA2RH_SERIAL_FLAGS,
- }, [3] = {
- .flags = 0,
- },
-};
-
-static struct platform_device serial_emma = {
- .name = "serial8250",
- .dev = {
- .platform_data = &platform_serial_ports,
- },
-};
-
-static struct platform_device *devices[] = {
- &i2c_emma_devices[0],
- &i2c_emma_devices[1],
- &i2c_emma_devices[2],
- &serial_emma,
-};
-
-static struct mtd_partition markeins_parts[] = {
- [0] = {
- .name = "RootFS",
- .offset = 0x00000000,
- .size = 0x00c00000,
- },
- [1] = {
- .name = "boot code area",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x00100000,
- },
- [2] = {
- .name = "kernel image",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x00300000,
- },
- [3] = {
- .name = "RootFS2",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x00c00000,
- },
- [4] = {
- .name = "boot code area2",
- .offset = MTDPART_OFS_APPEND,
- .size = 0x00100000,
- },
- [5] = {
- .name = "kernel image2",
- .offset = MTDPART_OFS_APPEND,
- .size = MTDPART_SIZ_FULL,
- },
-};
-
-static int __init platform_devices_setup(void)
-{
- physmap_set_partitions(markeins_parts, ARRAY_SIZE(markeins_parts));
- return platform_add_devices(devices, ARRAY_SIZE(devices));
-}
-
-arch_initcall(platform_devices_setup);
-
diff --git a/arch/mips/emma2rh/markeins/setup.c b/arch/mips/emma2rh/markeins/setup.c
deleted file mode 100644
index b6a23ad..0000000
--- a/arch/mips/emma2rh/markeins/setup.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * arch/mips/emma2rh/markeins/setup.c
- * This file is setup for EMMA2RH Mark-eins.
- *
- * Copyright (C) NEC Electronics Corporation 2004-2006
- *
- * This file is based on the arch/mips/ddb5xxx/ddb5477/setup.c.
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-
-#include <asm/time.h>
-#include <asm/reboot.h>
-
-#include <asm/emma2rh/emma2rh.h>
-
-#define USE_CPU_COUNTER_TIMER /* whether we use cpu counter */
-
-extern void markeins_led(const char *);
-
-static int bus_frequency = 0;
-
-static void markeins_machine_restart(char *command)
-{
- static void (*back_to_prom) (void) = (void (*)(void))0xbfc00000;
-
- printk("cannot EMMA2RH Mark-eins restart.\n");
- markeins_led("restart.");
- back_to_prom();
-}
-
-static void markeins_machine_halt(void)
-{
- printk("EMMA2RH Mark-eins halted.\n");
- markeins_led("halted.");
- while (1) ;
-}
-
-static void markeins_machine_power_off(void)
-{
- printk("EMMA2RH Mark-eins halted. Please turn off the power.\n");
- markeins_led("poweroff.");
- while (1) ;
-}
-
-static unsigned long __initdata emma2rh_clock[4] = {
- 166500000, 187312500, 199800000, 210600000
-};
-
-static unsigned int __init detect_bus_frequency(unsigned long rtc_base)
-{
- u32 reg;
-
- /* detect from boot strap */
- reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
- reg = (reg >> 4) & 0x3;
-
- return emma2rh_clock[reg];
-}
-
-void __init plat_time_init(void)
-{
- u32 reg;
- if (bus_frequency == 0)
- bus_frequency = detect_bus_frequency(0);
-
- reg = emma2rh_in32(EMMA2RH_BHIF_STRAP_0);
- if ((reg & 0x3) == 0)
- reg = (reg >> 6) & 0x3;
- else {
- reg = emma2rh_in32(EMMA2RH_BHIF_MAIN_CTRL);
- reg = (reg >> 4) & 0x3;
- }
- mips_hpt_frequency = (bus_frequency * (4 + reg)) / 4 / 2;
-}
-
-static void markeins_board_init(void);
-extern void markeins_irq_setup(void);
-
-static void inline __init markeins_sio_setup(void)
-{
-}
-
-void __init plat_mem_setup(void)
-{
- /* initialize board - we don't trust the loader */
- markeins_board_init();
-
- set_io_port_base(KSEG1ADDR(EMMA2RH_PCI_IO_BASE));
-
- _machine_restart = markeins_machine_restart;
- _machine_halt = markeins_machine_halt;
- pm_power_off = markeins_machine_power_off;
-
- /* setup resource limits */
- ioport_resource.start = EMMA2RH_PCI_IO_BASE;
- ioport_resource.end = EMMA2RH_PCI_IO_BASE + EMMA2RH_PCI_IO_SIZE - 1;
- iomem_resource.start = EMMA2RH_IO_BASE;
- iomem_resource.end = EMMA2RH_ROM_BASE - 1;
-
- /* Reboot on panic */
- panic_timeout = 180;
-
- markeins_sio_setup();
-}
-
-static void __init markeins_board_init(void)
-{
- u32 val;
-
- val = emma2rh_in32(EMMA2RH_PBRD_INT_EN); /* open serial interrupts. */
- emma2rh_out32(EMMA2RH_PBRD_INT_EN, val | 0xaa);
- val = emma2rh_in32(EMMA2RH_PBRD_CLKSEL); /* set serial clocks. */
- emma2rh_out32(EMMA2RH_PBRD_CLKSEL, val | 0x5); /* 18MHz */
- emma2rh_out32(EMMA2RH_PCI_CONTROL, 0);
-
- markeins_led("MVL E2RH");
-}
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 04/12] MIPS: Move <asm/emma2rh> to <asm/emma> dir
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
2008-10-23 16:27 ` [PATCH 01/12] MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processors Shinya Kuribayashi
2008-10-23 16:29 ` [PATCH 03/12] MIPS: Move arch/mips/emma2rh/ into arch/mips/emma/ Shinya Kuribayashi
@ 2008-10-23 16:30 ` Shinya Kuribayashi
2008-10-27 15:07 ` [PATCH] MIPS: EMMA2RH: Fix incorrect header references Shinya Kuribayashi
2008-10-23 16:30 ` [PATCH 05/12] MIPS: Remove emma2rh_sync on read operation Shinya Kuribayashi
` (9 subsequent siblings)
12 siblings, 1 reply; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-23 16:30 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
We'll put all EMMA related headers there in the future.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
arch/mips/emma/common/irq.c | 2
arch/mips/emma/common/irq_emma2rh.c | 2
arch/mips/emma/common/prom.c | 2
arch/mips/emma/markeins/irq.c | 2
arch/mips/emma/markeins/irq_markeins.c | 2
arch/mips/emma/markeins/led.c | 2
arch/mips/emma/markeins/platform.c | 2
arch/mips/emma/markeins/setup.c | 2
arch/mips/include/asm/emma/emma2rh.h | 333 ++++++++++++++++++++++++++++++
arch/mips/include/asm/emma/markeins.h | 75 +++++++
arch/mips/include/asm/emma2rh/emma2rh.h | 333 ------------------------------
arch/mips/include/asm/emma2rh/markeins.h | 75 -------
12 files changed, 416 insertions(+), 416 deletions(-)
create mode 100644 arch/mips/include/asm/emma/emma2rh.h
create mode 100644 arch/mips/include/asm/emma/markeins.h
delete mode 100644 arch/mips/include/asm/emma2rh/emma2rh.h
delete mode 100644 arch/mips/include/asm/emma2rh/markeins.h
diff --git a/arch/mips/emma/common/irq.c b/arch/mips/emma/common/irq.c
index 91cbd95..4158f80 100644
--- a/arch/mips/emma/common/irq.c
+++ b/arch/mips/emma/common/irq.c
@@ -32,7 +32,7 @@
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
/*
* the first level int-handler will jump here if it is a emma2rh irq
diff --git a/arch/mips/emma/common/irq_emma2rh.c b/arch/mips/emma/common/irq_emma2rh.c
index 96df37b..23ac959 100644
--- a/arch/mips/emma/common/irq_emma2rh.c
+++ b/arch/mips/emma/common/irq_emma2rh.c
@@ -36,7 +36,7 @@
#include <asm/debug.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
/* number of total irqs supported by EMMA2RH */
#define NUM_EMMA2RH_IRQ 96
diff --git a/arch/mips/emma/common/prom.c b/arch/mips/emma/common/prom.c
index 97bf29e..120f53f 100644
--- a/arch/mips/emma/common/prom.c
+++ b/arch/mips/emma/common/prom.c
@@ -29,7 +29,7 @@
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
const char *get_system_type(void)
{
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index 6bcf6a0..dcb9392 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -36,7 +36,7 @@
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
/*
* IRQ mapping
diff --git a/arch/mips/emma/markeins/irq_markeins.c b/arch/mips/emma/markeins/irq_markeins.c
index fba5c15..bbe0d71 100644
--- a/arch/mips/emma/markeins/irq_markeins.c
+++ b/arch/mips/emma/markeins/irq_markeins.c
@@ -28,7 +28,7 @@
#include <linux/ptrace.h>
#include <asm/debug.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
static int emma2rh_sw_irq_base = -1;
static int emma2rh_gpio_irq_base = -1;
diff --git a/arch/mips/emma/markeins/led.c b/arch/mips/emma/markeins/led.c
index b65254c..377a181 100644
--- a/arch/mips/emma/markeins/led.c
+++ b/arch/mips/emma/markeins/led.c
@@ -21,7 +21,7 @@
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/string.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
const unsigned long clear = 0x20202020;
diff --git a/arch/mips/emma/markeins/platform.c b/arch/mips/emma/markeins/platform.c
index fb9cda2..88e87f6 100644
--- a/arch/mips/emma/markeins/platform.c
+++ b/arch/mips/emma/markeins/platform.c
@@ -36,7 +36,7 @@
#include <asm/reboot.h>
#include <asm/traps.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
#define I2C_EMMA2RH "emma2rh-iic" /* must be in sync with IIC driver */
diff --git a/arch/mips/emma/markeins/setup.c b/arch/mips/emma/markeins/setup.c
index b6a23ad..67f4565 100644
--- a/arch/mips/emma/markeins/setup.c
+++ b/arch/mips/emma/markeins/setup.c
@@ -29,7 +29,7 @@
#include <asm/time.h>
#include <asm/reboot.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
#define USE_CPU_COUNTER_TIMER /* whether we use cpu counter */
diff --git a/arch/mips/include/asm/emma/emma2rh.h b/arch/mips/include/asm/emma/emma2rh.h
new file mode 100644
index 0000000..458548e
--- /dev/null
+++ b/arch/mips/include/asm/emma/emma2rh.h
@@ -0,0 +1,333 @@
+/*
+ * include/asm-mips/emma2rh/emma2rh.h
+ * This file is EMMA2RH common header.
+ *
+ * Copyright (C) NEC Electronics Corporation 2005-2006
+ *
+ * This file based on include/asm-mips/ddb5xxx/ddb5xxx.h
+ * Copyright 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef __ASM_EMMA_EMMA2RH_H
+#define __ASM_EMMA_EMMA2RH_H
+
+#include <irq.h>
+
+/*
+ * EMMA2RH registers
+ */
+#define REGBASE 0x10000000
+
+#define EMMA2RH_BHIF_STRAP_0 (0x000010+REGBASE)
+#define EMMA2RH_BHIF_INT_ST_0 (0x000030+REGBASE)
+#define EMMA2RH_BHIF_INT_ST_1 (0x000034+REGBASE)
+#define EMMA2RH_BHIF_INT_ST_2 (0x000038+REGBASE)
+#define EMMA2RH_BHIF_INT_EN_0 (0x000040+REGBASE)
+#define EMMA2RH_BHIF_INT_EN_1 (0x000044+REGBASE)
+#define EMMA2RH_BHIF_INT_EN_2 (0x000048+REGBASE)
+#define EMMA2RH_BHIF_INT1_EN_0 (0x000050+REGBASE)
+#define EMMA2RH_BHIF_INT1_EN_1 (0x000054+REGBASE)
+#define EMMA2RH_BHIF_INT1_EN_2 (0x000058+REGBASE)
+#define EMMA2RH_BHIF_SW_INT (0x000070+REGBASE)
+#define EMMA2RH_BHIF_SW_INT_EN (0x000080+REGBASE)
+#define EMMA2RH_BHIF_SW_INT_CLR (0x000090+REGBASE)
+#define EMMA2RH_BHIF_MAIN_CTRL (0x0000b4+REGBASE)
+#define EMMA2RH_BHIF_EXCEPT_VECT_BASE_ADDRESS (0x0000c0+REGBASE)
+#define EMMA2RH_GPIO_DIR (0x110d20+REGBASE)
+#define EMMA2RH_GPIO_INT_ST (0x110d30+REGBASE)
+#define EMMA2RH_GPIO_INT_MASK (0x110d3c+REGBASE)
+#define EMMA2RH_GPIO_INT_MODE (0x110d48+REGBASE)
+#define EMMA2RH_GPIO_INT_CND_A (0x110d54+REGBASE)
+#define EMMA2RH_GPIO_INT_CND_B (0x110d60+REGBASE)
+#define EMMA2RH_PBRD_INT_EN (0x100010+REGBASE)
+#define EMMA2RH_PBRD_CLKSEL (0x100028+REGBASE)
+#define EMMA2RH_PFUR0_BASE (0x101000+REGBASE)
+#define EMMA2RH_PFUR1_BASE (0x102000+REGBASE)
+#define EMMA2RH_PFUR2_BASE (0x103000+REGBASE)
+#define EMMA2RH_PIIC0_BASE (0x107000+REGBASE)
+#define EMMA2RH_PIIC1_BASE (0x108000+REGBASE)
+#define EMMA2RH_PIIC2_BASE (0x109000+REGBASE)
+#define EMMA2RH_PCI_CONTROL (0x200000+REGBASE)
+#define EMMA2RH_PCI_ARBIT_CTR (0x200004+REGBASE)
+#define EMMA2RH_PCI_IWIN0_CTR (0x200010+REGBASE)
+#define EMMA2RH_PCI_IWIN1_CTR (0x200014+REGBASE)
+#define EMMA2RH_PCI_INIT_ESWP (0x200018+REGBASE)
+#define EMMA2RH_PCI_INT (0x200020+REGBASE)
+#define EMMA2RH_PCI_INT_EN (0x200024+REGBASE)
+#define EMMA2RH_PCI_TWIN_CTR (0x200030+REGBASE)
+#define EMMA2RH_PCI_TWIN_BADR (0x200034+REGBASE)
+#define EMMA2RH_PCI_TWIN0_DADR (0x200038+REGBASE)
+#define EMMA2RH_PCI_TWIN1_DADR (0x20003c+REGBASE)
+
+/*
+ * Memory map (physical address)
+ *
+ * Note most of the following address must be properly aligned by the
+ * corresponding size. For example, if PCI_IO_SIZE is 16MB, then
+ * PCI_IO_BASE must be aligned along 16MB boundary.
+ */
+
+/* the actual ram size is detected at run-time */
+#define EMMA2RH_RAM_BASE 0x00000000
+#define EMMA2RH_RAM_SIZE 0x10000000 /* less than 256MB */
+
+#define EMMA2RH_IO_BASE 0x10000000
+#define EMMA2RH_IO_SIZE 0x01000000 /* 16 MB */
+
+#define EMMA2RH_GENERALIO_BASE 0x11000000
+#define EMMA2RH_GENERALIO_SIZE 0x01000000 /* 16 MB */
+
+#define EMMA2RH_PCI_IO_BASE 0x12000000
+#define EMMA2RH_PCI_IO_SIZE 0x02000000 /* 32 MB */
+
+#define EMMA2RH_PCI_MEM_BASE 0x14000000
+#define EMMA2RH_PCI_MEM_SIZE 0x08000000 /* 128 MB */
+
+#define EMMA2RH_ROM_BASE 0x1c000000
+#define EMMA2RH_ROM_SIZE 0x04000000 /* 64 MB */
+
+#define EMMA2RH_PCI_CONFIG_BASE EMMA2RH_PCI_IO_BASE
+#define EMMA2RH_PCI_CONFIG_SIZE EMMA2RH_PCI_IO_SIZE
+
+#define NUM_CPU_IRQ 8
+#define NUM_EMMA2RH_IRQ 96
+
+#define CPU_EMMA2RH_CASCADE 2
+#define CPU_IRQ_BASE MIPS_CPU_IRQ_BASE
+#define EMMA2RH_IRQ_BASE (CPU_IRQ_BASE + NUM_CPU_IRQ)
+
+/*
+ * emma2rh irq defs
+ */
+
+#define EMMA2RH_IRQ_INT0 (0 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT1 (1 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT2 (2 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT3 (3 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT4 (4 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT5 (5 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT6 (6 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT7 (7 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT8 (8 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT9 (9 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT10 (10 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT11 (11 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT12 (12 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT13 (13 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT14 (14 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT15 (15 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT16 (16 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT17 (17 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT18 (18 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT19 (19 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT20 (20 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT21 (21 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT22 (22 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT23 (23 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT24 (24 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT25 (25 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT26 (26 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT27 (27 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT28 (28 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT29 (29 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT30 (30 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT31 (31 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT32 (32 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT33 (33 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT34 (34 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT35 (35 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT36 (36 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT37 (37 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT38 (38 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT39 (39 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT40 (40 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT41 (41 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT42 (42 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT43 (43 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT44 (44 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT45 (45 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT46 (46 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT47 (47 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT48 (48 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT49 (49 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT50 (50 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT51 (51 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT52 (52 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT53 (53 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT54 (54 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT55 (55 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT56 (56 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT57 (57 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT58 (58 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT59 (59 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT60 (60 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT61 (61 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT62 (62 + EMMA2RH_IRQ_BASE)
+#define EMMA2RH_IRQ_INT63 (63 + EMMA2RH_IRQ_BASE)
+
+#define EMMA2RH_IRQ_PFUR0 EMMA2RH_IRQ_INT49
+#define EMMA2RH_IRQ_PFUR1 EMMA2RH_IRQ_INT50
+#define EMMA2RH_IRQ_PFUR2 EMMA2RH_IRQ_INT51
+#define EMMA2RH_IRQ_PIIC0 EMMA2RH_IRQ_INT56
+#define EMMA2RH_IRQ_PIIC1 EMMA2RH_IRQ_INT57
+#define EMMA2RH_IRQ_PIIC2 EMMA2RH_IRQ_INT58
+
+/*
+ * EMMA2RH Register Access
+ */
+
+#define EMMA2RH_BASE (0xa0000000)
+
+static inline void emma2rh_sync(void)
+{
+ volatile u32 *p = (volatile u32 *)0xbfc00000;
+ (void)(*p);
+}
+
+static inline void emma2rh_out32(u32 offset, u32 val)
+{
+ *(volatile u32 *)(EMMA2RH_BASE | offset) = val;
+ emma2rh_sync();
+}
+
+static inline u32 emma2rh_in32(u32 offset)
+{
+ u32 val = *(volatile u32 *)(EMMA2RH_BASE | offset);
+ emma2rh_sync();
+ return val;
+}
+
+static inline void emma2rh_out16(u32 offset, u16 val)
+{
+ *(volatile u16 *)(EMMA2RH_BASE | offset) = val;
+ emma2rh_sync();
+}
+
+static inline u16 emma2rh_in16(u32 offset)
+{
+ u16 val = *(volatile u16 *)(EMMA2RH_BASE | offset);
+ emma2rh_sync();
+ return val;
+}
+
+static inline void emma2rh_out8(u32 offset, u8 val)
+{
+ *(volatile u8 *)(EMMA2RH_BASE | offset) = val;
+ emma2rh_sync();
+}
+
+static inline u8 emma2rh_in8(u32 offset)
+{
+ u8 val = *(volatile u8 *)(EMMA2RH_BASE | offset);
+ emma2rh_sync();
+ return val;
+}
+
+/**
+ * IIC registers map
+ **/
+
+/*---------------------------------------------------------------------------*/
+/* CNT - Control register (00H R/W) */
+/*---------------------------------------------------------------------------*/
+#define SPT 0x00000001
+#define STT 0x00000002
+#define ACKE 0x00000004
+#define WTIM 0x00000008
+#define SPIE 0x00000010
+#define WREL 0x00000020
+#define LREL 0x00000040
+#define IICE 0x00000080
+#define CNT_RESERVED 0x000000ff /* reserved bit 0 */
+
+#define I2C_EMMA_START (IICE | STT)
+#define I2C_EMMA_STOP (IICE | SPT)
+#define I2C_EMMA_REPSTART I2C_EMMA_START
+
+/*---------------------------------------------------------------------------*/
+/* STA - Status register (10H Read) */
+/*---------------------------------------------------------------------------*/
+#define MSTS 0x00000080
+#define ALD 0x00000040
+#define EXC 0x00000020
+#define COI 0x00000010
+#define TRC 0x00000008
+#define ACKD 0x00000004
+#define STD 0x00000002
+#define SPD 0x00000001
+
+/*---------------------------------------------------------------------------*/
+/* CSEL - Clock select register (20H R/W) */
+/*---------------------------------------------------------------------------*/
+#define FCL 0x00000080
+#define ND50 0x00000040
+#define CLD 0x00000020
+#define DAD 0x00000010
+#define SMC 0x00000008
+#define DFC 0x00000004
+#define CL 0x00000003
+#define CSEL_RESERVED 0x000000ff /* reserved bit 0 */
+
+#define FAST397 0x0000008b
+#define FAST297 0x0000008a
+#define FAST347 0x0000000b
+#define FAST260 0x0000000a
+#define FAST130 0x00000008
+#define STANDARD108 0x00000083
+#define STANDARD83 0x00000082
+#define STANDARD95 0x00000003
+#define STANDARD73 0x00000002
+#define STANDARD36 0x00000001
+#define STANDARD71 0x00000000
+
+/*---------------------------------------------------------------------------*/
+/* SVA - Slave address register (30H R/W) */
+/*---------------------------------------------------------------------------*/
+#define SVA 0x000000fe
+
+/*---------------------------------------------------------------------------*/
+/* SHR - Shift register (40H R/W) */
+/*---------------------------------------------------------------------------*/
+#define SR 0x000000ff
+
+/*---------------------------------------------------------------------------*/
+/* INT - Interrupt register (50H R/W) */
+/* INTM - Interrupt mask register (60H R/W) */
+/*---------------------------------------------------------------------------*/
+#define INTE0 0x00000001
+
+/***********************************************************************
+ * I2C registers
+ ***********************************************************************
+ */
+#define I2C_EMMA_CNT 0x00
+#define I2C_EMMA_STA 0x10
+#define I2C_EMMA_CSEL 0x20
+#define I2C_EMMA_SVA 0x30
+#define I2C_EMMA_SHR 0x40
+#define I2C_EMMA_INT 0x50
+#define I2C_EMMA_INTM 0x60
+
+/*
+ * include the board dependent part
+ */
+#ifdef CONFIG_NEC_MARKEINS
+#include <asm/emma/markeins.h>
+#else
+#error "Unknown EMMA2RH board!"
+#endif
+
+#endif /* __ASM_EMMA_EMMA2RH_H */
diff --git a/arch/mips/include/asm/emma/markeins.h b/arch/mips/include/asm/emma/markeins.h
new file mode 100644
index 0000000..973b062
--- /dev/null
+++ b/arch/mips/include/asm/emma/markeins.h
@@ -0,0 +1,75 @@
+/*
+ * include/asm-mips/emma2rh/markeins.h
+ * This file is EMMA2RH board depended header.
+ *
+ * Copyright (C) NEC Electronics Corporation 2005-2006
+ *
+ * This file based on include/asm-mips/ddb5xxx/ddb5xxx.h
+ * Copyright 2001 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef MARKEINS_H
+#define MARKEINS_H
+
+#define NUM_EMMA2RH_IRQ_SW 32
+#define NUM_EMMA2RH_IRQ_GPIO 32
+
+#define EMMA2RH_SW_CASCADE (EMMA2RH_IRQ_INT7 - EMMA2RH_IRQ_INT0)
+#define EMMA2RH_GPIO_CASCADE (EMMA2RH_IRQ_INT46 - EMMA2RH_IRQ_INT0)
+
+#define EMMA2RH_SW_IRQ_BASE (EMMA2RH_IRQ_BASE + NUM_EMMA2RH_IRQ)
+#define EMMA2RH_GPIO_IRQ_BASE (EMMA2RH_SW_IRQ_BASE + NUM_EMMA2RH_IRQ_SW)
+
+#define EMMA2RH_SW_IRQ_INT0 (0+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT1 (1+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT2 (2+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT3 (3+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT4 (4+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT5 (5+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT6 (6+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT7 (7+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT8 (8+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT9 (9+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT10 (10+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT11 (11+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT12 (12+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT13 (13+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT14 (14+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT15 (15+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT16 (16+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT17 (17+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT18 (18+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT19 (19+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT20 (20+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT21 (21+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT22 (22+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT23 (23+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT24 (24+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT25 (25+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT26 (26+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT27 (27+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT28 (28+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT29 (29+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT30 (30+EMMA2RH_SW_IRQ_BASE)
+#define EMMA2RH_SW_IRQ_INT31 (31+EMMA2RH_SW_IRQ_BASE)
+
+#define MARKEINS_PCI_IRQ_INTA EMMA2RH_GPIO_IRQ_BASE+15
+#define MARKEINS_PCI_IRQ_INTB EMMA2RH_GPIO_IRQ_BASE+16
+#define MARKEINS_PCI_IRQ_INTC EMMA2RH_GPIO_IRQ_BASE+17
+#define MARKEINS_PCI_IRQ_INTD EMMA2RH_GPIO_IRQ_BASE+18
+
+#endif /* CONFIG_MARKEINS */
diff --git a/arch/mips/include/asm/emma2rh/emma2rh.h b/arch/mips/include/asm/emma2rh/emma2rh.h
deleted file mode 100644
index 5d79669..0000000
--- a/arch/mips/include/asm/emma2rh/emma2rh.h
+++ /dev/null
@@ -1,333 +0,0 @@
-/*
- * include/asm-mips/emma2rh/emma2rh.h
- * This file is EMMA2RH common header.
- *
- * Copyright (C) NEC Electronics Corporation 2005-2006
- *
- * This file based on include/asm-mips/ddb5xxx/ddb5xxx.h
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#ifndef __ASM_EMMA2RH_EMMA2RH_H
-#define __ASM_EMMA2RH_EMMA2RH_H
-
-#include <irq.h>
-
-/*
- * EMMA2RH registers
- */
-#define REGBASE 0x10000000
-
-#define EMMA2RH_BHIF_STRAP_0 (0x000010+REGBASE)
-#define EMMA2RH_BHIF_INT_ST_0 (0x000030+REGBASE)
-#define EMMA2RH_BHIF_INT_ST_1 (0x000034+REGBASE)
-#define EMMA2RH_BHIF_INT_ST_2 (0x000038+REGBASE)
-#define EMMA2RH_BHIF_INT_EN_0 (0x000040+REGBASE)
-#define EMMA2RH_BHIF_INT_EN_1 (0x000044+REGBASE)
-#define EMMA2RH_BHIF_INT_EN_2 (0x000048+REGBASE)
-#define EMMA2RH_BHIF_INT1_EN_0 (0x000050+REGBASE)
-#define EMMA2RH_BHIF_INT1_EN_1 (0x000054+REGBASE)
-#define EMMA2RH_BHIF_INT1_EN_2 (0x000058+REGBASE)
-#define EMMA2RH_BHIF_SW_INT (0x000070+REGBASE)
-#define EMMA2RH_BHIF_SW_INT_EN (0x000080+REGBASE)
-#define EMMA2RH_BHIF_SW_INT_CLR (0x000090+REGBASE)
-#define EMMA2RH_BHIF_MAIN_CTRL (0x0000b4+REGBASE)
-#define EMMA2RH_BHIF_EXCEPT_VECT_BASE_ADDRESS (0x0000c0+REGBASE)
-#define EMMA2RH_GPIO_DIR (0x110d20+REGBASE)
-#define EMMA2RH_GPIO_INT_ST (0x110d30+REGBASE)
-#define EMMA2RH_GPIO_INT_MASK (0x110d3c+REGBASE)
-#define EMMA2RH_GPIO_INT_MODE (0x110d48+REGBASE)
-#define EMMA2RH_GPIO_INT_CND_A (0x110d54+REGBASE)
-#define EMMA2RH_GPIO_INT_CND_B (0x110d60+REGBASE)
-#define EMMA2RH_PBRD_INT_EN (0x100010+REGBASE)
-#define EMMA2RH_PBRD_CLKSEL (0x100028+REGBASE)
-#define EMMA2RH_PFUR0_BASE (0x101000+REGBASE)
-#define EMMA2RH_PFUR1_BASE (0x102000+REGBASE)
-#define EMMA2RH_PFUR2_BASE (0x103000+REGBASE)
-#define EMMA2RH_PIIC0_BASE (0x107000+REGBASE)
-#define EMMA2RH_PIIC1_BASE (0x108000+REGBASE)
-#define EMMA2RH_PIIC2_BASE (0x109000+REGBASE)
-#define EMMA2RH_PCI_CONTROL (0x200000+REGBASE)
-#define EMMA2RH_PCI_ARBIT_CTR (0x200004+REGBASE)
-#define EMMA2RH_PCI_IWIN0_CTR (0x200010+REGBASE)
-#define EMMA2RH_PCI_IWIN1_CTR (0x200014+REGBASE)
-#define EMMA2RH_PCI_INIT_ESWP (0x200018+REGBASE)
-#define EMMA2RH_PCI_INT (0x200020+REGBASE)
-#define EMMA2RH_PCI_INT_EN (0x200024+REGBASE)
-#define EMMA2RH_PCI_TWIN_CTR (0x200030+REGBASE)
-#define EMMA2RH_PCI_TWIN_BADR (0x200034+REGBASE)
-#define EMMA2RH_PCI_TWIN0_DADR (0x200038+REGBASE)
-#define EMMA2RH_PCI_TWIN1_DADR (0x20003c+REGBASE)
-
-/*
- * Memory map (physical address)
- *
- * Note most of the following address must be properly aligned by the
- * corresponding size. For example, if PCI_IO_SIZE is 16MB, then
- * PCI_IO_BASE must be aligned along 16MB boundary.
- */
-
-/* the actual ram size is detected at run-time */
-#define EMMA2RH_RAM_BASE 0x00000000
-#define EMMA2RH_RAM_SIZE 0x10000000 /* less than 256MB */
-
-#define EMMA2RH_IO_BASE 0x10000000
-#define EMMA2RH_IO_SIZE 0x01000000 /* 16 MB */
-
-#define EMMA2RH_GENERALIO_BASE 0x11000000
-#define EMMA2RH_GENERALIO_SIZE 0x01000000 /* 16 MB */
-
-#define EMMA2RH_PCI_IO_BASE 0x12000000
-#define EMMA2RH_PCI_IO_SIZE 0x02000000 /* 32 MB */
-
-#define EMMA2RH_PCI_MEM_BASE 0x14000000
-#define EMMA2RH_PCI_MEM_SIZE 0x08000000 /* 128 MB */
-
-#define EMMA2RH_ROM_BASE 0x1c000000
-#define EMMA2RH_ROM_SIZE 0x04000000 /* 64 MB */
-
-#define EMMA2RH_PCI_CONFIG_BASE EMMA2RH_PCI_IO_BASE
-#define EMMA2RH_PCI_CONFIG_SIZE EMMA2RH_PCI_IO_SIZE
-
-#define NUM_CPU_IRQ 8
-#define NUM_EMMA2RH_IRQ 96
-
-#define CPU_EMMA2RH_CASCADE 2
-#define CPU_IRQ_BASE MIPS_CPU_IRQ_BASE
-#define EMMA2RH_IRQ_BASE (CPU_IRQ_BASE + NUM_CPU_IRQ)
-
-/*
- * emma2rh irq defs
- */
-
-#define EMMA2RH_IRQ_INT0 (0 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT1 (1 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT2 (2 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT3 (3 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT4 (4 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT5 (5 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT6 (6 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT7 (7 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT8 (8 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT9 (9 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT10 (10 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT11 (11 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT12 (12 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT13 (13 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT14 (14 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT15 (15 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT16 (16 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT17 (17 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT18 (18 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT19 (19 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT20 (20 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT21 (21 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT22 (22 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT23 (23 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT24 (24 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT25 (25 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT26 (26 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT27 (27 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT28 (28 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT29 (29 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT30 (30 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT31 (31 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT32 (32 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT33 (33 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT34 (34 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT35 (35 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT36 (36 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT37 (37 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT38 (38 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT39 (39 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT40 (40 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT41 (41 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT42 (42 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT43 (43 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT44 (44 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT45 (45 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT46 (46 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT47 (47 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT48 (48 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT49 (49 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT50 (50 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT51 (51 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT52 (52 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT53 (53 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT54 (54 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT55 (55 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT56 (56 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT57 (57 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT58 (58 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT59 (59 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT60 (60 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT61 (61 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT62 (62 + EMMA2RH_IRQ_BASE)
-#define EMMA2RH_IRQ_INT63 (63 + EMMA2RH_IRQ_BASE)
-
-#define EMMA2RH_IRQ_PFUR0 EMMA2RH_IRQ_INT49
-#define EMMA2RH_IRQ_PFUR1 EMMA2RH_IRQ_INT50
-#define EMMA2RH_IRQ_PFUR2 EMMA2RH_IRQ_INT51
-#define EMMA2RH_IRQ_PIIC0 EMMA2RH_IRQ_INT56
-#define EMMA2RH_IRQ_PIIC1 EMMA2RH_IRQ_INT57
-#define EMMA2RH_IRQ_PIIC2 EMMA2RH_IRQ_INT58
-
-/*
- * EMMA2RH Register Access
- */
-
-#define EMMA2RH_BASE (0xa0000000)
-
-static inline void emma2rh_sync(void)
-{
- volatile u32 *p = (volatile u32 *)0xbfc00000;
- (void)(*p);
-}
-
-static inline void emma2rh_out32(u32 offset, u32 val)
-{
- *(volatile u32 *)(EMMA2RH_BASE | offset) = val;
- emma2rh_sync();
-}
-
-static inline u32 emma2rh_in32(u32 offset)
-{
- u32 val = *(volatile u32 *)(EMMA2RH_BASE | offset);
- emma2rh_sync();
- return val;
-}
-
-static inline void emma2rh_out16(u32 offset, u16 val)
-{
- *(volatile u16 *)(EMMA2RH_BASE | offset) = val;
- emma2rh_sync();
-}
-
-static inline u16 emma2rh_in16(u32 offset)
-{
- u16 val = *(volatile u16 *)(EMMA2RH_BASE | offset);
- emma2rh_sync();
- return val;
-}
-
-static inline void emma2rh_out8(u32 offset, u8 val)
-{
- *(volatile u8 *)(EMMA2RH_BASE | offset) = val;
- emma2rh_sync();
-}
-
-static inline u8 emma2rh_in8(u32 offset)
-{
- u8 val = *(volatile u8 *)(EMMA2RH_BASE | offset);
- emma2rh_sync();
- return val;
-}
-
-/**
- * IIC registers map
- **/
-
-/*---------------------------------------------------------------------------*/
-/* CNT - Control register (00H R/W) */
-/*---------------------------------------------------------------------------*/
-#define SPT 0x00000001
-#define STT 0x00000002
-#define ACKE 0x00000004
-#define WTIM 0x00000008
-#define SPIE 0x00000010
-#define WREL 0x00000020
-#define LREL 0x00000040
-#define IICE 0x00000080
-#define CNT_RESERVED 0x000000ff /* reserved bit 0 */
-
-#define I2C_EMMA_START (IICE | STT)
-#define I2C_EMMA_STOP (IICE | SPT)
-#define I2C_EMMA_REPSTART I2C_EMMA_START
-
-/*---------------------------------------------------------------------------*/
-/* STA - Status register (10H Read) */
-/*---------------------------------------------------------------------------*/
-#define MSTS 0x00000080
-#define ALD 0x00000040
-#define EXC 0x00000020
-#define COI 0x00000010
-#define TRC 0x00000008
-#define ACKD 0x00000004
-#define STD 0x00000002
-#define SPD 0x00000001
-
-/*---------------------------------------------------------------------------*/
-/* CSEL - Clock select register (20H R/W) */
-/*---------------------------------------------------------------------------*/
-#define FCL 0x00000080
-#define ND50 0x00000040
-#define CLD 0x00000020
-#define DAD 0x00000010
-#define SMC 0x00000008
-#define DFC 0x00000004
-#define CL 0x00000003
-#define CSEL_RESERVED 0x000000ff /* reserved bit 0 */
-
-#define FAST397 0x0000008b
-#define FAST297 0x0000008a
-#define FAST347 0x0000000b
-#define FAST260 0x0000000a
-#define FAST130 0x00000008
-#define STANDARD108 0x00000083
-#define STANDARD83 0x00000082
-#define STANDARD95 0x00000003
-#define STANDARD73 0x00000002
-#define STANDARD36 0x00000001
-#define STANDARD71 0x00000000
-
-/*---------------------------------------------------------------------------*/
-/* SVA - Slave address register (30H R/W) */
-/*---------------------------------------------------------------------------*/
-#define SVA 0x000000fe
-
-/*---------------------------------------------------------------------------*/
-/* SHR - Shift register (40H R/W) */
-/*---------------------------------------------------------------------------*/
-#define SR 0x000000ff
-
-/*---------------------------------------------------------------------------*/
-/* INT - Interrupt register (50H R/W) */
-/* INTM - Interrupt mask register (60H R/W) */
-/*---------------------------------------------------------------------------*/
-#define INTE0 0x00000001
-
-/***********************************************************************
- * I2C registers
- ***********************************************************************
- */
-#define I2C_EMMA_CNT 0x00
-#define I2C_EMMA_STA 0x10
-#define I2C_EMMA_CSEL 0x20
-#define I2C_EMMA_SVA 0x30
-#define I2C_EMMA_SHR 0x40
-#define I2C_EMMA_INT 0x50
-#define I2C_EMMA_INTM 0x60
-
-/*
- * include the board dependent part
- */
-#ifdef CONFIG_NEC_MARKEINS
-#include <asm/emma2rh/markeins.h>
-#else
-#error "Unknown EMMA2RH board!"
-#endif
-
-#endif /* __ASM_EMMA2RH_EMMA2RH_H */
diff --git a/arch/mips/include/asm/emma2rh/markeins.h b/arch/mips/include/asm/emma2rh/markeins.h
deleted file mode 100644
index 973b062..0000000
--- a/arch/mips/include/asm/emma2rh/markeins.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * include/asm-mips/emma2rh/markeins.h
- * This file is EMMA2RH board depended header.
- *
- * Copyright (C) NEC Electronics Corporation 2005-2006
- *
- * This file based on include/asm-mips/ddb5xxx/ddb5xxx.h
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifndef MARKEINS_H
-#define MARKEINS_H
-
-#define NUM_EMMA2RH_IRQ_SW 32
-#define NUM_EMMA2RH_IRQ_GPIO 32
-
-#define EMMA2RH_SW_CASCADE (EMMA2RH_IRQ_INT7 - EMMA2RH_IRQ_INT0)
-#define EMMA2RH_GPIO_CASCADE (EMMA2RH_IRQ_INT46 - EMMA2RH_IRQ_INT0)
-
-#define EMMA2RH_SW_IRQ_BASE (EMMA2RH_IRQ_BASE + NUM_EMMA2RH_IRQ)
-#define EMMA2RH_GPIO_IRQ_BASE (EMMA2RH_SW_IRQ_BASE + NUM_EMMA2RH_IRQ_SW)
-
-#define EMMA2RH_SW_IRQ_INT0 (0+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT1 (1+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT2 (2+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT3 (3+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT4 (4+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT5 (5+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT6 (6+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT7 (7+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT8 (8+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT9 (9+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT10 (10+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT11 (11+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT12 (12+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT13 (13+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT14 (14+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT15 (15+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT16 (16+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT17 (17+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT18 (18+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT19 (19+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT20 (20+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT21 (21+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT22 (22+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT23 (23+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT24 (24+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT25 (25+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT26 (26+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT27 (27+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT28 (28+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT29 (29+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT30 (30+EMMA2RH_SW_IRQ_BASE)
-#define EMMA2RH_SW_IRQ_INT31 (31+EMMA2RH_SW_IRQ_BASE)
-
-#define MARKEINS_PCI_IRQ_INTA EMMA2RH_GPIO_IRQ_BASE+15
-#define MARKEINS_PCI_IRQ_INTB EMMA2RH_GPIO_IRQ_BASE+16
-#define MARKEINS_PCI_IRQ_INTC EMMA2RH_GPIO_IRQ_BASE+17
-#define MARKEINS_PCI_IRQ_INTD EMMA2RH_GPIO_IRQ_BASE+18
-
-#endif /* CONFIG_MARKEINS */
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 05/12] MIPS: Remove emma2rh_sync on read operation
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
` (2 preceding siblings ...)
2008-10-23 16:30 ` [PATCH 04/12] MIPS: Move <asm/emma2rh> to <asm/emma> dir Shinya Kuribayashi
@ 2008-10-23 16:30 ` Shinya Kuribayashi
2008-10-23 16:31 ` [PATCH 06/12] MIPS: EMMA2RH: Remove emma2rh_irq_base global variable Shinya Kuribayashi
` (8 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-23 16:30 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
It's totally a waste of CPU cycles.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
arch/mips/include/asm/emma/emma2rh.h | 3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/arch/mips/include/asm/emma/emma2rh.h b/arch/mips/include/asm/emma/emma2rh.h
index 458548e..cd84850 100644
--- a/arch/mips/include/asm/emma/emma2rh.h
+++ b/arch/mips/include/asm/emma/emma2rh.h
@@ -206,7 +206,6 @@ static inline void emma2rh_out32(u32 offset, u32 val)
static inline u32 emma2rh_in32(u32 offset)
{
u32 val = *(volatile u32 *)(EMMA2RH_BASE | offset);
- emma2rh_sync();
return val;
}
@@ -219,7 +218,6 @@ static inline void emma2rh_out16(u32 offset, u16 val)
static inline u16 emma2rh_in16(u32 offset)
{
u16 val = *(volatile u16 *)(EMMA2RH_BASE | offset);
- emma2rh_sync();
return val;
}
@@ -232,7 +230,6 @@ static inline void emma2rh_out8(u32 offset, u8 val)
static inline u8 emma2rh_in8(u32 offset)
{
u8 val = *(volatile u8 *)(EMMA2RH_BASE | offset);
- emma2rh_sync();
return val;
}
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 06/12] MIPS: EMMA2RH: Remove emma2rh_irq_base global variable
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
` (3 preceding siblings ...)
2008-10-23 16:30 ` [PATCH 05/12] MIPS: Remove emma2rh_sync on read operation Shinya Kuribayashi
@ 2008-10-23 16:31 ` Shinya Kuribayashi
2008-10-23 16:31 ` [PATCH 07/12] MIPS: EMMA2RH: Remove emma2rh_sw_irq_base Shinya Kuribayashi
` (7 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-23 16:31 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
Let's use immediate value, instead. This also saves memory footprint,
and probably a little bit faster.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
arch/mips/emma/common/irq_emma2rh.c | 15 ++++++---------
arch/mips/emma/markeins/irq.c | 4 ++--
2 files changed, 8 insertions(+), 11 deletions(-)
diff --git a/arch/mips/emma/common/irq_emma2rh.c b/arch/mips/emma/common/irq_emma2rh.c
index 23ac959..4f84fed 100644
--- a/arch/mips/emma/common/irq_emma2rh.c
+++ b/arch/mips/emma/common/irq_emma2rh.c
@@ -41,19 +41,17 @@
/* number of total irqs supported by EMMA2RH */
#define NUM_EMMA2RH_IRQ 96
-static int emma2rh_irq_base = -1;
-
void ll_emma2rh_irq_enable(int);
void ll_emma2rh_irq_disable(int);
static void emma2rh_irq_enable(unsigned int irq)
{
- ll_emma2rh_irq_enable(irq - emma2rh_irq_base);
+ ll_emma2rh_irq_enable(irq - EMMA2RH_IRQ_BASE);
}
static void emma2rh_irq_disable(unsigned int irq)
{
- ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
+ ll_emma2rh_irq_disable(irq - EMMA2RH_IRQ_BASE);
}
struct irq_chip emma2rh_irq_controller = {
@@ -64,15 +62,14 @@ struct irq_chip emma2rh_irq_controller = {
.unmask = emma2rh_irq_enable,
};
-void emma2rh_irq_init(u32 irq_base)
+void emma2rh_irq_init(void)
{
u32 i;
- for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++)
- set_irq_chip_and_handler(i, &emma2rh_irq_controller,
+ for (i = 0; i < NUM_EMMA2RH_IRQ; i++)
+ set_irq_chip_and_handler(EMMA2RH_IRQ_BASE + i,
+ &emma2rh_irq_controller,
handle_level_irq);
-
- emma2rh_irq_base = irq_base;
}
void ll_emma2rh_irq_enable(int emma2rh_irq)
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index dcb9392..86b9b6a 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -55,7 +55,7 @@
extern void emma2rh_sw_irq_init(u32 base);
extern void emma2rh_gpio_irq_init(u32 base);
-extern void emma2rh_irq_init(u32 base);
+extern void emma2rh_irq_init(void);
extern void emma2rh_irq_dispatch(void);
static struct irqaction irq_cascade = {
@@ -102,7 +102,7 @@ void __init arch_init_irq(void)
emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~GPIO_PCI);
/* init all controllers */
- emma2rh_irq_init(EMMA2RH_IRQ_BASE);
+ emma2rh_irq_init();
emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE);
emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE);
mips_cpu_irq_init();
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 07/12] MIPS: EMMA2RH: Remove emma2rh_sw_irq_base
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
` (4 preceding siblings ...)
2008-10-23 16:31 ` [PATCH 06/12] MIPS: EMMA2RH: Remove emma2rh_irq_base global variable Shinya Kuribayashi
@ 2008-10-23 16:31 ` Shinya Kuribayashi
2008-10-23 16:32 ` [PATCH 08/12] MIPS: EMMA2RH: Remove emma2rh_gpio_irq_base Shinya Kuribayashi
` (6 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-23 16:31 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
Let's use immediate value, instead. This also saves memory footprint,
and probably a little bit faster.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
arch/mips/emma/markeins/irq.c | 4 ++--
arch/mips/emma/markeins/irq_markeins.c | 14 ++++++--------
2 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index 86b9b6a..c0f9d46 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -53,7 +53,7 @@
*
*/
-extern void emma2rh_sw_irq_init(u32 base);
+extern void emma2rh_sw_irq_init(void);
extern void emma2rh_gpio_irq_init(u32 base);
extern void emma2rh_irq_init(void);
extern void emma2rh_irq_dispatch(void);
@@ -103,7 +103,7 @@ void __init arch_init_irq(void)
/* init all controllers */
emma2rh_irq_init();
- emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE);
+ emma2rh_sw_irq_init();
emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE);
mips_cpu_irq_init();
diff --git a/arch/mips/emma/markeins/irq_markeins.c b/arch/mips/emma/markeins/irq_markeins.c
index bbe0d71..1883421 100644
--- a/arch/mips/emma/markeins/irq_markeins.c
+++ b/arch/mips/emma/markeins/irq_markeins.c
@@ -30,7 +30,6 @@
#include <asm/debug.h>
#include <asm/emma/emma2rh.h>
-static int emma2rh_sw_irq_base = -1;
static int emma2rh_gpio_irq_base = -1;
void ll_emma2rh_sw_irq_enable(int reg);
@@ -40,12 +39,12 @@ void ll_emma2rh_gpio_irq_disable(int reg);
static void emma2rh_sw_irq_enable(unsigned int irq)
{
- ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base);
+ ll_emma2rh_sw_irq_enable(irq - EMMA2RH_SW_IRQ_BASE);
}
static void emma2rh_sw_irq_disable(unsigned int irq)
{
- ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base);
+ ll_emma2rh_sw_irq_disable(irq - EMMA2RH_SW_IRQ_BASE);
}
struct irq_chip emma2rh_sw_irq_controller = {
@@ -56,15 +55,14 @@ struct irq_chip emma2rh_sw_irq_controller = {
.unmask = emma2rh_sw_irq_enable,
};
-void emma2rh_sw_irq_init(u32 irq_base)
+void emma2rh_sw_irq_init(void)
{
u32 i;
- for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++)
- set_irq_chip_and_handler(i, &emma2rh_sw_irq_controller,
+ for (i = 0; i < NUM_EMMA2RH_IRQ_SW; i++)
+ set_irq_chip_and_handler(EMMA2RH_SW_IRQ_BASE + i,
+ &emma2rh_sw_irq_controller,
handle_level_irq);
-
- emma2rh_sw_irq_base = irq_base;
}
void ll_emma2rh_sw_irq_enable(int irq)
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 08/12] MIPS: EMMA2RH: Remove emma2rh_gpio_irq_base
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
` (5 preceding siblings ...)
2008-10-23 16:31 ` [PATCH 07/12] MIPS: EMMA2RH: Remove emma2rh_sw_irq_base Shinya Kuribayashi
@ 2008-10-23 16:32 ` Shinya Kuribayashi
2008-10-23 17:20 ` Markus Gothe
2008-10-23 16:32 ` [PATCH 09/12] MIPS: Fold arch/mips/emma/{common,markeins}/irq*.c into markeins/irq.c Shinya Kuribayashi
` (5 subsequent siblings)
12 siblings, 1 reply; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-23 16:32 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
Let's use immediate value, instead. This also saves memory footprint,
and probably a little bit faster.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
arch/mips/emma/markeins/irq.c | 4 ++--
arch/mips/emma/markeins/irq_markeins.c | 19 ++++++++-----------
2 files changed, 10 insertions(+), 13 deletions(-)
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index c0f9d46..3577fd5 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -54,7 +54,7 @@
*/
extern void emma2rh_sw_irq_init(void);
-extern void emma2rh_gpio_irq_init(u32 base);
+extern void emma2rh_gpio_irq_init(void);
extern void emma2rh_irq_init(void);
extern void emma2rh_irq_dispatch(void);
@@ -104,7 +104,7 @@ void __init arch_init_irq(void)
/* init all controllers */
emma2rh_irq_init();
emma2rh_sw_irq_init();
- emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE);
+ emma2rh_gpio_irq_init();
mips_cpu_irq_init();
/* setup cascade interrupts */
diff --git a/arch/mips/emma/markeins/irq_markeins.c b/arch/mips/emma/markeins/irq_markeins.c
index 1883421..ea27ec5 100644
--- a/arch/mips/emma/markeins/irq_markeins.c
+++ b/arch/mips/emma/markeins/irq_markeins.c
@@ -30,8 +30,6 @@
#include <asm/debug.h>
#include <asm/emma/emma2rh.h>
-static int emma2rh_gpio_irq_base = -1;
-
void ll_emma2rh_sw_irq_enable(int reg);
void ll_emma2rh_sw_irq_disable(int reg);
void ll_emma2rh_gpio_irq_enable(int reg);
@@ -91,17 +89,17 @@ void ll_emma2rh_sw_irq_disable(int irq)
static void emma2rh_gpio_irq_enable(unsigned int irq)
{
- ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
+ ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE);
}
static void emma2rh_gpio_irq_disable(unsigned int irq)
{
- ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base);
+ ll_emma2rh_gpio_irq_disable(irq - EMMA2RH_GPIO_IRQ_BASE);
}
static void emma2rh_gpio_irq_ack(unsigned int irq)
{
- irq -= emma2rh_gpio_irq_base;
+ irq -= EMMA2RH_GPIO_IRQ_BASE;
emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
ll_emma2rh_gpio_irq_disable(irq);
}
@@ -109,7 +107,7 @@ static void emma2rh_gpio_irq_ack(unsigned int irq)
static void emma2rh_gpio_irq_end(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base);
+ ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE);
}
struct irq_chip emma2rh_gpio_irq_controller = {
@@ -121,14 +119,13 @@ struct irq_chip emma2rh_gpio_irq_controller = {
.end = emma2rh_gpio_irq_end,
};
-void emma2rh_gpio_irq_init(u32 irq_base)
+void emma2rh_gpio_irq_init(void)
{
u32 i;
- for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++)
- set_irq_chip(i, &emma2rh_gpio_irq_controller);
-
- emma2rh_gpio_irq_base = irq_base;
+ for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++)
+ set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i,
+ &emma2rh_gpio_irq_controller);
}
void ll_emma2rh_gpio_irq_enable(int irq)
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 09/12] MIPS: Fold arch/mips/emma/{common,markeins}/irq*.c into markeins/irq.c
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
` (6 preceding siblings ...)
2008-10-23 16:32 ` [PATCH 08/12] MIPS: EMMA2RH: Remove emma2rh_gpio_irq_base Shinya Kuribayashi
@ 2008-10-23 16:32 ` Shinya Kuribayashi
2008-10-23 16:33 ` [PATCH 10/12] MIPS: Markeins: Remove runtime debug prints Shinya Kuribayashi
` (4 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-23 16:32 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
Current EMMA2RH irq code is mess. Before cleaning it up, gather them
in one place as a first step.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
arch/mips/emma/common/Makefile | 2
arch/mips/emma/common/irq.c | 105 -------------
arch/mips/emma/common/irq_emma2rh.c | 103 -------------
arch/mips/emma/markeins/Makefile | 2
arch/mips/emma/markeins/irq.c | 251 +++++++++++++++++++++++++++++++-
arch/mips/emma/markeins/irq_markeins.c | 153 --------------------
6 files changed, 249 insertions(+), 367 deletions(-)
delete mode 100644 arch/mips/emma/common/irq.c
delete mode 100644 arch/mips/emma/common/irq_emma2rh.c
delete mode 100644 arch/mips/emma/markeins/irq_markeins.c
diff --git a/arch/mips/emma/common/Makefile b/arch/mips/emma/common/Makefile
index cb0fd32..c392d28 100644
--- a/arch/mips/emma/common/Makefile
+++ b/arch/mips/emma/common/Makefile
@@ -10,4 +10,4 @@
# (at your option) any later version.
#
-obj-$(CONFIG_NEC_MARKEINS) += irq.o irq_emma2rh.o prom.o
+obj-$(CONFIG_NEC_MARKEINS) += prom.o
diff --git a/arch/mips/emma/common/irq.c b/arch/mips/emma/common/irq.c
deleted file mode 100644
index 4158f80..0000000
--- a/arch/mips/emma/common/irq.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * arch/mips/emma2rh/common/irq.c
- * This file is common irq dispatcher.
- *
- * Copyright (C) NEC Electronics Corporation 2005-2006
- *
- * This file is based on the arch/mips/ddb5xxx/ddb5477/irq.c
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/types.h>
-
-#include <asm/system.h>
-#include <asm/mipsregs.h>
-#include <asm/addrspace.h>
-#include <asm/bootinfo.h>
-
-#include <asm/emma/emma2rh.h>
-
-/*
- * the first level int-handler will jump here if it is a emma2rh irq
- */
-void emma2rh_irq_dispatch(void)
-{
- u32 intStatus;
- u32 bitmask;
- u32 i;
-
- intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0)
- & emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
-
-#ifdef EMMA2RH_SW_CASCADE
- if (intStatus &
- (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
- u32 swIntStatus;
- swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
- & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
- for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
- if (swIntStatus & bitmask) {
- do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
- return;
- }
- }
- }
-#endif
-
- for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
- if (intStatus & bitmask) {
- do_IRQ(EMMA2RH_IRQ_BASE + i);
- return;
- }
- }
-
- intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1)
- & emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
-
-#ifdef EMMA2RH_GPIO_CASCADE
- if (intStatus &
- (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
- u32 gpioIntStatus;
- gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
- & emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
- for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
- if (gpioIntStatus & bitmask) {
- do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
- return;
- }
- }
- }
-#endif
-
- for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
- if (intStatus & bitmask) {
- do_IRQ(EMMA2RH_IRQ_BASE + i);
- return;
- }
- }
-
- intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2)
- & emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
-
- for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
- if (intStatus & bitmask) {
- do_IRQ(EMMA2RH_IRQ_BASE + i);
- return;
- }
- }
-}
diff --git a/arch/mips/emma/common/irq_emma2rh.c b/arch/mips/emma/common/irq_emma2rh.c
deleted file mode 100644
index 4f84fed..0000000
--- a/arch/mips/emma/common/irq_emma2rh.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * arch/mips/emma2rh/common/irq_emma2rh.c
- * This file defines the irq handler for EMMA2RH.
- *
- * Copyright (C) NEC Electronics Corporation 2005-2006
- *
- * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-/*
- * EMMA2RH defines 64 IRQs.
- *
- * This file exports one function:
- * emma2rh_irq_init(u32 irq_base);
- */
-
-#include <linux/interrupt.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-
-#include <asm/debug.h>
-
-#include <asm/emma/emma2rh.h>
-
-/* number of total irqs supported by EMMA2RH */
-#define NUM_EMMA2RH_IRQ 96
-
-void ll_emma2rh_irq_enable(int);
-void ll_emma2rh_irq_disable(int);
-
-static void emma2rh_irq_enable(unsigned int irq)
-{
- ll_emma2rh_irq_enable(irq - EMMA2RH_IRQ_BASE);
-}
-
-static void emma2rh_irq_disable(unsigned int irq)
-{
- ll_emma2rh_irq_disable(irq - EMMA2RH_IRQ_BASE);
-}
-
-struct irq_chip emma2rh_irq_controller = {
- .name = "emma2rh_irq",
- .ack = emma2rh_irq_disable,
- .mask = emma2rh_irq_disable,
- .mask_ack = emma2rh_irq_disable,
- .unmask = emma2rh_irq_enable,
-};
-
-void emma2rh_irq_init(void)
-{
- u32 i;
-
- for (i = 0; i < NUM_EMMA2RH_IRQ; i++)
- set_irq_chip_and_handler(EMMA2RH_IRQ_BASE + i,
- &emma2rh_irq_controller,
- handle_level_irq);
-}
-
-void ll_emma2rh_irq_enable(int emma2rh_irq)
-{
- u32 reg_value;
- u32 reg_bitmask;
- u32 reg_index;
-
- reg_index = EMMA2RH_BHIF_INT_EN_0
- + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
- * (emma2rh_irq / 32);
- reg_value = emma2rh_in32(reg_index);
- reg_bitmask = 0x1 << (emma2rh_irq % 32);
- db_assert((reg_value & reg_bitmask) == 0);
- emma2rh_out32(reg_index, reg_value | reg_bitmask);
-}
-
-void ll_emma2rh_irq_disable(int emma2rh_irq)
-{
- u32 reg_value;
- u32 reg_bitmask;
- u32 reg_index;
-
- reg_index = EMMA2RH_BHIF_INT_EN_0
- + (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0)
- * (emma2rh_irq / 32);
- reg_value = emma2rh_in32(reg_index);
- reg_bitmask = 0x1 << (emma2rh_irq % 32);
- db_assert((reg_value & reg_bitmask) != 0);
- emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
-}
diff --git a/arch/mips/emma/markeins/Makefile b/arch/mips/emma/markeins/Makefile
index 3c8b864..16e0017 100644
--- a/arch/mips/emma/markeins/Makefile
+++ b/arch/mips/emma/markeins/Makefile
@@ -10,4 +10,4 @@
# (at your option) any later version.
#
-obj-$(CONFIG_NEC_MARKEINS) += irq.o irq_markeins.o setup.o led.o platform.o
+obj-$(CONFIG_NEC_MARKEINS) += irq.o setup.o led.o platform.o
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index 3577fd5..ada33d8 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -38,6 +38,9 @@
#include <asm/emma/emma2rh.h>
+/* number of total irqs supported by EMMA2RH */
+#define NUM_EMMA2RH_IRQ 96
+
/*
* IRQ mapping
*
@@ -53,10 +56,180 @@
*
*/
-extern void emma2rh_sw_irq_init(void);
-extern void emma2rh_gpio_irq_init(void);
-extern void emma2rh_irq_init(void);
-extern void emma2rh_irq_dispatch(void);
+void ll_emma2rh_irq_enable(int emma2rh_irq)
+{
+ u32 reg_value;
+ u32 reg_bitmask;
+ u32 reg_index;
+
+ reg_index = EMMA2RH_BHIF_INT_EN_0 +
+ (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) *
+ (emma2rh_irq / 32);
+ reg_value = emma2rh_in32(reg_index);
+ reg_bitmask = 0x1 << (emma2rh_irq % 32);
+ db_assert((reg_value & reg_bitmask) == 0);
+ emma2rh_out32(reg_index, reg_value | reg_bitmask);
+}
+
+void ll_emma2rh_irq_disable(int emma2rh_irq)
+{
+ u32 reg_value;
+ u32 reg_bitmask;
+ u32 reg_index;
+
+ reg_index = EMMA2RH_BHIF_INT_EN_0 +
+ (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) *
+ (emma2rh_irq / 32);
+ reg_value = emma2rh_in32(reg_index);
+ reg_bitmask = 0x1 << (emma2rh_irq % 32);
+ db_assert((reg_value & reg_bitmask) != 0);
+ emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
+}
+
+static void emma2rh_irq_enable(unsigned int irq)
+{
+ ll_emma2rh_irq_enable(irq - EMMA2RH_IRQ_BASE);
+}
+
+static void emma2rh_irq_disable(unsigned int irq)
+{
+ ll_emma2rh_irq_disable(irq - EMMA2RH_IRQ_BASE);
+}
+
+struct irq_chip emma2rh_irq_controller = {
+ .name = "emma2rh_irq",
+ .ack = emma2rh_irq_disable,
+ .mask = emma2rh_irq_disable,
+ .mask_ack = emma2rh_irq_disable,
+ .unmask = emma2rh_irq_enable,
+};
+
+void emma2rh_irq_init(void)
+{
+ u32 i;
+
+ for (i = 0; i < NUM_EMMA2RH_IRQ; i++)
+ set_irq_chip_and_handler(EMMA2RH_IRQ_BASE + i,
+ &emma2rh_irq_controller,
+ handle_level_irq);
+}
+
+void ll_emma2rh_sw_irq_enable(int irq)
+{
+ u32 reg;
+
+ db_assert(irq >= 0);
+ db_assert(irq < NUM_EMMA2RH_IRQ_SW);
+
+ reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
+ reg |= 1 << irq;
+ emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
+}
+
+void ll_emma2rh_sw_irq_disable(int irq)
+{
+ u32 reg;
+
+ db_assert(irq >= 0);
+ db_assert(irq < 32);
+
+ reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
+ reg &= ~(1 << irq);
+ emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
+}
+
+static void emma2rh_sw_irq_enable(unsigned int irq)
+{
+ ll_emma2rh_sw_irq_enable(irq - EMMA2RH_SW_IRQ_BASE);
+}
+
+static void emma2rh_sw_irq_disable(unsigned int irq)
+{
+ ll_emma2rh_sw_irq_disable(irq - EMMA2RH_SW_IRQ_BASE);
+}
+
+struct irq_chip emma2rh_sw_irq_controller = {
+ .name = "emma2rh_sw_irq",
+ .ack = emma2rh_sw_irq_disable,
+ .mask = emma2rh_sw_irq_disable,
+ .mask_ack = emma2rh_sw_irq_disable,
+ .unmask = emma2rh_sw_irq_enable,
+};
+
+void emma2rh_sw_irq_init(void)
+{
+ u32 i;
+
+ for (i = 0; i < NUM_EMMA2RH_IRQ_SW; i++)
+ set_irq_chip_and_handler(EMMA2RH_SW_IRQ_BASE + i,
+ &emma2rh_sw_irq_controller,
+ handle_level_irq);
+}
+
+void ll_emma2rh_gpio_irq_enable(int irq)
+{
+ u32 reg;
+
+ db_assert(irq >= 0);
+ db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
+
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ reg |= 1 << irq;
+ emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
+}
+
+void ll_emma2rh_gpio_irq_disable(int irq)
+{
+ u32 reg;
+
+ db_assert(irq >= 0);
+ db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
+
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ reg &= ~(1 << irq);
+ emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
+}
+
+static void emma2rh_gpio_irq_enable(unsigned int irq)
+{
+ ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE);
+}
+
+static void emma2rh_gpio_irq_disable(unsigned int irq)
+{
+ ll_emma2rh_gpio_irq_disable(irq - EMMA2RH_GPIO_IRQ_BASE);
+}
+
+static void emma2rh_gpio_irq_ack(unsigned int irq)
+{
+ irq -= EMMA2RH_GPIO_IRQ_BASE;
+ emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
+ ll_emma2rh_gpio_irq_disable(irq);
+}
+
+static void emma2rh_gpio_irq_end(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE);
+}
+
+struct irq_chip emma2rh_gpio_irq_controller = {
+ .name = "emma2rh_gpio_irq",
+ .ack = emma2rh_gpio_irq_ack,
+ .mask = emma2rh_gpio_irq_disable,
+ .mask_ack = emma2rh_gpio_irq_ack,
+ .unmask = emma2rh_gpio_irq_enable,
+ .end = emma2rh_gpio_irq_end,
+};
+
+void emma2rh_gpio_irq_init(void)
+{
+ u32 i;
+
+ for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++)
+ set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i,
+ &emma2rh_gpio_irq_controller);
+}
static struct irqaction irq_cascade = {
.handler = no_action,
@@ -67,6 +240,76 @@ static struct irqaction irq_cascade = {
.next = NULL,
};
+/*
+ * the first level int-handler will jump here if it is a emma2rh irq
+ */
+void emma2rh_irq_dispatch(void)
+{
+ u32 intStatus;
+ u32 bitmask;
+ u32 i;
+
+ intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_0) &
+ emma2rh_in32(EMMA2RH_BHIF_INT_EN_0);
+
+#ifdef EMMA2RH_SW_CASCADE
+ if (intStatus &
+ (1 << ((EMMA2RH_SW_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
+ u32 swIntStatus;
+ swIntStatus = emma2rh_in32(EMMA2RH_BHIF_SW_INT)
+ & emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
+ for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
+ if (swIntStatus & bitmask) {
+ do_IRQ(EMMA2RH_SW_IRQ_BASE + i);
+ return;
+ }
+ }
+ }
+#endif
+
+ for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
+ if (intStatus & bitmask) {
+ do_IRQ(EMMA2RH_IRQ_BASE + i);
+ return;
+ }
+ }
+
+ intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_1) &
+ emma2rh_in32(EMMA2RH_BHIF_INT_EN_1);
+
+#ifdef EMMA2RH_GPIO_CASCADE
+ if (intStatus &
+ (1 << ((EMMA2RH_GPIO_CASCADE - EMMA2RH_IRQ_INT0) & (32 - 1)))) {
+ u32 gpioIntStatus;
+ gpioIntStatus = emma2rh_in32(EMMA2RH_GPIO_INT_ST)
+ & emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ for (i = 0, bitmask = 1; i < 32; i++, bitmask <<= 1) {
+ if (gpioIntStatus & bitmask) {
+ do_IRQ(EMMA2RH_GPIO_IRQ_BASE + i);
+ return;
+ }
+ }
+ }
+#endif
+
+ for (i = 32, bitmask = 1; i < 64; i++, bitmask <<= 1) {
+ if (intStatus & bitmask) {
+ do_IRQ(EMMA2RH_IRQ_BASE + i);
+ return;
+ }
+ }
+
+ intStatus = emma2rh_in32(EMMA2RH_BHIF_INT_ST_2) &
+ emma2rh_in32(EMMA2RH_BHIF_INT_EN_2);
+
+ for (i = 64, bitmask = 1; i < 96; i++, bitmask <<= 1) {
+ if (intStatus & bitmask) {
+ do_IRQ(EMMA2RH_IRQ_BASE + i);
+ return;
+ }
+ }
+}
+
void __init arch_init_irq(void)
{
u32 reg;
diff --git a/arch/mips/emma/markeins/irq_markeins.c b/arch/mips/emma/markeins/irq_markeins.c
deleted file mode 100644
index ea27ec5..0000000
--- a/arch/mips/emma/markeins/irq_markeins.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * arch/mips/emma2rh/markeins/irq_markeins.c
- * This file defines the irq handler for Mark-eins.
- *
- * Copyright (C) NEC Electronics Corporation 2004-2006
- *
- * This file is based on the arch/mips/ddb5xxx/ddb5477/irq_5477.c
- *
- * Copyright 2001 MontaVista Software Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-
-#include <asm/debug.h>
-#include <asm/emma/emma2rh.h>
-
-void ll_emma2rh_sw_irq_enable(int reg);
-void ll_emma2rh_sw_irq_disable(int reg);
-void ll_emma2rh_gpio_irq_enable(int reg);
-void ll_emma2rh_gpio_irq_disable(int reg);
-
-static void emma2rh_sw_irq_enable(unsigned int irq)
-{
- ll_emma2rh_sw_irq_enable(irq - EMMA2RH_SW_IRQ_BASE);
-}
-
-static void emma2rh_sw_irq_disable(unsigned int irq)
-{
- ll_emma2rh_sw_irq_disable(irq - EMMA2RH_SW_IRQ_BASE);
-}
-
-struct irq_chip emma2rh_sw_irq_controller = {
- .name = "emma2rh_sw_irq",
- .ack = emma2rh_sw_irq_disable,
- .mask = emma2rh_sw_irq_disable,
- .mask_ack = emma2rh_sw_irq_disable,
- .unmask = emma2rh_sw_irq_enable,
-};
-
-void emma2rh_sw_irq_init(void)
-{
- u32 i;
-
- for (i = 0; i < NUM_EMMA2RH_IRQ_SW; i++)
- set_irq_chip_and_handler(EMMA2RH_SW_IRQ_BASE + i,
- &emma2rh_sw_irq_controller,
- handle_level_irq);
-}
-
-void ll_emma2rh_sw_irq_enable(int irq)
-{
- u32 reg;
-
- db_assert(irq >= 0);
- db_assert(irq < NUM_EMMA2RH_IRQ_SW);
-
- reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
- reg |= 1 << irq;
- emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
-}
-
-void ll_emma2rh_sw_irq_disable(int irq)
-{
- u32 reg;
-
- db_assert(irq >= 0);
- db_assert(irq < 32);
-
- reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
- reg &= ~(1 << irq);
- emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
-}
-
-static void emma2rh_gpio_irq_enable(unsigned int irq)
-{
- ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE);
-}
-
-static void emma2rh_gpio_irq_disable(unsigned int irq)
-{
- ll_emma2rh_gpio_irq_disable(irq - EMMA2RH_GPIO_IRQ_BASE);
-}
-
-static void emma2rh_gpio_irq_ack(unsigned int irq)
-{
- irq -= EMMA2RH_GPIO_IRQ_BASE;
- emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
- ll_emma2rh_gpio_irq_disable(irq);
-}
-
-static void emma2rh_gpio_irq_end(unsigned int irq)
-{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE);
-}
-
-struct irq_chip emma2rh_gpio_irq_controller = {
- .name = "emma2rh_gpio_irq",
- .ack = emma2rh_gpio_irq_ack,
- .mask = emma2rh_gpio_irq_disable,
- .mask_ack = emma2rh_gpio_irq_ack,
- .unmask = emma2rh_gpio_irq_enable,
- .end = emma2rh_gpio_irq_end,
-};
-
-void emma2rh_gpio_irq_init(void)
-{
- u32 i;
-
- for (i = 0; i < NUM_EMMA2RH_IRQ_GPIO; i++)
- set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i,
- &emma2rh_gpio_irq_controller);
-}
-
-void ll_emma2rh_gpio_irq_enable(int irq)
-{
- u32 reg;
-
- db_assert(irq >= 0);
- db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
-
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
- reg |= 1 << irq;
- emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
-}
-
-void ll_emma2rh_gpio_irq_disable(int irq)
-{
- u32 reg;
-
- db_assert(irq >= 0);
- db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
-
- reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
- reg &= ~(1 << irq);
- emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
-}
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 10/12] MIPS: Markeins: Remove runtime debug prints
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
` (7 preceding siblings ...)
2008-10-23 16:32 ` [PATCH 09/12] MIPS: Fold arch/mips/emma/{common,markeins}/irq*.c into markeins/irq.c Shinya Kuribayashi
@ 2008-10-23 16:33 ` Shinya Kuribayashi
2008-10-23 16:35 ` [PATCH 11/12] MIPS: Markeins: Extract ll_emma2rh_* functions Shinya Kuribayashi
` (3 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-23 16:33 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
Remove runtime db_* macros as we don't need them any more. In general,
such helpers are useful for initial porting, but once approved, they are
not indispensable.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
arch/mips/emma/markeins/irq.c | 17 -----------------
1 files changed, 0 insertions(+), 17 deletions(-)
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index ada33d8..03a663a 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -32,7 +32,6 @@
#include <asm/irq_cpu.h>
#include <asm/system.h>
#include <asm/mipsregs.h>
-#include <asm/debug.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
@@ -67,7 +66,6 @@ void ll_emma2rh_irq_enable(int emma2rh_irq)
(emma2rh_irq / 32);
reg_value = emma2rh_in32(reg_index);
reg_bitmask = 0x1 << (emma2rh_irq % 32);
- db_assert((reg_value & reg_bitmask) == 0);
emma2rh_out32(reg_index, reg_value | reg_bitmask);
}
@@ -82,7 +80,6 @@ void ll_emma2rh_irq_disable(int emma2rh_irq)
(emma2rh_irq / 32);
reg_value = emma2rh_in32(reg_index);
reg_bitmask = 0x1 << (emma2rh_irq % 32);
- db_assert((reg_value & reg_bitmask) != 0);
emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
}
@@ -118,9 +115,6 @@ void ll_emma2rh_sw_irq_enable(int irq)
{
u32 reg;
- db_assert(irq >= 0);
- db_assert(irq < NUM_EMMA2RH_IRQ_SW);
-
reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
reg |= 1 << irq;
emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
@@ -130,9 +124,6 @@ void ll_emma2rh_sw_irq_disable(int irq)
{
u32 reg;
- db_assert(irq >= 0);
- db_assert(irq < 32);
-
reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
reg &= ~(1 << irq);
emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
@@ -170,9 +161,6 @@ void ll_emma2rh_gpio_irq_enable(int irq)
{
u32 reg;
- db_assert(irq >= 0);
- db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
-
reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
reg |= 1 << irq;
emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
@@ -182,9 +170,6 @@ void ll_emma2rh_gpio_irq_disable(int irq)
{
u32 reg;
- db_assert(irq >= 0);
- db_assert(irq < NUM_EMMA2RH_IRQ_GPIO);
-
reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
reg &= ~(1 << irq);
emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
@@ -314,8 +299,6 @@ void __init arch_init_irq(void)
{
u32 reg;
- db_run(printk("markeins_irq_setup invoked.\n"));
-
/* by default, interrupts are disabled. */
emma2rh_out32(EMMA2RH_BHIF_INT_EN_0, 0);
emma2rh_out32(EMMA2RH_BHIF_INT_EN_1, 0);
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 11/12] MIPS: Markeins: Extract ll_emma2rh_* functions
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
` (8 preceding siblings ...)
2008-10-23 16:33 ` [PATCH 10/12] MIPS: Markeins: Remove runtime debug prints Shinya Kuribayashi
@ 2008-10-23 16:35 ` Shinya Kuribayashi
2008-10-23 16:36 ` [PATCH 12/12] MIPS: Markeins: Remove unnecessary define and cleanup comments, etc Shinya Kuribayashi
` (2 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-23 16:35 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
These functions are completely ineffective.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
Oops, there are more patches upto 12. The first [PATCH 00/10] is typo.
arch/mips/emma/markeins/irq.c | 83 +++++++++++++++++++----------------------
1 files changed, 38 insertions(+), 45 deletions(-)
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index 03a663a..9d6c866 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -55,44 +55,36 @@
*
*/
-void ll_emma2rh_irq_enable(int emma2rh_irq)
+static void emma2rh_irq_enable(unsigned int irq)
{
u32 reg_value;
u32 reg_bitmask;
u32 reg_index;
+ irq -= EMMA2RH_IRQ_BASE;
+
reg_index = EMMA2RH_BHIF_INT_EN_0 +
- (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) *
- (emma2rh_irq / 32);
+ (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32);
reg_value = emma2rh_in32(reg_index);
- reg_bitmask = 0x1 << (emma2rh_irq % 32);
+ reg_bitmask = 0x1 << (irq % 32);
emma2rh_out32(reg_index, reg_value | reg_bitmask);
}
-void ll_emma2rh_irq_disable(int emma2rh_irq)
+static void emma2rh_irq_disable(unsigned int irq)
{
u32 reg_value;
u32 reg_bitmask;
u32 reg_index;
+ irq -= EMMA2RH_IRQ_BASE;
+
reg_index = EMMA2RH_BHIF_INT_EN_0 +
- (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) *
- (emma2rh_irq / 32);
+ (EMMA2RH_BHIF_INT_EN_1 - EMMA2RH_BHIF_INT_EN_0) * (irq / 32);
reg_value = emma2rh_in32(reg_index);
- reg_bitmask = 0x1 << (emma2rh_irq % 32);
+ reg_bitmask = 0x1 << (irq % 32);
emma2rh_out32(reg_index, reg_value & ~reg_bitmask);
}
-static void emma2rh_irq_enable(unsigned int irq)
-{
- ll_emma2rh_irq_enable(irq - EMMA2RH_IRQ_BASE);
-}
-
-static void emma2rh_irq_disable(unsigned int irq)
-{
- ll_emma2rh_irq_disable(irq - EMMA2RH_IRQ_BASE);
-}
-
struct irq_chip emma2rh_irq_controller = {
.name = "emma2rh_irq",
.ack = emma2rh_irq_disable,
@@ -111,34 +103,28 @@ void emma2rh_irq_init(void)
handle_level_irq);
}
-void ll_emma2rh_sw_irq_enable(int irq)
+static void emma2rh_sw_irq_enable(unsigned int irq)
{
u32 reg;
+ irq -= EMMA2RH_SW_IRQ_BASE;
+
reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
reg |= 1 << irq;
emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
}
-void ll_emma2rh_sw_irq_disable(int irq)
+static void emma2rh_sw_irq_disable(unsigned int irq)
{
u32 reg;
+ irq -= EMMA2RH_SW_IRQ_BASE;
+
reg = emma2rh_in32(EMMA2RH_BHIF_SW_INT_EN);
reg &= ~(1 << irq);
emma2rh_out32(EMMA2RH_BHIF_SW_INT_EN, reg);
}
-static void emma2rh_sw_irq_enable(unsigned int irq)
-{
- ll_emma2rh_sw_irq_enable(irq - EMMA2RH_SW_IRQ_BASE);
-}
-
-static void emma2rh_sw_irq_disable(unsigned int irq)
-{
- ll_emma2rh_sw_irq_disable(irq - EMMA2RH_SW_IRQ_BASE);
-}
-
struct irq_chip emma2rh_sw_irq_controller = {
.name = "emma2rh_sw_irq",
.ack = emma2rh_sw_irq_disable,
@@ -157,45 +143,52 @@ void emma2rh_sw_irq_init(void)
handle_level_irq);
}
-void ll_emma2rh_gpio_irq_enable(int irq)
+static void emma2rh_gpio_irq_enable(unsigned int irq)
{
u32 reg;
+ irq -= EMMA2RH_GPIO_IRQ_BASE;
+
reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
reg |= 1 << irq;
emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
-void ll_emma2rh_gpio_irq_disable(int irq)
+static void emma2rh_gpio_irq_disable(unsigned int irq)
{
u32 reg;
+ irq -= EMMA2RH_GPIO_IRQ_BASE;
+
reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
reg &= ~(1 << irq);
emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
-static void emma2rh_gpio_irq_enable(unsigned int irq)
-{
- ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE);
-}
-
-static void emma2rh_gpio_irq_disable(unsigned int irq)
-{
- ll_emma2rh_gpio_irq_disable(irq - EMMA2RH_GPIO_IRQ_BASE);
-}
-
static void emma2rh_gpio_irq_ack(unsigned int irq)
{
+ u32 reg;
+
irq -= EMMA2RH_GPIO_IRQ_BASE;
emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
- ll_emma2rh_gpio_irq_disable(irq);
+
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ reg &= ~(1 << irq);
+ emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
}
static void emma2rh_gpio_irq_end(unsigned int irq)
{
- if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
- ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE);
+ u32 reg;
+
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
+
+ irq -= EMMA2RH_GPIO_IRQ_BASE;
+
+ reg = emma2rh_in32(EMMA2RH_GPIO_INT_MASK);
+ reg |= 1 << irq;
+ emma2rh_out32(EMMA2RH_GPIO_INT_MASK, reg);
+ }
}
struct irq_chip emma2rh_gpio_irq_controller = {
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [PATCH 12/12] MIPS: Markeins: Remove unnecessary define and cleanup comments, etc.
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
` (9 preceding siblings ...)
2008-10-23 16:35 ` [PATCH 11/12] MIPS: Markeins: Extract ll_emma2rh_* functions Shinya Kuribayashi
@ 2008-10-23 16:36 ` Shinya Kuribayashi
2008-10-23 21:00 ` [PATCH 02/12] MIPS: EMMA Kconfig reorganization Shinya Kuribayashi
2008-10-27 10:47 ` [PATCH 00/10] Restructure EMMA2RH port Ralf Baechle
12 siblings, 0 replies; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-23 16:36 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
arch/mips/emma/markeins/irq.c | 20 --------------------
1 files changed, 0 insertions(+), 20 deletions(-)
diff --git a/arch/mips/emma/markeins/irq.c b/arch/mips/emma/markeins/irq.c
index 9d6c866..c2583ec 100644
--- a/arch/mips/emma/markeins/irq.c
+++ b/arch/mips/emma/markeins/irq.c
@@ -37,24 +37,6 @@
#include <asm/emma/emma2rh.h>
-/* number of total irqs supported by EMMA2RH */
-#define NUM_EMMA2RH_IRQ 96
-
-/*
- * IRQ mapping
- *
- * 0-7: 8 CPU interrupts
- * 0 - software interrupt 0
- * 1 - software interrupt 1
- * 2 - most Vrc5477 interrupts are routed to this pin
- * 3 - (optional) some other interrupts routed to this pin for debugg
- * 4 - not used
- * 5 - not used
- * 6 - not used
- * 7 - cpu timer (used by default)
- *
- */
-
static void emma2rh_irq_enable(unsigned int irq)
{
u32 reg_value;
@@ -347,5 +329,3 @@ asmlinkage void plat_irq_dispatch(void)
else
spurious_interrupt();
}
-
-
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH 08/12] MIPS: EMMA2RH: Remove emma2rh_gpio_irq_base
2008-10-23 16:32 ` [PATCH 08/12] MIPS: EMMA2RH: Remove emma2rh_gpio_irq_base Shinya Kuribayashi
@ 2008-10-23 17:20 ` Markus Gothe
0 siblings, 0 replies; 19+ messages in thread
From: Markus Gothe @ 2008-10-23 17:20 UTC (permalink / raw)
To: Shinya Kuribayashi; +Cc: linux-mips, shinya.kuribayashi
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256
Reminds me of the I2C driver for EMMA2RH that MontaVista posted, I
ought to take the time to shape it up...
//Markus
Shinya Kuribayashi wrote:
> Let's use immediate value, instead. This also saves memory
> footprint, and probably a little bit faster.
>
> Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
> --- arch/mips/emma/markeins/irq.c | 4 ++--
> arch/mips/emma/markeins/irq_markeins.c | 19 ++++++++----------- 2
> files changed, 10 insertions(+), 13 deletions(-)
>
> diff --git a/arch/mips/emma/markeins/irq.c
> b/arch/mips/emma/markeins/irq.c index c0f9d46..3577fd5 100644 ---
> a/arch/mips/emma/markeins/irq.c +++ b/arch/mips/emma/markeins/irq.c
> @@ -54,7 +54,7 @@ */
>
> extern void emma2rh_sw_irq_init(void); -extern void
> emma2rh_gpio_irq_init(u32 base); +extern void
> emma2rh_gpio_irq_init(void); extern void emma2rh_irq_init(void);
> extern void emma2rh_irq_dispatch(void);
>
> @@ -104,7 +104,7 @@ void __init arch_init_irq(void) /* init all
> controllers */ emma2rh_irq_init(); emma2rh_sw_irq_init(); -
> emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE); +
> emma2rh_gpio_irq_init(); mips_cpu_irq_init();
>
> /* setup cascade interrupts */ diff --git
> a/arch/mips/emma/markeins/irq_markeins.c
> b/arch/mips/emma/markeins/irq_markeins.c index 1883421..ea27ec5
> 100644 --- a/arch/mips/emma/markeins/irq_markeins.c +++
> b/arch/mips/emma/markeins/irq_markeins.c @@ -30,8 +30,6 @@ #include
> <asm/debug.h> #include <asm/emma/emma2rh.h>
>
> -static int emma2rh_gpio_irq_base = -1; - void
> ll_emma2rh_sw_irq_enable(int reg); void
> ll_emma2rh_sw_irq_disable(int reg); void
> ll_emma2rh_gpio_irq_enable(int reg); @@ -91,17 +89,17 @@ void
> ll_emma2rh_sw_irq_disable(int irq)
>
> static void emma2rh_gpio_irq_enable(unsigned int irq) { -
> ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base); +
> ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE); }
>
> static void emma2rh_gpio_irq_disable(unsigned int irq) { -
> ll_emma2rh_gpio_irq_disable(irq - emma2rh_gpio_irq_base); +
> ll_emma2rh_gpio_irq_disable(irq - EMMA2RH_GPIO_IRQ_BASE); }
>
> static void emma2rh_gpio_irq_ack(unsigned int irq) { - irq -=
> emma2rh_gpio_irq_base; + irq -= EMMA2RH_GPIO_IRQ_BASE;
> emma2rh_out32(EMMA2RH_GPIO_INT_ST, ~(1 << irq));
> ll_emma2rh_gpio_irq_disable(irq); } @@ -109,7 +107,7 @@ static void
> emma2rh_gpio_irq_ack(unsigned int irq) static void
> emma2rh_gpio_irq_end(unsigned int irq) { if (!(irq_desc[irq].status
> & (IRQ_DISABLED | IRQ_INPROGRESS))) -
> ll_emma2rh_gpio_irq_enable(irq - emma2rh_gpio_irq_base); +
> ll_emma2rh_gpio_irq_enable(irq - EMMA2RH_GPIO_IRQ_BASE); }
>
> struct irq_chip emma2rh_gpio_irq_controller = { @@ -121,14 +119,13
> @@ struct irq_chip emma2rh_gpio_irq_controller = { .end =
> emma2rh_gpio_irq_end, };
>
> -void emma2rh_gpio_irq_init(u32 irq_base) +void
> emma2rh_gpio_irq_init(void) { u32 i;
>
> - for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_GPIO; i++) -
> set_irq_chip(i, &emma2rh_gpio_irq_controller); - -
> emma2rh_gpio_irq_base = irq_base; + for (i = 0; i <
> NUM_EMMA2RH_IRQ_GPIO; i++) +
> set_irq_chip(EMMA2RH_GPIO_IRQ_BASE + i, +
> &emma2rh_gpio_irq_controller); }
>
> void ll_emma2rh_gpio_irq_enable(int irq)
>
- --
_______________________________________
Mr Markus Gothe
Software Engineer
Phone: +46 (0)13 21 81 20 (ext. 1046)
Fax: +46 (0)13 21 21 15
Mobile: +46 (0)70 348 44 35
Diskettgatan 11, SE-583 35 Linköping, Sweden
www.27m.com
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^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 02/12] MIPS: EMMA Kconfig reorganization
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
` (10 preceding siblings ...)
2008-10-23 16:36 ` [PATCH 12/12] MIPS: Markeins: Remove unnecessary define and cleanup comments, etc Shinya Kuribayashi
@ 2008-10-23 21:00 ` Shinya Kuribayashi
2008-10-27 10:47 ` [PATCH 00/10] Restructure EMMA2RH port Ralf Baechle
12 siblings, 0 replies; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-23 21:00 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
- Move EMMA related stuff into arch/mips/emma/Kconfig
- Create CONFIG_SOC_EMMA* to handle more EMMA SoCs effectively
- Rename CONFIG_MARKEINS into CONFIG_NEC_MARKEINS
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
[02/12] does not seem to be properly transfered. Here it is.
arch/mips/Kconfig | 17 +++--------------
arch/mips/Makefile | 11 +++++++----
arch/mips/emma/Kconfig | 29 +++++++++++++++++++++++++++++
arch/mips/emma2rh/common/Makefile | 2 +-
arch/mips/emma2rh/common/prom.c | 4 ++--
arch/mips/emma2rh/markeins/Makefile | 2 +-
arch/mips/include/asm/emma2rh/emma2rh.h | 2 +-
arch/mips/pci/Makefile | 2 +-
8 files changed, 45 insertions(+), 24 deletions(-)
create mode 100644 arch/mips/emma/Kconfig
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index e6ad125..7c638a7 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -238,20 +238,8 @@ config MIPS_SIM
This option enables support for MIPS Technologies MIPSsim software
emulator.
-config MARKEINS
- bool "NEC EMMA2RH Mark-eins"
- select CEVT_R4K
- select CSRC_R4K
- select DMA_NONCOHERENT
- select HW_HAS_PCI
- select IRQ_CPU
- select SWAP_IO_SPACE
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_LITTLE_ENDIAN
- select SYS_HAS_CPU_R5500
- help
- This enables support for the NEC Mark-eins board with VR5500 CPU.
+config MACH_EMMA
+ bool "NEC EMMA series based machines"
config MACH_VR41XX
bool "NEC VR4100 series based machines"
@@ -600,6 +588,7 @@ endchoice
source "arch/mips/alchemy/Kconfig"
source "arch/mips/basler/excite/Kconfig"
+source "arch/mips/emma/Kconfig"
source "arch/mips/jazz/Kconfig"
source "arch/mips/lasat/Kconfig"
source "arch/mips/pmc-sierra/Kconfig"
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index c2197c3..a1d1f77 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -401,14 +401,17 @@ load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000
libs-$(CONFIG_PNX8550_STB810) += arch/mips/nxp/pnx8550/stb810/
load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000
+#
# NEC EMMA2RH boards
#
-core-$(CONFIG_EMMA2RH) += arch/mips/emma2rh/common/
-cflags-$(CONFIG_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
+core-$(CONFIG_SOC_EMMA2RH) += arch/mips/emma2rh/common/
+cflags-$(CONFIG_SOC_EMMA2RH) += -I$(srctree)/arch/mips/include/asm/mach-emma2rh
+#
# NEC EMMA2RH Mark-eins
-core-$(CONFIG_MARKEINS) += arch/mips/emma2rh/markeins/
-load-$(CONFIG_MARKEINS) += 0xffffffff88100000
+#
+core-$(CONFIG_NEC_MARKEINS) += arch/mips/emma2rh/markeins/
+load-$(CONFIG_NEC_MARKEINS) += 0xffffffff88100000
#
# SGI IP22 (Indy/Indigo2)
diff --git a/arch/mips/emma/Kconfig b/arch/mips/emma/Kconfig
new file mode 100644
index 0000000..9669c72
--- /dev/null
+++ b/arch/mips/emma/Kconfig
@@ -0,0 +1,29 @@
+choice
+ prompt "Machine type"
+ depends on MACH_EMMA
+ default NEC_MARKEINS
+
+config NEC_MARKEINS
+ bool "NEC EMMA2RH Mark-eins board"
+ select SOC_EMMA2RH
+ select HW_HAS_PCI
+ help
+ This enables support for the NEC Electronics Mark-eins boards.
+
+endchoice
+
+config SOC_EMMA2RH
+ bool
+ select SOC_EMMA
+ select SYS_HAS_CPU_R5500
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_64BIT_KERNEL
+
+config SOC_EMMA
+ bool
+ select CEVT_R4K
+ select CSRC_R4K
+ select DMA_NONCOHERENT
+ select IRQ_CPU
+ select SWAP_IO_SPACE
+ select SYS_SUPPORTS_BIG_ENDIAN
diff --git a/arch/mips/emma2rh/common/Makefile b/arch/mips/emma2rh/common/Makefile
index 859121b..cb0fd32 100644
--- a/arch/mips/emma2rh/common/Makefile
+++ b/arch/mips/emma2rh/common/Makefile
@@ -10,4 +10,4 @@
# (at your option) any later version.
#
-obj-$(CONFIG_MARKEINS) += irq.o irq_emma2rh.o prom.o
+obj-$(CONFIG_NEC_MARKEINS) += irq.o irq_emma2rh.o prom.o
diff --git a/arch/mips/emma2rh/common/prom.c b/arch/mips/emma2rh/common/prom.c
index e14a2e3..97bf29e 100644
--- a/arch/mips/emma2rh/common/prom.c
+++ b/arch/mips/emma2rh/common/prom.c
@@ -33,7 +33,7 @@
const char *get_system_type(void)
{
-#if defined(CONFIG_MARKEINS)
+#ifdef CONFIG_NEC_MARKEINS
return "NEC EMMA2RH Mark-eins";
#else
#error Unknown NEC board
@@ -60,7 +60,7 @@ void __init prom_init(void)
strcat(arcs_cmdline, " ");
}
-#if defined(CONFIG_MARKEINS)
+#ifdef CONFIG_NEC_MARKEINS
add_memory_region(0, EMMA2RH_RAM_SIZE, BOOT_MEM_RAM);
#else
#error Unknown NEC board
diff --git a/arch/mips/emma2rh/markeins/Makefile b/arch/mips/emma2rh/markeins/Makefile
index 14fc268..3c8b864 100644
--- a/arch/mips/emma2rh/markeins/Makefile
+++ b/arch/mips/emma2rh/markeins/Makefile
@@ -10,4 +10,4 @@
# (at your option) any later version.
#
-obj-$(CONFIG_MARKEINS) += irq.o irq_markeins.o setup.o led.o platform.o
+obj-$(CONFIG_NEC_MARKEINS) += irq.o irq_markeins.o setup.o led.o platform.o
diff --git a/arch/mips/include/asm/emma2rh/emma2rh.h b/arch/mips/include/asm/emma2rh/emma2rh.h
index 6a1af0a..5d79669 100644
--- a/arch/mips/include/asm/emma2rh/emma2rh.h
+++ b/arch/mips/include/asm/emma2rh/emma2rh.h
@@ -324,7 +324,7 @@ static inline u8 emma2rh_in8(u32 offset)
/*
* include the board dependent part
*/
-#if defined(CONFIG_MARKEINS)
+#ifdef CONFIG_NEC_MARKEINS
#include <asm/emma2rh/markeins.h>
#else
#error "Unknown EMMA2RH board!"
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index b188624..e8a97f5 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_MIPS_MSC) += ops-msc.o
obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
obj-$(CONFIG_SOC_TX3927) += ops-tx3927.o
obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
-obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
+obj-$(CONFIG_NEC_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o
obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH 00/10] Restructure EMMA2RH port
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
` (11 preceding siblings ...)
2008-10-23 21:00 ` [PATCH 02/12] MIPS: EMMA Kconfig reorganization Shinya Kuribayashi
@ 2008-10-27 10:47 ` Ralf Baechle
2008-10-27 11:05 ` Shinya Kuribayashi
12 siblings, 1 reply; 19+ messages in thread
From: Ralf Baechle @ 2008-10-27 10:47 UTC (permalink / raw)
To: Shinya Kuribayashi; +Cc: linux-mips, shinya.kuribayashi
On Fri, Oct 24, 2008 at 01:23:44AM +0900, Shinya Kuribayashi wrote:
Shinya-San,
> there have been many NEC EMMA SoCs so far, and with great pleasure we
> have many Linux ports running on EMMA these days. Even though most
> those ports are not submitted to upstream, but I'd like to reorganize
> current EMMA2RH ports into more easy maintainable shape as a reference.
And I hope more of the code for the reference platforms to be submitted
in the future!
> There are a lot of things to do. For the first step, I'd like to
> introduce arch/mips/emma/ and include/asm/emma/ directories so that all
> EMMA related sourches/headers can be easily shared across various EMMA
> products/ports.
>
> Here's the first attempt to try to change things as mentioned above.
> Some possible improvements and cleanups are also included. Patches will
> follow, please review. Any comments are highly appreciated.
Full series applied.
> P.S. I'm also planning to do more cleanups around IRQ codes, register
> definition style, and so on. But that'll be some other time.
Whenever you're ready!
Thanks,
Ralf
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 00/10] Restructure EMMA2RH port
2008-10-27 10:47 ` [PATCH 00/10] Restructure EMMA2RH port Ralf Baechle
@ 2008-10-27 11:05 ` Shinya Kuribayashi
2008-10-27 14:50 ` Ralf Baechle
0 siblings, 1 reply; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-27 11:05 UTC (permalink / raw)
To: Ralf Baechle; +Cc: Shinya Kuribayashi, linux-mips
Ralf Baechle wrote:
> And I hope more of the code for the reference platforms to be submitted
> in the future!
Yeah, worth talking with my colleagues.
>> There are a lot of things to do. For the first step, I'd like to
>> introduce arch/mips/emma/ and include/asm/emma/ directories so that all
>> EMMA related sourches/headers can be easily shared across various EMMA
>> products/ports.
>>
>> Here's the first attempt to try to change things as mentioned above.
>> Some possible improvements and cleanups are also included. Patches will
>> follow, please review. Any comments are highly appreciated.
>
> Full series applied.
I forgot to modify the <asm/emma2rh.h> references from arch/mips/pci/
{ops,pci,fixup}-emma2rh.c sources. I'll send delta patch soon, please
fold it to previous one.
Anyway, thanks a lot!
--
Shinya Kuribayashi
NEC Electronics
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [PATCH 00/10] Restructure EMMA2RH port
2008-10-27 11:05 ` Shinya Kuribayashi
@ 2008-10-27 14:50 ` Ralf Baechle
0 siblings, 0 replies; 19+ messages in thread
From: Ralf Baechle @ 2008-10-27 14:50 UTC (permalink / raw)
To: Shinya Kuribayashi; +Cc: Shinya Kuribayashi, linux-mips
On Mon, Oct 27, 2008 at 08:05:30PM +0900, Shinya Kuribayashi wrote:
> Ralf Baechle wrote:
> > And I hope more of the code for the reference platforms to be submitted
> > in the future!
>
> Yeah, worth talking with my colleagues.
There are plenty of good arguments:
o Users have direct access to uptodate code through the canical sources
such as kernel.org and all the distributions based on that code. That
is they can chose what they want and are not tied to a product of NEC's
blessing.
o NEC's cost of development and maintenance will go down.
o A a contributors both NEC as a company and the individuals contributing
code will gain a positive image.
> >> follow, please review. Any comments are highly appreciated.
> >
> > Full series applied.
>
> I forgot to modify the <asm/emma2rh.h> references from arch/mips/pci/
> {ops,pci,fixup}-emma2rh.c sources. I'll send delta patch soon, please
> fold it to previous one.
>
> Anyway, thanks a lot!
You're welcome!
Ralf
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH] MIPS: EMMA2RH: Fix incorrect header references
2008-10-23 16:30 ` [PATCH 04/12] MIPS: Move <asm/emma2rh> to <asm/emma> dir Shinya Kuribayashi
@ 2008-10-27 15:07 ` Shinya Kuribayashi
2008-10-27 15:36 ` Ralf Baechle
0 siblings, 1 reply; 19+ messages in thread
From: Shinya Kuribayashi @ 2008-10-27 15:07 UTC (permalink / raw)
To: linux-mips; +Cc: shinya.kuribayashi
Now we have <asm/emma/emma2rh.h> as a new EMMA2RH header place. This
patch will fix all of the remaining <asm/emma2rh/emma2rh.h> references.
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
---
arch/mips/include/asm/emma/emma2rh.h | 2 +-
arch/mips/pci/fixup-emma2rh.c | 2 +-
arch/mips/pci/ops-emma2rh.c | 2 +-
arch/mips/pci/pci-emma2rh.c | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/mips/include/asm/emma/emma2rh.h b/arch/mips/include/asm/emma/emma2rh.h
index cd84850..30aea91 100644
--- a/arch/mips/include/asm/emma/emma2rh.h
+++ b/arch/mips/include/asm/emma/emma2rh.h
@@ -1,5 +1,5 @@
/*
- * include/asm-mips/emma2rh/emma2rh.h
+ * arch/mips/include/asm/emma/emma2rh.h
* This file is EMMA2RH common header.
*
* Copyright (C) NEC Electronics Corporation 2005-2006
diff --git a/arch/mips/pci/fixup-emma2rh.c b/arch/mips/pci/fixup-emma2rh.c
index 846eae9..fba5aad 100644
--- a/arch/mips/pci/fixup-emma2rh.c
+++ b/arch/mips/pci/fixup-emma2rh.c
@@ -30,7 +30,7 @@
#include <asm/bootinfo.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
#define EMMA2RH_PCI_HOST_SLOT 0x09
#define EMMA2RH_USB_SLOT 0x03
diff --git a/arch/mips/pci/ops-emma2rh.c b/arch/mips/pci/ops-emma2rh.c
index d31bfc6..5947a70 100644
--- a/arch/mips/pci/ops-emma2rh.c
+++ b/arch/mips/pci/ops-emma2rh.c
@@ -30,7 +30,7 @@
#include <asm/addrspace.h>
#include <asm/debug.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
#define RTABORT (0x1<<9)
#define RMABORT (0x1<<10)
diff --git a/arch/mips/pci/pci-emma2rh.c b/arch/mips/pci/pci-emma2rh.c
index 772e283..2df4190 100644
--- a/arch/mips/pci/pci-emma2rh.c
+++ b/arch/mips/pci/pci-emma2rh.c
@@ -30,7 +30,7 @@
#include <asm/bootinfo.h>
-#include <asm/emma2rh/emma2rh.h>
+#include <asm/emma/emma2rh.h>
static struct resource pci_io_resource = {
.name = "pci IO space",
^ permalink raw reply related [flat|nested] 19+ messages in thread
* Re: [PATCH] MIPS: EMMA2RH: Fix incorrect header references
2008-10-27 15:07 ` [PATCH] MIPS: EMMA2RH: Fix incorrect header references Shinya Kuribayashi
@ 2008-10-27 15:36 ` Ralf Baechle
0 siblings, 0 replies; 19+ messages in thread
From: Ralf Baechle @ 2008-10-27 15:36 UTC (permalink / raw)
To: Shinya Kuribayashi; +Cc: linux-mips, shinya.kuribayashi
On Tue, Oct 28, 2008 at 12:07:19AM +0900, Shinya Kuribayashi wrote:
> Now we have <asm/emma/emma2rh.h> as a new EMMA2RH header place. This
> patch will fix all of the remaining <asm/emma2rh/emma2rh.h> references.
Applied. For kernel.org I'll fold this into the earlier patch "MIPS: EMMA:
Move <asm/emma2rh> to <asm/emma> dir" to keep things bisectable.
Thanks,
Ralf
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2008-10-27 15:36 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2008-10-23 16:23 [PATCH 00/10] Restructure EMMA2RH port Shinya Kuribayashi
2008-10-23 16:27 ` [PATCH 01/12] MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processors Shinya Kuribayashi
2008-10-23 16:29 ` [PATCH 03/12] MIPS: Move arch/mips/emma2rh/ into arch/mips/emma/ Shinya Kuribayashi
2008-10-23 16:30 ` [PATCH 04/12] MIPS: Move <asm/emma2rh> to <asm/emma> dir Shinya Kuribayashi
2008-10-27 15:07 ` [PATCH] MIPS: EMMA2RH: Fix incorrect header references Shinya Kuribayashi
2008-10-27 15:36 ` Ralf Baechle
2008-10-23 16:30 ` [PATCH 05/12] MIPS: Remove emma2rh_sync on read operation Shinya Kuribayashi
2008-10-23 16:31 ` [PATCH 06/12] MIPS: EMMA2RH: Remove emma2rh_irq_base global variable Shinya Kuribayashi
2008-10-23 16:31 ` [PATCH 07/12] MIPS: EMMA2RH: Remove emma2rh_sw_irq_base Shinya Kuribayashi
2008-10-23 16:32 ` [PATCH 08/12] MIPS: EMMA2RH: Remove emma2rh_gpio_irq_base Shinya Kuribayashi
2008-10-23 17:20 ` Markus Gothe
2008-10-23 16:32 ` [PATCH 09/12] MIPS: Fold arch/mips/emma/{common,markeins}/irq*.c into markeins/irq.c Shinya Kuribayashi
2008-10-23 16:33 ` [PATCH 10/12] MIPS: Markeins: Remove runtime debug prints Shinya Kuribayashi
2008-10-23 16:35 ` [PATCH 11/12] MIPS: Markeins: Extract ll_emma2rh_* functions Shinya Kuribayashi
2008-10-23 16:36 ` [PATCH 12/12] MIPS: Markeins: Remove unnecessary define and cleanup comments, etc Shinya Kuribayashi
2008-10-23 21:00 ` [PATCH 02/12] MIPS: EMMA Kconfig reorganization Shinya Kuribayashi
2008-10-27 10:47 ` [PATCH 00/10] Restructure EMMA2RH port Ralf Baechle
2008-10-27 11:05 ` Shinya Kuribayashi
2008-10-27 14:50 ` Ralf Baechle
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