From: Sergei Shtylyov <sshtylyov@ru.mvista.com>
To: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Tejun Heo <tj@kernel.org>, Jeff Garzik <jeff@garzik.org>,
IDE/ATA development list <linux-ide@vger.kernel.org>
Subject: Re: [PATCH #upstraem-fixes] ata_piix: detect and clear spurious IRQs
Date: Wed, 26 Nov 2008 15:26:42 +0300 [thread overview]
Message-ID: <492D4082.7070208@ru.mvista.com> (raw)
In-Reply-To: <20081126104731.4b370d18@lxorguk.ukuu.org.uk>
Hello.
Alan Cox wrote:
>> All BMDMA controllers I know about are sata_sil (already has private
>> irq handler) and ata_piix (this patch). Alan, how do other
>> controllers do it?
>>
>
> CMD chipsets do a register read .. from PCI config space (gak)
> SIL680 is similar
>
Similar to the chips driven by sata_sil you mean?
Both 680 and 3112 certainly have the INTRQ status in the MMIO
register (yes, alternatively seen thru the PCI config space). IIRC it's
not a latched status, so doesn't require clearing...
> Promise uses a magic register at dmabase + 0x1D which holds irq bits
>
Yes, if you mean the chips driven by [pata_]pdc202xx_old -- don't
know about SATA.
MBR, Sergei
next prev parent reply other threads:[~2008-11-26 12:26 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-11-21 4:13 [PATCH #upstraem-fixes] ata_piix: detect and clear spurious IRQs Tejun Heo
2008-11-21 10:25 ` Alan Cox
2008-11-21 13:07 ` Tejun Heo
2008-11-25 17:07 ` Jeff Garzik
2008-11-26 2:52 ` Tejun Heo
2008-11-26 10:47 ` Alan Cox
2008-11-26 12:26 ` Sergei Shtylyov [this message]
2008-11-26 12:28 ` Sergei Shtylyov
2008-11-26 12:37 ` Sergei Shtylyov
2008-11-26 17:34 ` Jeff Garzik
2008-11-26 17:45 ` Tejun Heo
2008-11-26 18:40 ` Alan Cox
2008-11-26 18:57 ` Tejun Heo
2008-11-28 2:31 ` Tejun Heo
2008-12-04 16:33 ` Mark Lord
2008-12-04 16:35 ` Alan Cox
2008-11-21 16:59 ` Sergei Shtylyov
2008-11-21 17:05 ` Tejun Heo
2008-11-25 17:08 ` Jeff Garzik
2008-11-25 17:15 ` Alan Cox
2008-11-26 2:45 ` Tejun Heo
2008-11-26 10:33 ` Alan Cox
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