[U-Boot] powerpc flush_cache() roll over bug

[U-Boot] powerpc flush_cache() roll over bug

[Kumar Gala]

My brian stopped working but I figured I'd send my issue and hopefully  
I'll wake up and someone will have a solution for me.

The problem is we can call flush_cache(0xfffff000, 0x1000) which will  
never exit the loop:

void flush_cache(ulong start_addr, ulong size)
{
#ifndef CONFIG_5xx
         ulong addr, start;
         u64 end;

         start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
         end = start_addr + size - 1;

         for (addr = start; addr <= end; addr +=  
CONFIG_SYS_CACHELINE_SIZE) {
                 asm volatile("dcbst 0,%0" : : "r" (addr) : "memory");
                 WATCHDOG_RESET();
         }
...

since end = 0xffffffff.  There are some other situations (like  
flush_cache(0, 0)) that cause similar issues, but less concerned about  
that.

Any suggestions on how to best to re-write the code to correctly  
handle flush_cache(0xfffff000, 0x1000) are welcome.

- k

[U-Boot] powerpc flush_cache() roll over bug

[Jerry Van Baren]

Kumar Gala wrote:
> My brian stopped working but I figured I'd send my issue and hopefully  
> I'll wake up and someone will have a solution for me.

Talk about sweet dreams!  :-D

> The problem is we can call flush_cache(0xfffff000, 0x1000) which will  
> never exit the loop:
> 
> void flush_cache(ulong start_addr, ulong size)
> {
> #ifndef CONFIG_5xx
>          ulong addr, start;
>          u64 end;
> 
>          start = start_addr & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
>          end = start_addr + size - 1;
> 
>          for (addr = start; addr <= end; addr +=  
> CONFIG_SYS_CACHELINE_SIZE) {
>                  asm volatile("dcbst 0,%0" : : "r" (addr) : "memory");
>                  WATCHDOG_RESET();
>          }
> ...
> 
> since end = 0xffffffff.  There are some other situations (like  
> flush_cache(0, 0)) that cause similar issues, but less concerned about  
> that.
> 
> Any suggestions on how to best to re-write the code to correctly  
> handle flush_cache(0xfffff000, 0x1000) are welcome.

You could do a range check between start and end:

for (addr = start;
      (addr <= end) && (addr >= start);
      addr += CONFIG_SYS_CACHELINE_SIZE) {

Best regards,
gvb

[U-Boot] powerpc flush_cache() roll over bug

[Kumar Gala]

On Feb 6, 2009, at 7:59 AM, Jerry Van Baren wrote:

> Kumar Gala wrote:
>> My brian stopped working but I figured I'd send my issue and  
>> hopefully  I'll wake up and someone will have a solution for me.
>
> Talk about sweet dreams!  :-D

See it worked.  I work up and had this email in my inbox :)

- k