From: Jan Kiszka <jan.kiszka@web.de>
To: qemu-devel <qemu-devel@nongnu.org>
Cc: Anthony Liguori <aliguori@us.ibm.com>, Beth Kon <eak@us.ibm.com>,
Avi Kivity <avi@redhat.com>
Subject: [Qemu-devel] [RFC][PATCH] disable special ioapic inti0 routing
Date: Sat, 07 Feb 2009 00:30:35 +0100 [thread overview]
Message-ID: <498CC81B.2070407@web.de> (raw)
This patch comes from the kvm tree and fixes the timer IRQ routing for
me which is broken from the POV of certain Linux guest kernels. As I'm
not up-to-date with the development around that problematic hunk, I'm
leaving it to someone more deeply involved to sign this off. But please
commit some fix.
Thanks,
Jan
------->
From: Avi Kivity <avi@redhat.com>
we don't support it yet (need bios support, and modifications to kernel
irq routing).
---
qemu/hw/apic.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/qemu/hw/apic.c b/qemu/hw/apic.c
index df80444..f9ef995 100644
--- a/qemu/hw/apic.c
+++ b/qemu/hw/apic.c
@@ -1055,12 +1055,14 @@ void ioapic_set_irq(void *opaque, int vector, int level)
{
IOAPICState *s = opaque;
+#if 0
/* ISA IRQs map to GSI 1-1 except for IRQ0 which maps
* to GSI 2. GSI maps to ioapic 1-1. This is not
* the cleanest way of doing it but it should work. */
if (vector == 0)
vector = 2;
+#endif
if (vector >= 0 && vector < IOAPIC_NUM_PINS) {
uint32_t mask = 1 << vector;
next reply other threads:[~2009-02-06 23:30 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-02-06 23:30 Jan Kiszka [this message]
2009-02-06 23:51 ` [Qemu-devel] [RFC][PATCH] disable special ioapic inti0 routing Anthony Liguori
2009-02-07 0:07 ` [Qemu-devel] " Jan Kiszka
2009-02-07 1:30 ` Anthony Liguori
2009-02-07 2:09 ` Jan Kiszka
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