From: tessolveupstream@gmail.com
To: Luca Ceresoli <luca.ceresoli@bootlin.com>,
Marek Vasut <marex@nabladev.com>,
andrzej.hajda@intel.com, neil.armstrong@linaro.org,
rfoss@kernel.org
Cc: Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se,
jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com,
mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com,
simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, valentin@compulab.co.il,
philippe.schenker@toradex.com, dri-devel@lists.freedesktop.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 0/2] drm: bridge: ti-sn65dsi83: Improve dual-link LVDS support
Date: Wed, 18 Mar 2026 11:15:29 +0530 [thread overview]
Message-ID: <49b79a0d-844b-4fee-bccb-706187ed76d1@gmail.com> (raw)
In-Reply-To: <DH0X7QW3AH3C.PRNRA8CRSSKA@bootlin.com>
On 12-03-2026 21:19, Luca Ceresoli wrote:
> Hello Sudarshan,
>
> and thanks Marek for copying me, I hadn't noticed this series.
>
> On Thu Mar 12, 2026 at 1:35 PM CET, tessolveupstream wrote:
>
> [...]
>
>>> +CC Luca
>>>
>>> You might want to look at recently posted:
>>>
>>> [PATCH 2/3] drm/bridge: ti-sn65dsi83: halve horizontal syncs for dual LVDS output
>>
>> Thanks for pointing this out.
>> I tried applying the patch “[PATCH 2/3] drm/bridge: ti-sn65dsi83: halve horizontal syncs for dual LVDS output” on top of the current tree and
>> removed the changes that I had previously added in the driver.
>> However, with this patch applied, I am currently seeing only the backlight turning on and no image on the LVDS panel.
>> For reference, the LVDS panel used on our platform is G133HAN01.1 and the
>> DSI-to-dual-link LVDS bridge is SN65DSI84ZXHR.
>
> Thanks for having tried.
>
> Can you please test with both the fixes in the series applied + the test
> pattern feature and report the results you get with and without test
> pattern enabled?
>
> The patches to apply are:
>
> - https://lore.kernel.org/all/20260226-ti-sn65dsi83-dual-lvds-fixes-and-test-pattern-v1-1-2e15f5a9a6a0@bootlin.com/
> - https://lore.kernel.org/all/20260226-ti-sn65dsi83-dual-lvds-fixes-and-test-pattern-v1-2-2e15f5a9a6a0@bootlin.com/
> - https://lore.kernel.org/lkml/20260309-ti-sn65dsi83-dual-lvds-fixes-and-test-pattern-v2-1-e6aaa7e1d181@bootlin.com/
>
Thanks for the suggestions.
I tested the three patches together as mentioned, but the LVDS panel
still only shows the backlight and no image. I also tried removing the
test-pattern patch and retesting with only the remaining two fixes, but
the result remained the same — only the backlight turns on and no image
is displayed.
>> During our earlier debugging, we went through several trial-and-error
>> iterations and also received support from TI. According to TI, when
>> operating in dual-link mode the horizontal timing parameters must be
>> divided by two before being written to the device. Without this
>> adjustment, the panel either does not light up or shows corrupted output.
>>
>> TI also shared a set of recommended register settings for dual-link mode,
>> which were derived using the TI DSI-Tuner tool. These settings helped us
>> get the panel working on our hardware during testing.
>> For reference, the register configuration suggested by TI is as follows:
>>
>> regmap_write(ctx->regmap, REG_RC_LVDS_PLL, 0x05);
>> regmap_write(ctx->regmap, REG_RC_PLL_EN, 0x00);
>> regmap_write(ctx->regmap, REG_DSI_CLK, 0x53);
>> regmap_write(ctx->regmap, REG_LVDS_FMT, 0x6f);
>> regmap_write(ctx->regmap, REG_LVDS_VCOM, 0x00);
>> regmap_write(ctx->regmap,
>> REG_VID_CHA_VERTICAL_DISPLAY_SIZE_LOW, 0x00);
>> regmap_write(ctx->regmap,
>> REG_VID_CHA_VERTICAL_DISPLAY_SIZE_HIGH, 0x00);
>> regmap_write(ctx->regmap,
>> REG_VID_CHA_HSYNC_PULSE_WIDTH_LOW, 0x10);
>> regmap_write(ctx->regmap,
>> REG_VID_CHA_HORIZONTAL_BACK_PORCH, 0x28);
>> regmap_write(ctx->regmap,
>> REG_VID_CHA_VERTICAL_BACK_PORCH, 0x00);
>> regmap_write(ctx->regmap,
>> REG_VID_CHA_HORIZONTAL_FRONT_PORCH, 0x00);
>> regmap_write(ctx->regmap,
>> REG_VID_CHA_VERTICAL_FRONT_PORCH, 0x00);
>>
>> If it would help, we can test any proposed changes on our hardware.
>
> The first thing I suggest doing on your side is testing with the 3 patches
> mentioned above.
>
> If you display works, good! Let us know (you can also add your Tested-by /
> Reviewed-by tags to the test_pattern patch too if applicable).
>
> If it doesn't work, compare the individual register values to find the
> differences, try to figure out why the working setting works and how to
> apply that change to the driver in away that keeps other boards
> working. You're welcome to come back here to discuss it in case you can't
> find out on your own.
>
I tested the three patches as suggested, but the panel still shows only the
backlight with no visible image. I’m unsure how to translate the working
register values into a generic fix based on display timings. Any guidance
on the right direction would be helpful.
> Hope this helps,
> Luca
>
> --
> Luca Ceresoli, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
next prev parent reply other threads:[~2026-03-18 5:45 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-12 4:37 [PATCH v2 0/2] drm: bridge: ti-sn65dsi83: Improve dual-link LVDS support Sudarshan Shetty
2026-03-12 4:37 ` [PATCH v2 1/2] dt-bindings: display: bridge: ti,sn65dsi83: Add dual-link video mode property Sudarshan Shetty
2026-03-12 4:37 ` [PATCH v2 1/2] dt-bindings: display: bridge: ti, sn65dsi83: " Sudarshan Shetty
2026-03-12 15:46 ` Luca Ceresoli
2026-03-13 8:55 ` Krzysztof Kozlowski
2026-03-18 5:48 ` tessolveupstream
2026-03-18 5:49 ` tessolveupstream
2026-03-12 4:37 ` [PATCH v2 2/2] drm: bridge: ti-sn65dsi83: Add support for dual-link LVDS video mode Sudarshan Shetty
2026-03-12 15:47 ` Luca Ceresoli
2026-03-18 5:53 ` tessolveupstream
2026-03-18 8:52 ` Luca Ceresoli
2026-04-06 8:32 ` tessolveupstream
2026-04-06 8:35 ` tessolveupstream
2026-04-08 11:10 ` tessolveupstream
2026-03-12 5:05 ` [PATCH v2 0/2] drm: bridge: ti-sn65dsi83: Improve dual-link LVDS support Marek Vasut
2026-03-12 12:35 ` tessolveupstream
2026-03-12 15:49 ` Luca Ceresoli
2026-03-18 5:45 ` tessolveupstream [this message]
2026-03-18 8:51 ` Luca Ceresoli
2026-03-19 9:55 ` tessolveupstream
2026-03-19 13:47 ` Luca Ceresoli
2026-03-24 11:00 ` tessolveupstream
2026-03-24 11:10 ` Alexander Stein
2026-03-25 6:09 ` tessolveupstream
2026-03-25 7:14 ` Alexander Stein
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