[U-Boot] JFFS2 + cache coherency

[U-Boot] JFFS2 + cache coherency

[Renaud barbier]

My system is based on MPc8544.

I am loading a small standalone program (2KB) from the JFFS2 partition 
(NOR flash)

My program crashes while it does not crash if loaded from a tftp server.

After investifgation using Codewarrior I noticed that there is a difference
between the memory and Dcache content.
Some number of words (8 = cache line)) are all zero in Dcache. Hence 
when jumping  the program crashes
 as I guess the instruction cache is picking the instructions from the 
Dcache.

When the program is loaded from a tftp server both the cache (in 
copyback mode) and DDR
are set with the same data and therefore the program works.
When loaded from a JFFS2 partition, the data are loaded to inode buffer 
(flash to memory with cache inhibited)
 in memory and then (mem)copied to the destination address (memory to 
memory). (Hope I got this right).
This is why the cache/memory is not in sync.

The problem does not exist  when the cache is write-through.

Also the Freescale documentation on cache cohenrency specifies that 
software should make sure
that the cache/memory are synchronized before jumping to a new location.

Hence, I think  the cache should be flushed in or after do_jffs2_fsload.
A call to flush_dcache(); fixes the problem.

Let me know if you think I am right regarding this issue.

cheers,
Renaud