From: Robert Reif <reif@earthlink.net>
To: qemu-devel@nongnu.org
Cc: Blue Swirl <blauwirbel@gmail.com>
Subject: [Qemu-devel] sparc sun4m changes
Date: Sun, 09 Aug 2009 21:57:37 -0400 [thread overview]
Message-ID: <4A7F7E91.5000903@earthlink.net> (raw)
I just took a look at the sun4m interrupt controller and noticed
the recent changes. There are at least 3 different interrupt
controllers used by sun4m: ss600mp with VME and MBUS
specific support, ss 10/20 with MBUS support and ss 4/5/lx
with slavio support. This doesn't even address the java stations.
intbit_to_level in slavio_intctrl.c needs to be different for each
controller chip used. There also needs to be a controller specific
interrupt mask used.
The NCR slavio chip is only used for single processor systems
(ss 4/5/lx). It is a subset of the ss 10/20 which is a subset of the
ss600mp. We really should address these differences.
next reply other threads:[~2009-08-10 1:57 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-08-10 1:57 Robert Reif [this message]
2009-08-10 2:28 ` [Qemu-devel] sparc sun4m changes Robert Reif
2009-08-13 18:54 ` Blue Swirl
2009-08-13 23:14 ` Robert Reif
2009-08-13 18:18 ` [Qemu-devel] " Blue Swirl
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