Question : about difference with bdnz and bdnz+

Question : about difference with bdnz and bdnz+

[HongWoo Lee]

Hi ~

I found the code in the linux kernel.

static __inline__ void clear_page(void *addr)
{
    unsigned long lines, line_size;
    line_size = cpu_caches.dline_size;
    lines = cpu_caches.dlines_per_page;

    __asm__ __volatile__(
            "mtctr  %1      # clear_page\n\
            1:  dcbz    0,%0\n\
            add     %0,%0,%3\n\
            bdnz+   1b"
            : "=r" (addr)
            : "r" (lines), "0" (addr), "r" (line_size)
            : "ctr", "memory");
}

And I have a question about bdnz+ instruction.
Through googling, I learned that bdnz does decrement count register and 
branch if it is still nonzero.
But I couldn't find what "bdnz+" is.
Can anybody explain to me what it is ??

Thanks in advance.

HongWoo.

Re: Question : about difference with bdnz and bdnz+

[Benjamin Herrenschmidt]

On Thu, 2009-08-27 at 14:04 +0900, HongWoo Lee wrote:
> And I have a question about bdnz+ instruction.
> Through googling, I learned that bdnz does decrement count register
> and 
> branch if it is still nonzero.
> But I couldn't find what "bdnz+" is.
> Can anybody explain to me what it is ??

On PowerPC, branch instructions can have a "hint" (+ or - added to the
mnemonic) which indicates to the processor whether the branch is likely
to be taken or not, and overrides the dynamic branch prediction.

In most case, it's not necessary though I suppose in the case at hand,
we are pretty confident that we're going to loop a lot more times than
exit from the loop so it won't hurt to put the hint in there.

Note that there have been subtle changes in the way those hints work
between earlier and modern PowerPC processors and the way they are
encoded will be different depending on what CPU you are building for,
but that's an entirely different headache :-)

Cheers,
Ben.