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From: Wolfgang Grandegger <wg@grandegger.com>
To: David Miller <davem@davemloft.net>
Cc: wd@denx.de, dzu@denx.de, netdev@vger.kernel.org,
	linuxppc-dev@ozlabs.org, agust@denx.de, kosmo@semihalf.com
Subject: Re: [net-next-2.6 PATCH 2/3] fs_enet: Add support for MPC512x to fs_enet driver
Date: Wed, 10 Feb 2010 11:20:25 +0100	[thread overview]
Message-ID: <4B728869.1090404@grandegger.com> (raw)
In-Reply-To: <4B72794A.9010805@grandegger.com>

Wolfgang Grandegger wrote:
> Hi David,
> 
> David Miller wrote:
>> From: Anatolij Gustschin <agust@denx.de>
>> Date: Tue, 9 Feb 2010 15:23:17 +0100
>>
>>> In my understanding, in the ESP scsi driver the set of defines for
>>> the register offsets is common for all chip drivers. The chip driver
>>> methods for register access translate the offsets because the
>>> registers on some chips are at different intervals (4-byte, 1-byte,
>>> 16-byte for mac_esp.c). But the register order is the same for
>>> different chips.
>>>
>>> In our case non only the register order is not the same for 8xx
>>> FEC and 5121 FEC, but there are also other differences, different
>>> reserved areas between several registers, some registers are
>>> available only on 8xx and some only on 5121.
>> That only means you would need to use a table based register address
>> translation scheme, rather than a simple calculation.  Something
>> like:
>>
>> static unsigned int chip_xxx_table[] =
>> {
>> 	[GENERIC_REG_FOO]	 = CHIP_XXX_FOO,
>> 	...
>> };
>>
>> static u32 chip_xxx_read_reg(struct chip *p, unsigned int reg)
>> {
>> 	unsigned int reg_off = chip_xxx_table[reg];
>>
>> 	return readl(p->regs + reg_off);
>> }
>>
>> And this table can have special tokens in entries for
>> registers which do not exist on a chip, so you can trap
>> attempted access to them in these read/write handlers.
> 
> Yes, that could be done, but to honest, I do not see any improvement in
> respect to the previous patch where the register offset were defined via
> pointers within a structure.
> 
>> Please stop looking for excuses to fork this driver, a
>> unified driver I think can be done cleanly.
> 
> Other people suggested to fork the driver because it's getting too ugly.

That said, I think there is consensus that it does not make sense, and
it's even not possible, to provide a kernel image which runs on both,
the 8xx and the mpc512x. Therefore, there is also no need for sharing
this driver at run time. Compile time selection would allow a more
elegant and transparent implementation. Would that be an acceptable
solution?

Wolfgang.

WARNING: multiple messages have this Message-ID (diff)
From: Wolfgang Grandegger <wg@grandegger.com>
To: David Miller <davem@davemloft.net>
Cc: agust@denx.de, netdev@vger.kernel.org, dzu@denx.de, wd@denx.de,
	jcrigby@gmail.com, kosmo@semihalf.com, linuxppc-dev@ozlabs.org,
	grant.likely@secretlab.ca
Subject: Re: [net-next-2.6 PATCH 2/3] fs_enet: Add support for MPC512x to fs_enet driver
Date: Wed, 10 Feb 2010 11:20:25 +0100	[thread overview]
Message-ID: <4B728869.1090404@grandegger.com> (raw)
In-Reply-To: <4B72794A.9010805@grandegger.com>

Wolfgang Grandegger wrote:
> Hi David,
> 
> David Miller wrote:
>> From: Anatolij Gustschin <agust@denx.de>
>> Date: Tue, 9 Feb 2010 15:23:17 +0100
>>
>>> In my understanding, in the ESP scsi driver the set of defines for
>>> the register offsets is common for all chip drivers. The chip driver
>>> methods for register access translate the offsets because the
>>> registers on some chips are at different intervals (4-byte, 1-byte,
>>> 16-byte for mac_esp.c). But the register order is the same for
>>> different chips.
>>>
>>> In our case non only the register order is not the same for 8xx
>>> FEC and 5121 FEC, but there are also other differences, different
>>> reserved areas between several registers, some registers are
>>> available only on 8xx and some only on 5121.
>> That only means you would need to use a table based register address
>> translation scheme, rather than a simple calculation.  Something
>> like:
>>
>> static unsigned int chip_xxx_table[] =
>> {
>> 	[GENERIC_REG_FOO]	 = CHIP_XXX_FOO,
>> 	...
>> };
>>
>> static u32 chip_xxx_read_reg(struct chip *p, unsigned int reg)
>> {
>> 	unsigned int reg_off = chip_xxx_table[reg];
>>
>> 	return readl(p->regs + reg_off);
>> }
>>
>> And this table can have special tokens in entries for
>> registers which do not exist on a chip, so you can trap
>> attempted access to them in these read/write handlers.
> 
> Yes, that could be done, but to honest, I do not see any improvement in
> respect to the previous patch where the register offset were defined via
> pointers within a structure.
> 
>> Please stop looking for excuses to fork this driver, a
>> unified driver I think can be done cleanly.
> 
> Other people suggested to fork the driver because it's getting too ugly.

That said, I think there is consensus that it does not make sense, and
it's even not possible, to provide a kernel image which runs on both,
the 8xx and the mpc512x. Therefore, there is also no need for sharing
this driver at run time. Compile time selection would allow a more
elegant and transparent implementation. Would that be an acceptable
solution?

Wolfgang.

  reply	other threads:[~2010-02-10 10:21 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-01-21  2:13 [net-next-2.6 PATCH 0/3] Support for MPC512x FEC Anatolij Gustschin
2010-01-21  2:13 ` Anatolij Gustschin
2010-01-21  2:13 ` [net-next-2.6 PATCH 1/3] fs_enet: use dev_xxx instead of printk Anatolij Gustschin
2010-01-21  2:13   ` Anatolij Gustschin
2010-01-21 16:43   ` Grant Likely
2010-01-21 16:43     ` Grant Likely
2010-01-21  2:13 ` [net-next-2.6 PATCH 2/3] fs_enet: Add support for MPC512x to fs_enet driver Anatolij Gustschin
2010-01-21  2:13   ` Anatolij Gustschin
2010-01-21  9:22   ` David Miller
2010-01-21  9:22     ` David Miller
2010-01-21  9:33     ` Anatolij Gustschin
2010-01-21  9:33       ` Anatolij Gustschin
2010-01-21 15:25     ` Wolfgang Grandegger
2010-01-21 15:25       ` Wolfgang Grandegger
2010-01-22  2:03       ` David Miller
2010-01-22  2:03         ` David Miller
2010-01-22  9:35         ` Wolfgang Grandegger
2010-01-22  9:35           ` Wolfgang Grandegger
2010-02-09 14:23         ` Anatolij Gustschin
2010-02-09 14:23           ` Anatolij Gustschin
2010-02-09 20:13           ` David Miller
2010-02-09 20:13             ` David Miller
2010-02-10  9:15             ` Wolfgang Grandegger
2010-02-10  9:15               ` Wolfgang Grandegger
2010-02-10 10:20               ` Wolfgang Grandegger [this message]
2010-02-10 10:20                 ` Wolfgang Grandegger
2010-02-10 14:28                 ` Grant Likely
2010-02-10 14:28                   ` Grant Likely
2010-01-23  9:23       ` Arnd Bergmann
2010-01-23  9:23         ` Arnd Bergmann
2010-01-24 14:40         ` Wolfgang Grandegger
2010-01-24 14:40           ` Wolfgang Grandegger
2010-01-24 16:41           ` Wolfgang Denk
2010-01-24 16:41             ` Wolfgang Denk
2010-01-27  2:06             ` Arnd Bergmann
2010-01-27  2:06               ` Arnd Bergmann
2010-01-27  8:13               ` Wolfgang Grandegger
2010-01-27  8:13                 ` Wolfgang Grandegger
2010-01-21 20:15   ` Wolfgang Grandegger
2010-01-21 20:15     ` Wolfgang Grandegger
2010-01-21  2:13 ` [net-next-2.6 PATCH 3/3] fs_enet: Add FEC TX Alignment workaround for MPC5121 Anatolij Gustschin
2010-01-21  2:13   ` Anatolij Gustschin
2010-01-21 16:49   ` Grant Likely
2010-01-21 16:49     ` Grant Likely

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