* [PATCH] ep93xx: fix broken build of clock.c
@ 2010-02-22 17:24 H Hartley Sweeten
2010-02-23 20:09 ` Ryan Mallon
0 siblings, 1 reply; 2+ messages in thread
From: H Hartley Sweeten @ 2010-02-22 17:24 UTC (permalink / raw)
To: linux-arm-kernel
Patch 5879/1: ep93xx: define magic numbers for pll1 and pll2 broke
the ep93xx build due to one missing rename of EP93XX_SYSCON_CLOCK_SET2.
The correct name should be EP93XX_SYSCON_CLKSET2.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ryan Mallon <ryan@bluewatersys.com>
---
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index e894ee0..5f80092 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -462,7 +462,7 @@ static int __init ep93xx_clock_init(void)
ep93xx_dma_clock_init();
/* Determine the bootloader configured pll2 rate */
- value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2);
+ value = __raw_readl(EP93XX_SYSCON_CLKSET2);
if (!(value & EP93XX_SYSCON_CLKSET2_NBYP2))
clk_pll2.rate = clk_xtali.rate;
else if (value & EP93XX_SYSCON_CLKSET2_PLL2_EN)
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH] ep93xx: fix broken build of clock.c
2010-02-22 17:24 [PATCH] ep93xx: fix broken build of clock.c H Hartley Sweeten
@ 2010-02-23 20:09 ` Ryan Mallon
0 siblings, 0 replies; 2+ messages in thread
From: Ryan Mallon @ 2010-02-23 20:09 UTC (permalink / raw)
To: linux-arm-kernel
H Hartley Sweeten wrote:
> Patch 5879/1: ep93xx: define magic numbers for pll1 and pll2 broke
> the ep93xx build due to one missing rename of EP93XX_SYSCON_CLOCK_SET2.
> The correct name should be EP93XX_SYSCON_CLKSET2.
>
> Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
> Cc: Ryan Mallon <ryan@bluewatersys.com>
>
> ---
>
> diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
> index e894ee0..5f80092 100644
> --- a/arch/arm/mach-ep93xx/clock.c
> +++ b/arch/arm/mach-ep93xx/clock.c
> @@ -462,7 +462,7 @@ static int __init ep93xx_clock_init(void)
> ep93xx_dma_clock_init();
>
> /* Determine the bootloader configured pll2 rate */
> - value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2);
> + value = __raw_readl(EP93XX_SYSCON_CLKSET2);
> if (!(value & EP93XX_SYSCON_CLKSET2_NBYP2))
> clk_pll2.rate = clk_xtali.rate;
> else if (value & EP93XX_SYSCON_CLKSET2_PLL2_EN)
This fixes a build failure, and has been compile and boot tested.
Acked-by: Ryan Mallon <ryan@bluewatersys.com>
--
Bluewater Systems Ltd - ARM Technology Solution Centre
Ryan Mallon 5 Amuri Park, 404 Barbadoes St
ryan at bluewatersys.com PO Box 13 889, Christchurch 8013
http://www.bluewatersys.com New Zealand
Phone: +64 3 3779127 Freecall: Australia 1800 148 751
Fax: +64 3 3779135 USA 1800 261 2934
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2010-02-23 20:09 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2010-02-22 17:24 [PATCH] ep93xx: fix broken build of clock.c H Hartley Sweeten
2010-02-23 20:09 ` Ryan Mallon
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.