Re: Problem with PCI bus rescan on 460EX

[Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>]

I'm not sure, but I guess pci_setup_bridge() didn't update IO base/limit
and Mem base/limit of the bridge (0000:00:02.0) because of the following
lines.

static void pci_setup_bridge(struct pci_bus *bus)
{
        struct pci_dev *bridge = bus->self;
        struct resource *res;
        struct pci_bus_region region;
        u32 l, bu, lu, io_upper16;

        if (pci_is_enabled(bridge))	<===============================				
                return;			<===============================

        dev_info(&bridge->dev, "PCI bridge to [bus %02x-%02x]\n",
                 bus->secondary, bus->subordinate);
	...

It seems the bridge was already enabled by pci_assign_unassigned_resources()
at boot time. Does removing those lines make any change?

Thanks,
Kenji Kaneshige




Felix Radensky wrote:
> Hi Alex,
> 
> Resending, previous attempt was erroneously send as HTML.
> 
> Thanks a lot for replying.
> 
> Alex Chiang wrote:
>> * Felix Radensky <felix@embedded-sol.com>:
>>  
>>> The problem arises when device is plugged in after boot. After doing
>>> echo 1 > /sys/bus/pci/rescan
>>> the device is identified, but bridge memory window is not allocated,
>>> and reads from device memory regions return 0xffffffff. Below is
>>> relevant output:
>>>     
>>
>> Do you need firmware support on your platform for hotplug?
>>   
> I don't think so, but I've added powerpc guys to CC to make sure.
>> Can you please send full dmesg during successful boot, full dmesg
>> log during unsuccessful rescan, and contents of /proc/iomem and
>> /proc/ioports during success and failure cases?
>>
>> Be sure you have PCI_CONFIG_DEBUG turned on.
>>   
> Attached. I really appreciate your help. Thanks a lot.
> 
> Felix.
>