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From: shiraz.hashim@st.com (Shiraz HASHIM)
To: linux-arm-kernel@lists.infradead.org
Subject: Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage
Date: Sat, 17 Apr 2010 15:26:13 +0530	[thread overview]
Message-ID: <4BC985BD.8040704@st.com> (raw)

Hello,

I am trying to port Linux on ARM Cortex A9 based platform and what
I see is that if I don't invalidate the data cache before enabling
and using it (in arch/arm/boot/compressed/head.S) the system crashes.

I need to do the same for second core before calling secondary_startup.

Is it normal? Why then other platforms (cortex A9 based) are not doing
this. What am I missing?

thanks for your help.

regards
Shira

             reply	other threads:[~2010-04-17  9:56 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-04-17  9:56 Shiraz HASHIM [this message]
2010-04-17 10:07 ` Query: ARM Cortex A9: Is invalidating L1 data cache mandatory before usage Shilimkar, Santosh
2010-04-17 10:28   ` Shiraz HASHIM
2010-04-17 18:14 ` Russell King - ARM Linux
2010-04-18 14:35   ` shiraz hashim
2010-04-18 15:43   ` shiraz hashim
2010-04-18 15:56     ` Russell King - ARM Linux

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