* [Qemu-devel] [PATCH 0/2] two tcg improvements
@ 2010-05-03 23:30 Richard Henderson
2010-05-03 23:30 ` [Qemu-devel] [PATCH 1/2] tcg: Add TYPE parameter to tcg_out_mov Richard Henderson
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Richard Henderson @ 2010-05-03 23:30 UTC (permalink / raw)
To: qemu-devel
The first patch allows the x86-64 port to avoid the REX.W prefix
on moves, by allowing reg-reg moves to be typed just as reg-imm
moves already are. This does require trivial changes to each port.
The second patch fixes an oversight in commit
86feb1c860dc38e9c89e787c5210e8191800385e
whereby I only modified the 32-bit host versions of the inline
functions and not the 64-bit host versions. This is visible on
x86-64 host with arm guest in that we unnecessarily emit some
MOVSLQ insns instead of plain 32-bit MOV insns.
r~
Richard Henderson (2):
tcg: Add TYPE parameter to tcg_out_mov.
tcg: Use INDEX_op_qemu_ld32 for 32-bit results.
tcg/arm/tcg-target.c | 2 +-
tcg/hppa/tcg-target.c | 38 ++++++++++++++++++------------------
tcg/i386/tcg-target.c | 49 ++++++++++++++++++++++++-----------------------
tcg/ia64/tcg-target.c | 3 +-
tcg/mips/tcg-target.c | 28 +++++++++++++-------------
tcg/ppc/tcg-target.c | 48 +++++++++++++++++++++++-----------------------
tcg/ppc64/tcg-target.c | 10 ++++----
tcg/s390/tcg-target.c | 2 +-
tcg/sparc/tcg-target.c | 10 ++++----
tcg/tcg-op.h | 8 +++++++
tcg/tcg.c | 12 +++++-----
tcg/x86_64/tcg-target.c | 20 ++++++++++--------
12 files changed, 121 insertions(+), 109 deletions(-)
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Qemu-devel] [PATCH 1/2] tcg: Add TYPE parameter to tcg_out_mov.
2010-05-03 23:30 [Qemu-devel] [PATCH 0/2] two tcg improvements Richard Henderson
@ 2010-05-03 23:30 ` Richard Henderson
2010-05-28 18:21 ` Aurelien Jarno
2010-05-03 23:30 ` [Qemu-devel] [PATCH 2/2] tcg: Use INDEX_op_qemu_ld32 for 32-bit results Richard Henderson
2010-05-17 18:31 ` [Qemu-devel] [PATCH 0/2] two tcg improvements Richard Henderson
2 siblings, 1 reply; 7+ messages in thread
From: Richard Henderson @ 2010-05-03 23:30 UTC (permalink / raw)
To: qemu-devel
Mirror tcg_out_movi in having a TYPE parameter. This allows x86_64
to perform the move at the proper width, which may elide a REX prefix.
Update all targets to match.
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/arm/tcg-target.c | 2 +-
tcg/hppa/tcg-target.c | 38 ++++++++++++++++++------------------
tcg/i386/tcg-target.c | 49 ++++++++++++++++++++++++-----------------------
tcg/ia64/tcg-target.c | 3 +-
tcg/mips/tcg-target.c | 28 +++++++++++++-------------
tcg/ppc/tcg-target.c | 48 +++++++++++++++++++++++-----------------------
tcg/ppc64/tcg-target.c | 10 ++++----
tcg/s390/tcg-target.c | 2 +-
tcg/sparc/tcg-target.c | 10 ++++----
tcg/tcg.c | 12 +++++-----
tcg/x86_64/tcg-target.c | 20 ++++++++++--------
11 files changed, 113 insertions(+), 109 deletions(-)
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index 8d23f47..b3169a9 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -1798,7 +1798,7 @@ static void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
}
}
-static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
+static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
{
tcg_out_dat_reg(s, COND_AL, ARITH_MOV, ret, 0, arg, SHIFT_IMM_LSL(0));
}
diff --git a/tcg/hppa/tcg-target.c b/tcg/hppa/tcg-target.c
index cb605f1..012e486 100644
--- a/tcg/hppa/tcg-target.c
+++ b/tcg/hppa/tcg-target.c
@@ -338,7 +338,7 @@ static int tcg_target_const_match(tcg_target_long val,
/* supplied by libgcc */
extern void *__canonicalize_funcptr_for_compare(void *);
-static void tcg_out_mov(TCGContext *s, int ret, int arg)
+static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
{
/* PA1.1 defines COPY as OR r,0,t; PA2.0 defines COPY as LDO 0(r),t
but hppa-dis.c is unaware of this definition */
@@ -498,7 +498,7 @@ static void tcg_out_ori(TCGContext *s, int ret, int arg, tcg_target_ulong m)
}
assert(bs1 == 32 || (1ul << bs1) > m);
- tcg_out_mov(s, ret, arg);
+ tcg_out_mov(s, TCG_TYPE_I32, ret, arg);
tcg_out32(s, INSN_DEPI | INSN_R2(ret) | INSN_IM5(-1)
| INSN_SHDEP_CP(31 - bs0) | INSN_DEP_LEN(bs1 - bs0));
}
@@ -528,7 +528,7 @@ static void tcg_out_andi(TCGContext *s, int ret, int arg, tcg_target_ulong m)
if (ls1 == 32) {
tcg_out_extr(s, ret, arg, 0, ls0, 0);
} else {
- tcg_out_mov(s, ret, arg);
+ tcg_out_mov(s, TCG_TYPE_I32, ret, arg);
tcg_out32(s, INSN_DEPI | INSN_R2(ret) | INSN_IM5(0)
| INSN_SHDEP_CP(31 - ls0) | INSN_DEP_LEN(ls1 - ls0));
}
@@ -608,7 +608,7 @@ static void tcg_out_rotr(TCGContext *s, int ret, int arg, int creg)
static void tcg_out_bswap16(TCGContext *s, int ret, int arg, int sign)
{
if (ret != arg) {
- tcg_out_mov(s, ret, arg); /* arg = xxAB */
+ tcg_out_mov(s, TCG_TYPE_I32, ret, arg); /* arg = xxAB */
}
tcg_out_dep(s, ret, ret, 16, 8); /* ret = xBAB */
tcg_out_extr(s, ret, ret, 8, 16, sign); /* ret = ..BA */
@@ -638,7 +638,7 @@ static void tcg_out_call(TCGContext *s, void *func)
tcg_out32(s, INSN_LDIL | INSN_R2(TCG_REG_R20) | reassemble_21(hi));
tcg_out32(s, INSN_BLE_SR4 | INSN_R2(TCG_REG_R20)
| reassemble_17(lo >> 2));
- tcg_out_mov(s, TCG_REG_RP, TCG_REG_R31);
+ tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_RP, TCG_REG_R31);
}
}
@@ -685,7 +685,7 @@ static void tcg_out_add2(TCGContext *s, int destl, int desth,
}
tcg_out_arith(s, desth, ah, bh, INSN_ADDC);
- tcg_out_mov(s, destl, tmp);
+ tcg_out_mov(s, TCG_TYPE_I32, destl, tmp);
}
static void tcg_out_sub2(TCGContext *s, int destl, int desth, int al, int ah,
@@ -706,7 +706,7 @@ static void tcg_out_sub2(TCGContext *s, int destl, int desth, int al, int ah,
}
tcg_out_arith(s, desth, ah, bh, INSN_SUBB);
- tcg_out_mov(s, destl, tmp);
+ tcg_out_mov(s, TCG_TYPE_I32, destl, tmp);
}
static void tcg_out_branch(TCGContext *s, int label_index, int nul)
@@ -869,7 +869,7 @@ static void tcg_out_setcond2(TCGContext *s, int cond, TCGArg ret,
break;
}
- tcg_out_mov(s, ret, scratch);
+ tcg_out_mov(s, TCG_TYPE_I32, ret, scratch);
}
#if defined(CONFIG_SOFTMMU)
@@ -1048,9 +1048,9 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc)
tcg_out_label(s, lab1, (tcg_target_long)s->code_ptr);
argreg = TCG_REG_R26;
- tcg_out_mov(s, argreg--, addrlo_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, argreg--, addrlo_reg);
if (TARGET_LONG_BITS == 64) {
- tcg_out_mov(s, argreg--, addrhi_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, argreg--, addrhi_reg);
}
tcg_out_movi(s, TCG_TYPE_I32, argreg, mem_index);
@@ -1071,11 +1071,11 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc)
break;
case 2:
case 2 | 4:
- tcg_out_mov(s, datalo_reg, TCG_REG_RET0);
+ tcg_out_mov(s, TCG_TYPE_I32, datalo_reg, TCG_REG_RET0);
break;
case 3:
- tcg_out_mov(s, datahi_reg, TCG_REG_RET0);
- tcg_out_mov(s, datalo_reg, TCG_REG_RET1);
+ tcg_out_mov(s, TCG_TYPE_I32, datahi_reg, TCG_REG_RET0);
+ tcg_out_mov(s, TCG_TYPE_I32, datalo_reg, TCG_REG_RET1);
break;
default:
tcg_abort();
@@ -1167,9 +1167,9 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
tcg_out_label(s, lab1, (tcg_target_long)s->code_ptr);
argreg = TCG_REG_R26;
- tcg_out_mov(s, argreg--, addrlo_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, argreg--, addrlo_reg);
if (TARGET_LONG_BITS == 64) {
- tcg_out_mov(s, argreg--, addrhi_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, argreg--, addrhi_reg);
}
switch(opc) {
@@ -1182,7 +1182,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
tcg_out_movi(s, TCG_TYPE_I32, argreg, mem_index);
break;
case 2:
- tcg_out_mov(s, argreg--, datalo_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, argreg--, datalo_reg);
tcg_out_movi(s, TCG_TYPE_I32, argreg, mem_index);
break;
case 3:
@@ -1196,8 +1196,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
argreg = TCG_REG_R20;
tcg_out_movi(s, TCG_TYPE_I32, argreg, mem_index);
}
- tcg_out_mov(s, TCG_REG_R23, datahi_reg);
- tcg_out_mov(s, TCG_REG_R24, datalo_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R23, datahi_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R24, datalo_reg);
tcg_out_st(s, TCG_TYPE_I32, argreg, TCG_REG_SP,
TCG_TARGET_CALL_STACK_OFFSET - 4);
break;
@@ -1638,7 +1638,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
/* Jump to TB, and adjust R18 to be the return address. */
tcg_out32(s, INSN_BLE_SR4 | INSN_R2(TCG_REG_R26));
- tcg_out_mov(s, TCG_REG_R18, TCG_REG_R31);
+ tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R18, TCG_REG_R31);
/* Restore callee saved registers. */
tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_RP, TCG_REG_SP, -frame_size - 20);
diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
index e684b33..4e1bd74 100644
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -251,10 +251,11 @@ static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm,
}
}
-static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
+static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
{
- if (arg != ret)
+ if (arg != ret) {
tcg_out_modrm(s, 0x8b, ret, arg);
+ }
}
static inline void tcg_out_movi(TCGContext *s, TCGType type,
@@ -573,9 +574,9 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
r1 = TCG_REG_EDX;
#if defined(CONFIG_SOFTMMU)
- tcg_out_mov(s, r1, addr_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, r1, addr_reg);
- tcg_out_mov(s, r0, addr_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, r0, addr_reg);
tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
@@ -594,7 +595,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
/* cmp 0(r1), r0 */
tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
- tcg_out_mov(s, r0, addr_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, r0, addr_reg);
#if TARGET_LONG_BITS == 32
/* je label1 */
@@ -623,7 +624,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
#if TARGET_LONG_BITS == 32
tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EDX, mem_index);
#else
- tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
+ tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_EDX, addr_reg2);
tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
#endif
tcg_out8(s, 0xe8);
@@ -649,15 +650,15 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
break;
case 2:
default:
- tcg_out_mov(s, data_reg, TCG_REG_EAX);
+ tcg_out_mov(s, TCG_TYPE_I32, data_reg, TCG_REG_EAX);
break;
case 3:
if (data_reg == TCG_REG_EDX) {
tcg_out_opc(s, 0x90 + TCG_REG_EDX); /* xchg %edx, %eax */
- tcg_out_mov(s, data_reg2, TCG_REG_EAX);
+ tcg_out_mov(s, TCG_TYPE_I32, data_reg2, TCG_REG_EAX);
} else {
- tcg_out_mov(s, data_reg, TCG_REG_EAX);
- tcg_out_mov(s, data_reg2, TCG_REG_EDX);
+ tcg_out_mov(s, TCG_TYPE_I32, data_reg, TCG_REG_EAX);
+ tcg_out_mov(s, TCG_TYPE_I32, data_reg2, TCG_REG_EDX);
}
break;
}
@@ -728,7 +729,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
r1 = TCG_REG_EDX;
if (r1 == data_reg)
r1 = TCG_REG_EAX;
- tcg_out_mov(s, r1, r0);
+ tcg_out_mov(s, TCG_TYPE_I32, r1, r0);
r0 = r1;
}
if (!bswap) {
@@ -785,9 +786,9 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
r1 = TCG_REG_EDX;
#if defined(CONFIG_SOFTMMU)
- tcg_out_mov(s, r1, addr_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, r1, addr_reg);
- tcg_out_mov(s, r0, addr_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, r0, addr_reg);
tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
@@ -806,7 +807,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
/* cmp 0(r1), r0 */
tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
- tcg_out_mov(s, r0, addr_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, r0, addr_reg);
#if TARGET_LONG_BITS == 32
/* je label1 */
@@ -834,8 +835,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
/* XXX: move that code at the end of the TB */
#if TARGET_LONG_BITS == 32
if (opc == 3) {
- tcg_out_mov(s, TCG_REG_EDX, data_reg);
- tcg_out_mov(s, TCG_REG_ECX, data_reg2);
+ tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_EDX, data_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_ECX, data_reg2);
tcg_out8(s, 0x6a); /* push Ib */
tcg_out8(s, mem_index);
tcg_out8(s, 0xe8);
@@ -853,7 +854,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_EDX, data_reg);
break;
case 2:
- tcg_out_mov(s, TCG_REG_EDX, data_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_EDX, data_reg);
break;
}
tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
@@ -863,7 +864,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
}
#else
if (opc == 3) {
- tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
+ tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_EDX, addr_reg2);
tcg_out8(s, 0x6a); /* push Ib */
tcg_out8(s, mem_index);
tcg_out_opc(s, 0x50 + data_reg2); /* push */
@@ -873,7 +874,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
(tcg_target_long)s->code_ptr - 4);
tcg_out_addi(s, TCG_REG_ESP, 12);
} else {
- tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
+ tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_EDX, addr_reg2);
switch(opc) {
case 0:
/* movzbl */
@@ -884,7 +885,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_ECX, data_reg);
break;
case 2:
- tcg_out_mov(s, TCG_REG_ECX, data_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_ECX, data_reg);
break;
}
tcg_out8(s, 0x6a); /* push Ib */
@@ -923,7 +924,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
break;
case 1:
if (bswap) {
- tcg_out_mov(s, r1, data_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, r1, data_reg);
tcg_out8(s, 0x66); /* rolw $8, %ecx */
tcg_out_modrm(s, 0xc1, 0, r1);
tcg_out8(s, 8);
@@ -935,7 +936,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
break;
case 2:
if (bswap) {
- tcg_out_mov(s, r1, data_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, r1, data_reg);
/* bswap data_reg */
tcg_out_opc(s, (0xc8 + r1) | P_EXT);
data_reg = r1;
@@ -945,11 +946,11 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
break;
case 3:
if (bswap) {
- tcg_out_mov(s, r1, data_reg2);
+ tcg_out_mov(s, TCG_TYPE_I32, r1, data_reg2);
/* bswap data_reg */
tcg_out_opc(s, (0xc8 + r1) | P_EXT);
tcg_out_modrm_offset(s, 0x89, r1, r0, GUEST_BASE);
- tcg_out_mov(s, r1, data_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, r1, data_reg);
/* bswap data_reg */
tcg_out_opc(s, (0xc8 + r1) | P_EXT);
tcg_out_modrm_offset(s, 0x89, r1, r0, GUEST_BASE + 4);
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index 6e69ef4..401dfec 100644
--- a/tcg/ia64/tcg-target.c
+++ b/tcg/ia64/tcg-target.c
@@ -821,7 +821,8 @@ static inline void tcg_out_bundle(TCGContext *s, int template,
s->code_ptr += 16;
}
-static inline void tcg_out_mov(TCGContext *s, TCGArg ret, TCGArg arg)
+static inline void tcg_out_mov(TCGContext *s, TCGType type,
+ TCGArg ret, TCGArg arg)
{
tcg_out_bundle(s, mmI,
tcg_opc_m48(TCG_REG_P0, OPC_NOP_M48, 0),
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index f38eb28..8d9c12f 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -377,7 +377,7 @@ static inline void tcg_out_nop(TCGContext *s)
tcg_out32(s, 0);
}
-static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
+static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
{
tcg_out_opc_reg(s, OPC_ADDU, ret, arg, TCG_REG_ZERO);
}
@@ -849,9 +849,9 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
/* slow path */
sp_args = TCG_REG_A0;
- tcg_out_mov(s, sp_args++, addr_reg1);
+ tcg_out_mov(s, TCG_TYPE_I32, sp_args++, addr_reg1);
# if TARGET_LONG_BITS == 64
- tcg_out_mov(s, sp_args++, addr_reg2);
+ tcg_out_mov(s, TCG_TYPE_I32, sp_args++, addr_reg2);
# endif
tcg_out_movi(s, TCG_TYPE_I32, sp_args++, mem_index);
tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_T9, (tcg_target_long)qemu_ld_helpers[s_bits]);
@@ -872,11 +872,11 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
tcg_out_ext16s(s, data_reg1, TCG_REG_V0);
break;
case 2:
- tcg_out_mov(s, data_reg1, TCG_REG_V0);
+ tcg_out_mov(s, TCG_TYPE_I32, data_reg1, TCG_REG_V0);
break;
case 3:
- tcg_out_mov(s, data_reg2, TCG_REG_V1);
- tcg_out_mov(s, data_reg1, TCG_REG_V0);
+ tcg_out_mov(s, TCG_TYPE_I32, data_reg2, TCG_REG_V1);
+ tcg_out_mov(s, TCG_TYPE_I32, data_reg1, TCG_REG_V0);
break;
default:
tcg_abort();
@@ -1035,9 +1035,9 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
/* slow path */
sp_args = TCG_REG_A0;
- tcg_out_mov(s, sp_args++, addr_reg1);
+ tcg_out_mov(s, TCG_TYPE_I32, sp_args++, addr_reg1);
# if TARGET_LONG_BITS == 64
- tcg_out_mov(s, sp_args++, addr_reg2);
+ tcg_out_mov(s, TCG_TYPE_I32, sp_args++, addr_reg2);
# endif
switch(opc) {
case 0:
@@ -1047,12 +1047,12 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
tcg_out_opc_imm(s, OPC_ANDI, sp_args++, data_reg1, 0xffff);
break;
case 2:
- tcg_out_mov(s, sp_args++, data_reg1);
+ tcg_out_mov(s, TCG_TYPE_I32, sp_args++, data_reg1);
break;
case 3:
sp_args = (sp_args + 1) & ~1;
- tcg_out_mov(s, sp_args++, data_reg1);
- tcg_out_mov(s, sp_args++, data_reg2);
+ tcg_out_mov(s, TCG_TYPE_I32, sp_args++, data_reg1);
+ tcg_out_mov(s, TCG_TYPE_I32, sp_args++, data_reg2);
break;
default:
tcg_abort();
@@ -1165,7 +1165,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_mov_i32:
- tcg_out_mov(s, args[0], args[1]);
+ tcg_out_mov(s, TCG_TYPE_I32, args[0], args[1]);
break;
case INDEX_op_movi_i32:
tcg_out_movi(s, TCG_TYPE_I32, args[0], args[1]);
@@ -1216,7 +1216,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_opc_reg(s, OPC_ADDU, args[1], args[3], args[5]);
}
tcg_out_opc_reg(s, OPC_ADDU, args[1], args[1], TCG_REG_T0);
- tcg_out_mov(s, args[0], TCG_REG_AT);
+ tcg_out_mov(s, TCG_TYPE_I32, args[0], TCG_REG_AT);
break;
case INDEX_op_sub_i32:
if (const_args[2]) {
@@ -1238,7 +1238,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_opc_reg(s, OPC_SUBU, args[1], args[3], args[5]);
}
tcg_out_opc_reg(s, OPC_SUBU, args[1], args[1], TCG_REG_T0);
- tcg_out_mov(s, args[0], TCG_REG_AT);
+ tcg_out_mov(s, TCG_TYPE_I32, args[0], TCG_REG_AT);
break;
case INDEX_op_mul_i32:
tcg_out_opc_reg(s, OPC_MULT, 0, args[1], args[2]);
diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c
index 2b85928..ce078e4 100644
--- a/tcg/ppc/tcg-target.c
+++ b/tcg/ppc/tcg-target.c
@@ -437,7 +437,7 @@ static const uint32_t tcg_to_bc[10] = {
[TCG_COND_GTU] = BC | BI (7, CR_GT) | BO_COND_TRUE,
};
-static void tcg_out_mov(TCGContext *s, int ret, int arg)
+static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
{
tcg_out32 (s, OR | SAB (arg, ret, arg));
}
@@ -591,11 +591,11 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
/* slow path */
#if TARGET_LONG_BITS == 32
- tcg_out_mov (s, 3, addr_reg);
+ tcg_out_mov (s, TCG_TYPE_I32, 3, addr_reg);
tcg_out_movi (s, TCG_TYPE_I32, 4, mem_index);
#else
- tcg_out_mov (s, 3, addr_reg2);
- tcg_out_mov (s, 4, addr_reg);
+ tcg_out_mov (s, TCG_TYPE_I32, 3, addr_reg2);
+ tcg_out_mov (s, TCG_TYPE_I32, 4, addr_reg);
tcg_out_movi (s, TCG_TYPE_I32, 5, mem_index);
#endif
@@ -611,23 +611,23 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
case 1:
case 2:
if (data_reg != 3)
- tcg_out_mov (s, data_reg, 3);
+ tcg_out_mov (s, TCG_TYPE_I32, data_reg, 3);
break;
case 3:
if (data_reg == 3) {
if (data_reg2 == 4) {
- tcg_out_mov (s, 0, 4);
- tcg_out_mov (s, 4, 3);
- tcg_out_mov (s, 3, 0);
+ tcg_out_mov (s, TCG_TYPE_I32, 0, 4);
+ tcg_out_mov (s, TCG_TYPE_I32, 4, 3);
+ tcg_out_mov (s, TCG_TYPE_I32, 3, 0);
}
else {
- tcg_out_mov (s, data_reg2, 3);
- tcg_out_mov (s, 3, 4);
+ tcg_out_mov (s, TCG_TYPE_I32, data_reg2, 3);
+ tcg_out_mov (s, TCG_TYPE_I32, 3, 4);
}
}
else {
- if (data_reg != 4) tcg_out_mov (s, data_reg, 4);
- if (data_reg2 != 3) tcg_out_mov (s, data_reg2, 3);
+ if (data_reg != 4) tcg_out_mov (s, TCG_TYPE_I32, data_reg, 4);
+ if (data_reg2 != 3) tcg_out_mov (s, TCG_TYPE_I32, data_reg2, 3);
}
break;
}
@@ -705,7 +705,7 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
if (r0 == data_reg2) {
tcg_out32 (s, LWZ | RT (0) | RA (r0));
tcg_out32 (s, LWZ | RT (data_reg) | RA (r0) | 4);
- tcg_out_mov (s, data_reg2, 0);
+ tcg_out_mov (s, TCG_TYPE_I32, data_reg2, 0);
}
else {
tcg_out32 (s, LWZ | RT (data_reg2) | RA (r0));
@@ -787,11 +787,11 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
/* slow path */
#if TARGET_LONG_BITS == 32
- tcg_out_mov (s, 3, addr_reg);
+ tcg_out_mov (s, TCG_TYPE_I32, 3, addr_reg);
ir = 4;
#else
- tcg_out_mov (s, 3, addr_reg2);
- tcg_out_mov (s, 4, addr_reg);
+ tcg_out_mov (s, TCG_TYPE_I32, 3, addr_reg2);
+ tcg_out_mov (s, TCG_TYPE_I32, 4, addr_reg);
#ifdef TCG_TARGET_CALL_ALIGN_ARGS
ir = 5;
#else
@@ -817,14 +817,14 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
| ME (31)));
break;
case 2:
- tcg_out_mov (s, ir, data_reg);
+ tcg_out_mov (s, TCG_TYPE_I32, ir, data_reg);
break;
case 3:
#ifdef TCG_TARGET_CALL_ALIGN_ARGS
ir = 5;
#endif
- tcg_out_mov (s, ir++, data_reg2);
- tcg_out_mov (s, ir, data_reg);
+ tcg_out_mov (s, TCG_TYPE_I32, ir++, data_reg2);
+ tcg_out_mov (s, TCG_TYPE_I32, ir, data_reg);
break;
}
ir++;
@@ -1526,7 +1526,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
if (args[0] == args[2] || args[0] == args[3]) {
tcg_out32 (s, MULLW | TAB (0, args[2], args[3]));
tcg_out32 (s, MULHWU | TAB (args[1], args[2], args[3]));
- tcg_out_mov (s, args[0], 0);
+ tcg_out_mov (s, TCG_TYPE_I32, args[0], 0);
}
else {
tcg_out32 (s, MULLW | TAB (args[0], args[2], args[3]));
@@ -1584,7 +1584,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
case INDEX_op_rotr_i32:
if (const_args[2]) {
if (!args[2]) {
- tcg_out_mov (s, args[0], args[1]);
+ tcg_out_mov (s, TCG_TYPE_I32, args[0], args[1]);
}
else {
tcg_out32 (s, RLWINM
@@ -1612,7 +1612,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
if (args[0] == args[3] || args[0] == args[5]) {
tcg_out32 (s, ADDC | TAB (0, args[2], args[4]));
tcg_out32 (s, ADDE | TAB (args[1], args[3], args[5]));
- tcg_out_mov (s, args[0], 0);
+ tcg_out_mov (s, TCG_TYPE_I32, args[0], 0);
}
else {
tcg_out32 (s, ADDC | TAB (args[0], args[2], args[4]));
@@ -1623,7 +1623,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
if (args[0] == args[3] || args[0] == args[5]) {
tcg_out32 (s, SUBFC | TAB (0, args[4], args[2]));
tcg_out32 (s, SUBFE | TAB (args[1], args[5], args[3]));
- tcg_out_mov (s, args[0], 0);
+ tcg_out_mov (s, TCG_TYPE_I32, args[0], 0);
}
else {
tcg_out32 (s, SUBFC | TAB (args[0], args[4], args[2]));
@@ -1782,7 +1782,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
);
if (!a0) {
- tcg_out_mov (s, args[0], a0);
+ tcg_out_mov (s, TCG_TYPE_I32, args[0], a0);
}
}
break;
diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
index 0b6c61f..2d436a5 100644
--- a/tcg/ppc64/tcg-target.c
+++ b/tcg/ppc64/tcg-target.c
@@ -435,7 +435,7 @@ static const uint32_t tcg_to_bc[10] = {
[TCG_COND_GTU] = BC | BI (7, CR_GT) | BO_COND_TRUE,
};
-static void tcg_out_mov (TCGContext *s, int ret, int arg)
+static void tcg_out_mov (TCGContext *s, TCGType type, int ret, int arg)
{
tcg_out32 (s, OR | SAB (arg, ret, arg));
}
@@ -644,7 +644,7 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
#endif
/* slow path */
- tcg_out_mov (s, 3, addr_reg);
+ tcg_out_mov (s, TCG_TYPE_I64, 3, addr_reg);
tcg_out_movi (s, TCG_TYPE_I64, 4, mem_index);
tcg_out_call (s, (tcg_target_long) qemu_ld_helpers[s_bits], 1);
@@ -664,7 +664,7 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
case 2:
case 3:
if (data_reg != 3)
- tcg_out_mov (s, data_reg, 3);
+ tcg_out_mov (s, TCG_TYPE_I64, data_reg, 3);
break;
}
label2_ptr = s->code_ptr;
@@ -746,7 +746,7 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
else tcg_out32 (s, LDX | TAB (data_reg, rbase, r0));
#else
if (bswap) {
- tcg_out_movi32 (s, 0, 4);
+ tcg_out_movi32 (s, TCG_TYPE_I64, 0, 4);
tcg_out32 (s, LWBRX | RT (data_reg) | RB (r0));
tcg_out32 (s, LWBRX | RT ( r1) | RA (r0));
tcg_out_rld (s, RLDIMI, data_reg, r1, 32, 0);
@@ -790,7 +790,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
#endif
/* slow path */
- tcg_out_mov (s, 3, addr_reg);
+ tcg_out_mov (s, TCG_TYPE_I64, 3, addr_reg);
tcg_out_rld (s, RLDICL, 4, data_reg, 0, 64 - (1 << (3 + opc)));
tcg_out_movi (s, TCG_TYPE_I64, 5, mem_index);
diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
index 265194a..06b6db3 100644
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -94,7 +94,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
/* gets called with KVM */
}
-static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
+static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
{
tcg_abort();
}
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index e460d44..a7e3eac 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -304,7 +304,7 @@ static void tcg_out_arithc(TCGContext *s, int rd, int rs1,
| (val2const ? INSN_IMM13(val2) : INSN_RS2(val2)));
}
-static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
+static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
{
tcg_out_arith(s, ret, arg, TCG_REG_G0, ARITH_OR);
}
@@ -795,7 +795,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
tcg_out32(s, 0);
/* mov (delay slot) */
- tcg_out_mov(s, arg0, addr_reg);
+ tcg_out_mov(s, TCG_TYPE_PTR, arg0, addr_reg);
/* mov */
tcg_out_movi(s, TCG_TYPE_I32, arg1, mem_index);
@@ -845,7 +845,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
case 3:
default:
/* mov */
- tcg_out_mov(s, data_reg, arg0);
+ tcg_out_mov(s, TCG_TYPE_PTR, data_reg, arg0);
break;
}
@@ -1007,10 +1007,10 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
tcg_out32(s, 0);
/* mov (delay slot) */
- tcg_out_mov(s, arg0, addr_reg);
+ tcg_out_mov(s, TCG_TYPE_PTR, arg0, addr_reg);
/* mov */
- tcg_out_mov(s, arg1, data_reg);
+ tcg_out_mov(s, TCG_TYPE_PTR, arg1, data_reg);
/* mov */
tcg_out_movi(s, TCG_TYPE_I32, arg2, mem_index);
diff --git a/tcg/tcg.c b/tcg/tcg.c
index beceff0..53da2c4 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -1544,7 +1544,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
}
if (ts->reg != reg) {
- tcg_out_mov(s, reg, ts->reg);
+ tcg_out_mov(s, ots->type, reg, ts->reg);
}
}
} else if (ts->val_type == TEMP_VAL_MEM) {
@@ -1649,7 +1649,7 @@ static void tcg_reg_alloc_op(TCGContext *s,
/* allocate a new register matching the constraint
and move the temporary register into it */
reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
- tcg_out_mov(s, reg, ts->reg);
+ tcg_out_mov(s, ts->type, reg, ts->reg);
}
new_args[i] = reg;
const_args[i] = 0;
@@ -1731,7 +1731,7 @@ static void tcg_reg_alloc_op(TCGContext *s,
ts = &s->temps[args[i]];
reg = new_args[i];
if (ts->fixed_reg && ts->reg != reg) {
- tcg_out_mov(s, ts->reg, reg);
+ tcg_out_mov(s, ts->type, ts->reg, reg);
}
}
}
@@ -1817,7 +1817,7 @@ static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
tcg_reg_free(s, reg);
if (ts->val_type == TEMP_VAL_REG) {
if (ts->reg != reg) {
- tcg_out_mov(s, reg, ts->reg);
+ tcg_out_mov(s, ts->type, reg, ts->reg);
}
} else if (ts->val_type == TEMP_VAL_MEM) {
tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
@@ -1846,7 +1846,7 @@ static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
reg = ts->reg;
if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) {
reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
- tcg_out_mov(s, reg, ts->reg);
+ tcg_out_mov(s, ts->type, reg, ts->reg);
}
func_arg = reg;
tcg_regset_set_reg(allocated_regs, reg);
@@ -1905,7 +1905,7 @@ static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
assert(s->reg_to_temp[reg] == -1);
if (ts->fixed_reg) {
if (ts->reg != reg) {
- tcg_out_mov(s, ts->reg, reg);
+ tcg_out_mov(s, ts->type, ts->reg, reg);
}
} else {
if (ts->val_type == TEMP_VAL_REG)
diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c
index 3892f75..5d2a2bc 100644
--- a/tcg/x86_64/tcg-target.c
+++ b/tcg/x86_64/tcg-target.c
@@ -354,9 +354,10 @@ static void tcg_out_modrm_offset2(TCGContext *s, int opc, int r, int rm,
}
#endif
-static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
+static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
{
- tcg_out_modrm(s, 0x8b | P_REXW, ret, arg);
+ int rexw = (type == TCG_TYPE_I64 ? P_REXW : 0);
+ tcg_out_modrm(s, 0x8b | rexw, ret, arg);
}
static inline void tcg_out_movi(TCGContext *s, TCGType type,
@@ -635,10 +636,11 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
case 2:
default:
/* movl */
- tcg_out_modrm(s, 0x8b, data_reg, TCG_REG_RAX);
+ tcg_out_mov(s, TCG_TYPE_I32, data_reg, TCG_REG_RAX);
break;
case 3:
- tcg_out_mov(s, data_reg, TCG_REG_RAX);
+ /* movq */
+ tcg_out_mov(s, TCG_TYPE_I64, data_reg, TCG_REG_RAX);
break;
}
@@ -814,11 +816,11 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
break;
case 2:
/* movl */
- tcg_out_modrm(s, 0x8b, TCG_REG_RSI, data_reg);
+ tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_RSI, data_reg);
break;
default:
case 3:
- tcg_out_mov(s, TCG_REG_RSI, data_reg);
+ tcg_out_mov(s, TCG_TYPE_I64, TCG_REG_RSI, data_reg);
break;
}
tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_RDX, mem_index);
@@ -863,7 +865,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
break;
case 1:
if (bswap) {
- tcg_out_modrm(s, 0x8b, r1, data_reg); /* movl */
+ tcg_out_mov(s, TCG_TYPE_I32, r1, data_reg);
tcg_out8(s, 0x66); /* rolw $8, %ecx */
tcg_out_modrm(s, 0xc1, 0, r1);
tcg_out8(s, 8);
@@ -875,7 +877,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
break;
case 2:
if (bswap) {
- tcg_out_modrm(s, 0x8b, r1, data_reg); /* movl */
+ tcg_out_mov(s, TCG_TYPE_I32, r1, data_reg);
/* bswap data_reg */
tcg_out_opc(s, (0xc8 + r1) | P_EXT, 0, r1, 0);
data_reg = r1;
@@ -885,7 +887,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
break;
case 3:
if (bswap) {
- tcg_out_mov(s, r1, data_reg);
+ tcg_out_mov(s, TCG_TYPE_I64, r1, data_reg);
/* bswap data_reg */
tcg_out_opc(s, (0xc8 + r1) | P_EXT | P_REXW, 0, r1, 0);
data_reg = r1;
--
1.7.0.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Qemu-devel] [PATCH 2/2] tcg: Use INDEX_op_qemu_ld32 for 32-bit results.
2010-05-03 23:30 [Qemu-devel] [PATCH 0/2] two tcg improvements Richard Henderson
2010-05-03 23:30 ` [Qemu-devel] [PATCH 1/2] tcg: Add TYPE parameter to tcg_out_mov Richard Henderson
@ 2010-05-03 23:30 ` Richard Henderson
2010-05-28 18:22 ` Aurelien Jarno
2010-05-17 18:31 ` [Qemu-devel] [PATCH 0/2] two tcg improvements Richard Henderson
2 siblings, 1 reply; 7+ messages in thread
From: Richard Henderson @ 2010-05-03 23:30 UTC (permalink / raw)
To: qemu-devel
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
tcg/tcg-op.h | 8 ++++++++
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index bafac2b..aa436de 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -2172,12 +2172,20 @@ static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
{
+#if TARGET_LONG_BITS == 32
+ tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32, ret, addr, mem_index);
+#else
tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32u, ret, addr, mem_index);
+#endif
}
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
{
+#if TARGET_LONG_BITS == 32
+ tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32, ret, addr, mem_index);
+#else
tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32s, ret, addr, mem_index);
+#endif
}
static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
--
1.7.0.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH 0/2] two tcg improvements
2010-05-03 23:30 [Qemu-devel] [PATCH 0/2] two tcg improvements Richard Henderson
2010-05-03 23:30 ` [Qemu-devel] [PATCH 1/2] tcg: Add TYPE parameter to tcg_out_mov Richard Henderson
2010-05-03 23:30 ` [Qemu-devel] [PATCH 2/2] tcg: Use INDEX_op_qemu_ld32 for 32-bit results Richard Henderson
@ 2010-05-17 18:31 ` Richard Henderson
2 siblings, 0 replies; 7+ messages in thread
From: Richard Henderson @ 2010-05-17 18:31 UTC (permalink / raw)
To: qemu-devel
Ping?
Update: The TYPE parameter to tcg_out_mov would be helpful
for the S390 port as well. The 32-bit LR is 2 bytes, while
the 64-bit LGR is 4 bytes.
r~
On 05/03/2010 04:30 PM, Richard Henderson wrote:
> The first patch allows the x86-64 port to avoid the REX.W prefix
> on moves, by allowing reg-reg moves to be typed just as reg-imm
> moves already are. This does require trivial changes to each port.
>
> The second patch fixes an oversight in commit
> 86feb1c860dc38e9c89e787c5210e8191800385e
> whereby I only modified the 32-bit host versions of the inline
> functions and not the 64-bit host versions. This is visible on
> x86-64 host with arm guest in that we unnecessarily emit some
> MOVSLQ insns instead of plain 32-bit MOV insns.
>
>
> r~
>
>
>
> Richard Henderson (2):
> tcg: Add TYPE parameter to tcg_out_mov.
> tcg: Use INDEX_op_qemu_ld32 for 32-bit results.
>
> tcg/arm/tcg-target.c | 2 +-
> tcg/hppa/tcg-target.c | 38 ++++++++++++++++++------------------
> tcg/i386/tcg-target.c | 49 ++++++++++++++++++++++++-----------------------
> tcg/ia64/tcg-target.c | 3 +-
> tcg/mips/tcg-target.c | 28 +++++++++++++-------------
> tcg/ppc/tcg-target.c | 48 +++++++++++++++++++++++-----------------------
> tcg/ppc64/tcg-target.c | 10 ++++----
> tcg/s390/tcg-target.c | 2 +-
> tcg/sparc/tcg-target.c | 10 ++++----
> tcg/tcg-op.h | 8 +++++++
> tcg/tcg.c | 12 +++++-----
> tcg/x86_64/tcg-target.c | 20 ++++++++++--------
> 12 files changed, 121 insertions(+), 109 deletions(-)
>
>
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH 1/2] tcg: Add TYPE parameter to tcg_out_mov.
2010-05-03 23:30 ` [Qemu-devel] [PATCH 1/2] tcg: Add TYPE parameter to tcg_out_mov Richard Henderson
@ 2010-05-28 18:21 ` Aurelien Jarno
2010-05-28 21:35 ` Richard Henderson
0 siblings, 1 reply; 7+ messages in thread
From: Aurelien Jarno @ 2010-05-28 18:21 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
On Mon, May 03, 2010 at 04:30:47PM -0700, Richard Henderson wrote:
> Mirror tcg_out_movi in having a TYPE parameter. This allows x86_64
> to perform the move at the proper width, which may elide a REX prefix.
> Update all targets to match.
This patch basically looks ok except a few comments below.
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
> tcg/arm/tcg-target.c | 2 +-
> tcg/hppa/tcg-target.c | 38 ++++++++++++++++++------------------
> tcg/i386/tcg-target.c | 49 ++++++++++++++++++++++++-----------------------
> tcg/ia64/tcg-target.c | 3 +-
> tcg/mips/tcg-target.c | 28 +++++++++++++-------------
> tcg/ppc/tcg-target.c | 48 +++++++++++++++++++++++-----------------------
> tcg/ppc64/tcg-target.c | 10 ++++----
> tcg/s390/tcg-target.c | 2 +-
> tcg/sparc/tcg-target.c | 10 ++++----
> tcg/tcg.c | 12 +++++-----
> tcg/x86_64/tcg-target.c | 20 ++++++++++--------
> 11 files changed, 113 insertions(+), 109 deletions(-)
>
> diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
> index 8d23f47..b3169a9 100644
> --- a/tcg/arm/tcg-target.c
> +++ b/tcg/arm/tcg-target.c
> @@ -1798,7 +1798,7 @@ static void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
> }
> }
>
> -static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
> +static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
> {
> tcg_out_dat_reg(s, COND_AL, ARITH_MOV, ret, 0, arg, SHIFT_IMM_LSL(0));
> }
> diff --git a/tcg/hppa/tcg-target.c b/tcg/hppa/tcg-target.c
> index cb605f1..012e486 100644
> --- a/tcg/hppa/tcg-target.c
> +++ b/tcg/hppa/tcg-target.c
> @@ -338,7 +338,7 @@ static int tcg_target_const_match(tcg_target_long val,
> /* supplied by libgcc */
> extern void *__canonicalize_funcptr_for_compare(void *);
>
> -static void tcg_out_mov(TCGContext *s, int ret, int arg)
> +static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
> {
> /* PA1.1 defines COPY as OR r,0,t; PA2.0 defines COPY as LDO 0(r),t
> but hppa-dis.c is unaware of this definition */
> @@ -498,7 +498,7 @@ static void tcg_out_ori(TCGContext *s, int ret, int arg, tcg_target_ulong m)
> }
> assert(bs1 == 32 || (1ul << bs1) > m);
>
> - tcg_out_mov(s, ret, arg);
> + tcg_out_mov(s, TCG_TYPE_I32, ret, arg);
> tcg_out32(s, INSN_DEPI | INSN_R2(ret) | INSN_IM5(-1)
> | INSN_SHDEP_CP(31 - bs0) | INSN_DEP_LEN(bs1 - bs0));
> }
> @@ -528,7 +528,7 @@ static void tcg_out_andi(TCGContext *s, int ret, int arg, tcg_target_ulong m)
> if (ls1 == 32) {
> tcg_out_extr(s, ret, arg, 0, ls0, 0);
> } else {
> - tcg_out_mov(s, ret, arg);
> + tcg_out_mov(s, TCG_TYPE_I32, ret, arg);
> tcg_out32(s, INSN_DEPI | INSN_R2(ret) | INSN_IM5(0)
> | INSN_SHDEP_CP(31 - ls0) | INSN_DEP_LEN(ls1 - ls0));
> }
> @@ -608,7 +608,7 @@ static void tcg_out_rotr(TCGContext *s, int ret, int arg, int creg)
> static void tcg_out_bswap16(TCGContext *s, int ret, int arg, int sign)
> {
> if (ret != arg) {
> - tcg_out_mov(s, ret, arg); /* arg = xxAB */
> + tcg_out_mov(s, TCG_TYPE_I32, ret, arg); /* arg = xxAB */
> }
> tcg_out_dep(s, ret, ret, 16, 8); /* ret = xBAB */
> tcg_out_extr(s, ret, ret, 8, 16, sign); /* ret = ..BA */
> @@ -638,7 +638,7 @@ static void tcg_out_call(TCGContext *s, void *func)
> tcg_out32(s, INSN_LDIL | INSN_R2(TCG_REG_R20) | reassemble_21(hi));
> tcg_out32(s, INSN_BLE_SR4 | INSN_R2(TCG_REG_R20)
> | reassemble_17(lo >> 2));
> - tcg_out_mov(s, TCG_REG_RP, TCG_REG_R31);
> + tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_RP, TCG_REG_R31);
> }
> }
>
> @@ -685,7 +685,7 @@ static void tcg_out_add2(TCGContext *s, int destl, int desth,
> }
> tcg_out_arith(s, desth, ah, bh, INSN_ADDC);
>
> - tcg_out_mov(s, destl, tmp);
> + tcg_out_mov(s, TCG_TYPE_I32, destl, tmp);
> }
>
> static void tcg_out_sub2(TCGContext *s, int destl, int desth, int al, int ah,
> @@ -706,7 +706,7 @@ static void tcg_out_sub2(TCGContext *s, int destl, int desth, int al, int ah,
> }
> tcg_out_arith(s, desth, ah, bh, INSN_SUBB);
>
> - tcg_out_mov(s, destl, tmp);
> + tcg_out_mov(s, TCG_TYPE_I32, destl, tmp);
> }
>
> static void tcg_out_branch(TCGContext *s, int label_index, int nul)
> @@ -869,7 +869,7 @@ static void tcg_out_setcond2(TCGContext *s, int cond, TCGArg ret,
> break;
> }
>
> - tcg_out_mov(s, ret, scratch);
> + tcg_out_mov(s, TCG_TYPE_I32, ret, scratch);
> }
>
> #if defined(CONFIG_SOFTMMU)
> @@ -1048,9 +1048,9 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc)
> tcg_out_label(s, lab1, (tcg_target_long)s->code_ptr);
>
> argreg = TCG_REG_R26;
> - tcg_out_mov(s, argreg--, addrlo_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, argreg--, addrlo_reg);
> if (TARGET_LONG_BITS == 64) {
> - tcg_out_mov(s, argreg--, addrhi_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, argreg--, addrhi_reg);
> }
> tcg_out_movi(s, TCG_TYPE_I32, argreg, mem_index);
>
> @@ -1071,11 +1071,11 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, int opc)
> break;
> case 2:
> case 2 | 4:
> - tcg_out_mov(s, datalo_reg, TCG_REG_RET0);
> + tcg_out_mov(s, TCG_TYPE_I32, datalo_reg, TCG_REG_RET0);
> break;
> case 3:
> - tcg_out_mov(s, datahi_reg, TCG_REG_RET0);
> - tcg_out_mov(s, datalo_reg, TCG_REG_RET1);
> + tcg_out_mov(s, TCG_TYPE_I32, datahi_reg, TCG_REG_RET0);
> + tcg_out_mov(s, TCG_TYPE_I32, datalo_reg, TCG_REG_RET1);
> break;
> default:
> tcg_abort();
> @@ -1167,9 +1167,9 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
> tcg_out_label(s, lab1, (tcg_target_long)s->code_ptr);
>
> argreg = TCG_REG_R26;
> - tcg_out_mov(s, argreg--, addrlo_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, argreg--, addrlo_reg);
> if (TARGET_LONG_BITS == 64) {
> - tcg_out_mov(s, argreg--, addrhi_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, argreg--, addrhi_reg);
> }
>
> switch(opc) {
> @@ -1182,7 +1182,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
> tcg_out_movi(s, TCG_TYPE_I32, argreg, mem_index);
> break;
> case 2:
> - tcg_out_mov(s, argreg--, datalo_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, argreg--, datalo_reg);
> tcg_out_movi(s, TCG_TYPE_I32, argreg, mem_index);
> break;
> case 3:
> @@ -1196,8 +1196,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, int opc)
> argreg = TCG_REG_R20;
> tcg_out_movi(s, TCG_TYPE_I32, argreg, mem_index);
> }
> - tcg_out_mov(s, TCG_REG_R23, datahi_reg);
> - tcg_out_mov(s, TCG_REG_R24, datalo_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R23, datahi_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R24, datalo_reg);
> tcg_out_st(s, TCG_TYPE_I32, argreg, TCG_REG_SP,
> TCG_TARGET_CALL_STACK_OFFSET - 4);
> break;
> @@ -1638,7 +1638,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
>
> /* Jump to TB, and adjust R18 to be the return address. */
> tcg_out32(s, INSN_BLE_SR4 | INSN_R2(TCG_REG_R26));
> - tcg_out_mov(s, TCG_REG_R18, TCG_REG_R31);
> + tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_R18, TCG_REG_R31);
>
> /* Restore callee saved registers. */
> tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_RP, TCG_REG_SP, -frame_size - 20);
> diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
> index e684b33..4e1bd74 100644
> --- a/tcg/i386/tcg-target.c
> +++ b/tcg/i386/tcg-target.c
> @@ -251,10 +251,11 @@ static inline void tcg_out_modrm_offset(TCGContext *s, int opc, int r, int rm,
> }
> }
>
> -static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
> +static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
> {
> - if (arg != ret)
> + if (arg != ret) {
> tcg_out_modrm(s, 0x8b, ret, arg);
> + }
> }
>
> static inline void tcg_out_movi(TCGContext *s, TCGType type,
> @@ -573,9 +574,9 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
> r1 = TCG_REG_EDX;
>
> #if defined(CONFIG_SOFTMMU)
> - tcg_out_mov(s, r1, addr_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, r1, addr_reg);
>
> - tcg_out_mov(s, r0, addr_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, r0, addr_reg);
>
> tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
> tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
> @@ -594,7 +595,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
> /* cmp 0(r1), r0 */
> tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
>
> - tcg_out_mov(s, r0, addr_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, r0, addr_reg);
>
> #if TARGET_LONG_BITS == 32
> /* je label1 */
> @@ -623,7 +624,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
> #if TARGET_LONG_BITS == 32
> tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_EDX, mem_index);
> #else
> - tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
> + tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_EDX, addr_reg2);
> tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
> #endif
> tcg_out8(s, 0xe8);
> @@ -649,15 +650,15 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
> break;
> case 2:
> default:
> - tcg_out_mov(s, data_reg, TCG_REG_EAX);
> + tcg_out_mov(s, TCG_TYPE_I32, data_reg, TCG_REG_EAX);
> break;
> case 3:
> if (data_reg == TCG_REG_EDX) {
> tcg_out_opc(s, 0x90 + TCG_REG_EDX); /* xchg %edx, %eax */
> - tcg_out_mov(s, data_reg2, TCG_REG_EAX);
> + tcg_out_mov(s, TCG_TYPE_I32, data_reg2, TCG_REG_EAX);
> } else {
> - tcg_out_mov(s, data_reg, TCG_REG_EAX);
> - tcg_out_mov(s, data_reg2, TCG_REG_EDX);
> + tcg_out_mov(s, TCG_TYPE_I32, data_reg, TCG_REG_EAX);
> + tcg_out_mov(s, TCG_TYPE_I32, data_reg2, TCG_REG_EDX);
> }
> break;
> }
> @@ -728,7 +729,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
> r1 = TCG_REG_EDX;
> if (r1 == data_reg)
> r1 = TCG_REG_EAX;
> - tcg_out_mov(s, r1, r0);
> + tcg_out_mov(s, TCG_TYPE_I32, r1, r0);
> r0 = r1;
> }
> if (!bswap) {
> @@ -785,9 +786,9 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> r1 = TCG_REG_EDX;
>
> #if defined(CONFIG_SOFTMMU)
> - tcg_out_mov(s, r1, addr_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, r1, addr_reg);
>
> - tcg_out_mov(s, r0, addr_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, r0, addr_reg);
>
> tcg_out_modrm(s, 0xc1, 5, r1); /* shr $x, r1 */
> tcg_out8(s, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
> @@ -806,7 +807,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> /* cmp 0(r1), r0 */
> tcg_out_modrm_offset(s, 0x3b, r0, r1, 0);
>
> - tcg_out_mov(s, r0, addr_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, r0, addr_reg);
>
> #if TARGET_LONG_BITS == 32
> /* je label1 */
> @@ -834,8 +835,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> /* XXX: move that code at the end of the TB */
> #if TARGET_LONG_BITS == 32
> if (opc == 3) {
> - tcg_out_mov(s, TCG_REG_EDX, data_reg);
> - tcg_out_mov(s, TCG_REG_ECX, data_reg2);
> + tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_EDX, data_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_ECX, data_reg2);
> tcg_out8(s, 0x6a); /* push Ib */
> tcg_out8(s, mem_index);
> tcg_out8(s, 0xe8);
> @@ -853,7 +854,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_EDX, data_reg);
> break;
> case 2:
> - tcg_out_mov(s, TCG_REG_EDX, data_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_EDX, data_reg);
> break;
> }
> tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_ECX, mem_index);
> @@ -863,7 +864,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> }
> #else
> if (opc == 3) {
> - tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
> + tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_EDX, addr_reg2);
> tcg_out8(s, 0x6a); /* push Ib */
> tcg_out8(s, mem_index);
> tcg_out_opc(s, 0x50 + data_reg2); /* push */
> @@ -873,7 +874,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> (tcg_target_long)s->code_ptr - 4);
> tcg_out_addi(s, TCG_REG_ESP, 12);
> } else {
> - tcg_out_mov(s, TCG_REG_EDX, addr_reg2);
> + tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_EDX, addr_reg2);
> switch(opc) {
> case 0:
> /* movzbl */
> @@ -884,7 +885,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> tcg_out_modrm(s, 0xb7 | P_EXT, TCG_REG_ECX, data_reg);
> break;
> case 2:
> - tcg_out_mov(s, TCG_REG_ECX, data_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_ECX, data_reg);
> break;
> }
> tcg_out8(s, 0x6a); /* push Ib */
> @@ -923,7 +924,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> break;
> case 1:
> if (bswap) {
> - tcg_out_mov(s, r1, data_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, r1, data_reg);
> tcg_out8(s, 0x66); /* rolw $8, %ecx */
> tcg_out_modrm(s, 0xc1, 0, r1);
> tcg_out8(s, 8);
> @@ -935,7 +936,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> break;
> case 2:
> if (bswap) {
> - tcg_out_mov(s, r1, data_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, r1, data_reg);
> /* bswap data_reg */
> tcg_out_opc(s, (0xc8 + r1) | P_EXT);
> data_reg = r1;
> @@ -945,11 +946,11 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> break;
> case 3:
> if (bswap) {
> - tcg_out_mov(s, r1, data_reg2);
> + tcg_out_mov(s, TCG_TYPE_I32, r1, data_reg2);
> /* bswap data_reg */
> tcg_out_opc(s, (0xc8 + r1) | P_EXT);
> tcg_out_modrm_offset(s, 0x89, r1, r0, GUEST_BASE);
> - tcg_out_mov(s, r1, data_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, r1, data_reg);
> /* bswap data_reg */
> tcg_out_opc(s, (0xc8 + r1) | P_EXT);
> tcg_out_modrm_offset(s, 0x89, r1, r0, GUEST_BASE + 4);
> diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
> index 6e69ef4..401dfec 100644
> --- a/tcg/ia64/tcg-target.c
> +++ b/tcg/ia64/tcg-target.c
> @@ -821,7 +821,8 @@ static inline void tcg_out_bundle(TCGContext *s, int template,
> s->code_ptr += 16;
> }
>
> -static inline void tcg_out_mov(TCGContext *s, TCGArg ret, TCGArg arg)
> +static inline void tcg_out_mov(TCGContext *s, TCGType type,
> + TCGArg ret, TCGArg arg)
> {
> tcg_out_bundle(s, mmI,
> tcg_opc_m48(TCG_REG_P0, OPC_NOP_M48, 0),
> diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
> index f38eb28..8d9c12f 100644
> --- a/tcg/mips/tcg-target.c
> +++ b/tcg/mips/tcg-target.c
> @@ -377,7 +377,7 @@ static inline void tcg_out_nop(TCGContext *s)
> tcg_out32(s, 0);
> }
>
> -static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
> +static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
> {
> tcg_out_opc_reg(s, OPC_ADDU, ret, arg, TCG_REG_ZERO);
> }
> @@ -849,9 +849,9 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
>
> /* slow path */
> sp_args = TCG_REG_A0;
> - tcg_out_mov(s, sp_args++, addr_reg1);
> + tcg_out_mov(s, TCG_TYPE_I32, sp_args++, addr_reg1);
> # if TARGET_LONG_BITS == 64
> - tcg_out_mov(s, sp_args++, addr_reg2);
> + tcg_out_mov(s, TCG_TYPE_I32, sp_args++, addr_reg2);
> # endif
> tcg_out_movi(s, TCG_TYPE_I32, sp_args++, mem_index);
> tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_T9, (tcg_target_long)qemu_ld_helpers[s_bits]);
> @@ -872,11 +872,11 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
> tcg_out_ext16s(s, data_reg1, TCG_REG_V0);
> break;
> case 2:
> - tcg_out_mov(s, data_reg1, TCG_REG_V0);
> + tcg_out_mov(s, TCG_TYPE_I32, data_reg1, TCG_REG_V0);
> break;
> case 3:
> - tcg_out_mov(s, data_reg2, TCG_REG_V1);
> - tcg_out_mov(s, data_reg1, TCG_REG_V0);
> + tcg_out_mov(s, TCG_TYPE_I32, data_reg2, TCG_REG_V1);
> + tcg_out_mov(s, TCG_TYPE_I32, data_reg1, TCG_REG_V0);
> break;
> default:
> tcg_abort();
> @@ -1035,9 +1035,9 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
>
> /* slow path */
> sp_args = TCG_REG_A0;
> - tcg_out_mov(s, sp_args++, addr_reg1);
> + tcg_out_mov(s, TCG_TYPE_I32, sp_args++, addr_reg1);
> # if TARGET_LONG_BITS == 64
> - tcg_out_mov(s, sp_args++, addr_reg2);
> + tcg_out_mov(s, TCG_TYPE_I32, sp_args++, addr_reg2);
> # endif
> switch(opc) {
> case 0:
> @@ -1047,12 +1047,12 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> tcg_out_opc_imm(s, OPC_ANDI, sp_args++, data_reg1, 0xffff);
> break;
> case 2:
> - tcg_out_mov(s, sp_args++, data_reg1);
> + tcg_out_mov(s, TCG_TYPE_I32, sp_args++, data_reg1);
> break;
> case 3:
> sp_args = (sp_args + 1) & ~1;
> - tcg_out_mov(s, sp_args++, data_reg1);
> - tcg_out_mov(s, sp_args++, data_reg2);
> + tcg_out_mov(s, TCG_TYPE_I32, sp_args++, data_reg1);
> + tcg_out_mov(s, TCG_TYPE_I32, sp_args++, data_reg2);
> break;
> default:
> tcg_abort();
> @@ -1165,7 +1165,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
> break;
>
> case INDEX_op_mov_i32:
> - tcg_out_mov(s, args[0], args[1]);
> + tcg_out_mov(s, TCG_TYPE_I32, args[0], args[1]);
> break;
> case INDEX_op_movi_i32:
> tcg_out_movi(s, TCG_TYPE_I32, args[0], args[1]);
> @@ -1216,7 +1216,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
> tcg_out_opc_reg(s, OPC_ADDU, args[1], args[3], args[5]);
> }
> tcg_out_opc_reg(s, OPC_ADDU, args[1], args[1], TCG_REG_T0);
> - tcg_out_mov(s, args[0], TCG_REG_AT);
> + tcg_out_mov(s, TCG_TYPE_I32, args[0], TCG_REG_AT);
> break;
> case INDEX_op_sub_i32:
> if (const_args[2]) {
> @@ -1238,7 +1238,7 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
> tcg_out_opc_reg(s, OPC_SUBU, args[1], args[3], args[5]);
> }
> tcg_out_opc_reg(s, OPC_SUBU, args[1], args[1], TCG_REG_T0);
> - tcg_out_mov(s, args[0], TCG_REG_AT);
> + tcg_out_mov(s, TCG_TYPE_I32, args[0], TCG_REG_AT);
> break;
> case INDEX_op_mul_i32:
> tcg_out_opc_reg(s, OPC_MULT, 0, args[1], args[2]);
> diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c
> index 2b85928..ce078e4 100644
> --- a/tcg/ppc/tcg-target.c
> +++ b/tcg/ppc/tcg-target.c
> @@ -437,7 +437,7 @@ static const uint32_t tcg_to_bc[10] = {
> [TCG_COND_GTU] = BC | BI (7, CR_GT) | BO_COND_TRUE,
> };
>
> -static void tcg_out_mov(TCGContext *s, int ret, int arg)
> +static void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
> {
> tcg_out32 (s, OR | SAB (arg, ret, arg));
> }
> @@ -591,11 +591,11 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
>
> /* slow path */
> #if TARGET_LONG_BITS == 32
> - tcg_out_mov (s, 3, addr_reg);
> + tcg_out_mov (s, TCG_TYPE_I32, 3, addr_reg);
> tcg_out_movi (s, TCG_TYPE_I32, 4, mem_index);
> #else
> - tcg_out_mov (s, 3, addr_reg2);
> - tcg_out_mov (s, 4, addr_reg);
> + tcg_out_mov (s, TCG_TYPE_I32, 3, addr_reg2);
> + tcg_out_mov (s, TCG_TYPE_I32, 4, addr_reg);
> tcg_out_movi (s, TCG_TYPE_I32, 5, mem_index);
> #endif
>
> @@ -611,23 +611,23 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
> case 1:
> case 2:
> if (data_reg != 3)
> - tcg_out_mov (s, data_reg, 3);
> + tcg_out_mov (s, TCG_TYPE_I32, data_reg, 3);
> break;
> case 3:
> if (data_reg == 3) {
> if (data_reg2 == 4) {
> - tcg_out_mov (s, 0, 4);
> - tcg_out_mov (s, 4, 3);
> - tcg_out_mov (s, 3, 0);
> + tcg_out_mov (s, TCG_TYPE_I32, 0, 4);
> + tcg_out_mov (s, TCG_TYPE_I32, 4, 3);
> + tcg_out_mov (s, TCG_TYPE_I32, 3, 0);
> }
> else {
> - tcg_out_mov (s, data_reg2, 3);
> - tcg_out_mov (s, 3, 4);
> + tcg_out_mov (s, TCG_TYPE_I32, data_reg2, 3);
> + tcg_out_mov (s, TCG_TYPE_I32, 3, 4);
> }
> }
> else {
> - if (data_reg != 4) tcg_out_mov (s, data_reg, 4);
> - if (data_reg2 != 3) tcg_out_mov (s, data_reg2, 3);
> + if (data_reg != 4) tcg_out_mov (s, TCG_TYPE_I32, data_reg, 4);
> + if (data_reg2 != 3) tcg_out_mov (s, TCG_TYPE_I32, data_reg2, 3);
> }
> break;
> }
> @@ -705,7 +705,7 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
> if (r0 == data_reg2) {
> tcg_out32 (s, LWZ | RT (0) | RA (r0));
> tcg_out32 (s, LWZ | RT (data_reg) | RA (r0) | 4);
> - tcg_out_mov (s, data_reg2, 0);
> + tcg_out_mov (s, TCG_TYPE_I32, data_reg2, 0);
> }
> else {
> tcg_out32 (s, LWZ | RT (data_reg2) | RA (r0));
> @@ -787,11 +787,11 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
>
> /* slow path */
> #if TARGET_LONG_BITS == 32
> - tcg_out_mov (s, 3, addr_reg);
> + tcg_out_mov (s, TCG_TYPE_I32, 3, addr_reg);
> ir = 4;
> #else
> - tcg_out_mov (s, 3, addr_reg2);
> - tcg_out_mov (s, 4, addr_reg);
> + tcg_out_mov (s, TCG_TYPE_I32, 3, addr_reg2);
> + tcg_out_mov (s, TCG_TYPE_I32, 4, addr_reg);
> #ifdef TCG_TARGET_CALL_ALIGN_ARGS
> ir = 5;
> #else
> @@ -817,14 +817,14 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
> | ME (31)));
> break;
> case 2:
> - tcg_out_mov (s, ir, data_reg);
> + tcg_out_mov (s, TCG_TYPE_I32, ir, data_reg);
> break;
> case 3:
> #ifdef TCG_TARGET_CALL_ALIGN_ARGS
> ir = 5;
> #endif
> - tcg_out_mov (s, ir++, data_reg2);
> - tcg_out_mov (s, ir, data_reg);
> + tcg_out_mov (s, TCG_TYPE_I32, ir++, data_reg2);
> + tcg_out_mov (s, TCG_TYPE_I32, ir, data_reg);
> break;
> }
> ir++;
> @@ -1526,7 +1526,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
> if (args[0] == args[2] || args[0] == args[3]) {
> tcg_out32 (s, MULLW | TAB (0, args[2], args[3]));
> tcg_out32 (s, MULHWU | TAB (args[1], args[2], args[3]));
> - tcg_out_mov (s, args[0], 0);
> + tcg_out_mov (s, TCG_TYPE_I32, args[0], 0);
> }
> else {
> tcg_out32 (s, MULLW | TAB (args[0], args[2], args[3]));
> @@ -1584,7 +1584,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
> case INDEX_op_rotr_i32:
> if (const_args[2]) {
> if (!args[2]) {
> - tcg_out_mov (s, args[0], args[1]);
> + tcg_out_mov (s, TCG_TYPE_I32, args[0], args[1]);
> }
> else {
> tcg_out32 (s, RLWINM
> @@ -1612,7 +1612,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
> if (args[0] == args[3] || args[0] == args[5]) {
> tcg_out32 (s, ADDC | TAB (0, args[2], args[4]));
> tcg_out32 (s, ADDE | TAB (args[1], args[3], args[5]));
> - tcg_out_mov (s, args[0], 0);
> + tcg_out_mov (s, TCG_TYPE_I32, args[0], 0);
> }
> else {
> tcg_out32 (s, ADDC | TAB (args[0], args[2], args[4]));
> @@ -1623,7 +1623,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
> if (args[0] == args[3] || args[0] == args[5]) {
> tcg_out32 (s, SUBFC | TAB (0, args[4], args[2]));
> tcg_out32 (s, SUBFE | TAB (args[1], args[5], args[3]));
> - tcg_out_mov (s, args[0], 0);
> + tcg_out_mov (s, TCG_TYPE_I32, args[0], 0);
> }
> else {
> tcg_out32 (s, SUBFC | TAB (args[0], args[4], args[2]));
> @@ -1782,7 +1782,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
> );
>
> if (!a0) {
> - tcg_out_mov (s, args[0], a0);
> + tcg_out_mov (s, TCG_TYPE_I32, args[0], a0);
> }
> }
> break;
> diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c
> index 0b6c61f..2d436a5 100644
> --- a/tcg/ppc64/tcg-target.c
> +++ b/tcg/ppc64/tcg-target.c
> @@ -435,7 +435,7 @@ static const uint32_t tcg_to_bc[10] = {
> [TCG_COND_GTU] = BC | BI (7, CR_GT) | BO_COND_TRUE,
> };
>
> -static void tcg_out_mov (TCGContext *s, int ret, int arg)
> +static void tcg_out_mov (TCGContext *s, TCGType type, int ret, int arg)
> {
> tcg_out32 (s, OR | SAB (arg, ret, arg));
> }
> @@ -644,7 +644,7 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
> #endif
>
> /* slow path */
> - tcg_out_mov (s, 3, addr_reg);
> + tcg_out_mov (s, TCG_TYPE_I64, 3, addr_reg);
> tcg_out_movi (s, TCG_TYPE_I64, 4, mem_index);
>
> tcg_out_call (s, (tcg_target_long) qemu_ld_helpers[s_bits], 1);
> @@ -664,7 +664,7 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
> case 2:
> case 3:
> if (data_reg != 3)
> - tcg_out_mov (s, data_reg, 3);
> + tcg_out_mov (s, TCG_TYPE_I64, data_reg, 3);
> break;
> }
> label2_ptr = s->code_ptr;
> @@ -746,7 +746,7 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
> else tcg_out32 (s, LDX | TAB (data_reg, rbase, r0));
> #else
> if (bswap) {
> - tcg_out_movi32 (s, 0, 4);
> + tcg_out_movi32 (s, TCG_TYPE_I64, 0, 4);
> tcg_out32 (s, LWBRX | RT (data_reg) | RB (r0));
> tcg_out32 (s, LWBRX | RT ( r1) | RA (r0));
> tcg_out_rld (s, RLDIMI, data_reg, r1, 32, 0);
> @@ -790,7 +790,7 @@ static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
> #endif
>
> /* slow path */
> - tcg_out_mov (s, 3, addr_reg);
> + tcg_out_mov (s, TCG_TYPE_I64, 3, addr_reg);
> tcg_out_rld (s, RLDICL, 4, data_reg, 0, 64 - (1 << (3 + opc)));
> tcg_out_movi (s, TCG_TYPE_I64, 5, mem_index);
>
> diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
> index 265194a..06b6db3 100644
> --- a/tcg/s390/tcg-target.c
> +++ b/tcg/s390/tcg-target.c
> @@ -94,7 +94,7 @@ void tcg_target_qemu_prologue(TCGContext *s)
> /* gets called with KVM */
> }
>
> -static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
> +static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
> {
> tcg_abort();
> }
> diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
> index e460d44..a7e3eac 100644
> --- a/tcg/sparc/tcg-target.c
> +++ b/tcg/sparc/tcg-target.c
> @@ -304,7 +304,7 @@ static void tcg_out_arithc(TCGContext *s, int rd, int rs1,
> | (val2const ? INSN_IMM13(val2) : INSN_RS2(val2)));
> }
>
> -static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
> +static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
> {
> tcg_out_arith(s, ret, arg, TCG_REG_G0, ARITH_OR);
> }
> @@ -795,7 +795,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
> tcg_out32(s, 0);
>
> /* mov (delay slot) */
> - tcg_out_mov(s, arg0, addr_reg);
> + tcg_out_mov(s, TCG_TYPE_PTR, arg0, addr_reg);
>
> /* mov */
> tcg_out_movi(s, TCG_TYPE_I32, arg1, mem_index);
> @@ -845,7 +845,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
> case 3:
> default:
> /* mov */
> - tcg_out_mov(s, data_reg, arg0);
> + tcg_out_mov(s, TCG_TYPE_PTR, data_reg, arg0);
Is it something correct? This refers to a data register according to the
name of the variable.
> break;
> }
>
> @@ -1007,10 +1007,10 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> tcg_out32(s, 0);
>
> /* mov (delay slot) */
> - tcg_out_mov(s, arg0, addr_reg);
> + tcg_out_mov(s, TCG_TYPE_PTR, arg0, addr_reg);
Here this looks correct
> /* mov */
> - tcg_out_mov(s, arg1, data_reg);
> + tcg_out_mov(s, TCG_TYPE_PTR, arg1, data_reg);
Here not.
I am also a bit puzzled that TCG_TYPE_PTR only appears on the sparc
target, though I haven't looked at the code, it might be normal.
> /* mov */
> tcg_out_movi(s, TCG_TYPE_I32, arg2, mem_index);
> diff --git a/tcg/tcg.c b/tcg/tcg.c
> index beceff0..53da2c4 100644
> --- a/tcg/tcg.c
> +++ b/tcg/tcg.c
> @@ -1544,7 +1544,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
> reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
> }
> if (ts->reg != reg) {
> - tcg_out_mov(s, reg, ts->reg);
> + tcg_out_mov(s, ots->type, reg, ts->reg);
> }
> }
> } else if (ts->val_type == TEMP_VAL_MEM) {
> @@ -1649,7 +1649,7 @@ static void tcg_reg_alloc_op(TCGContext *s,
> /* allocate a new register matching the constraint
> and move the temporary register into it */
> reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
> - tcg_out_mov(s, reg, ts->reg);
> + tcg_out_mov(s, ts->type, reg, ts->reg);
> }
> new_args[i] = reg;
> const_args[i] = 0;
> @@ -1731,7 +1731,7 @@ static void tcg_reg_alloc_op(TCGContext *s,
> ts = &s->temps[args[i]];
> reg = new_args[i];
> if (ts->fixed_reg && ts->reg != reg) {
> - tcg_out_mov(s, ts->reg, reg);
> + tcg_out_mov(s, ts->type, ts->reg, reg);
> }
> }
> }
> @@ -1817,7 +1817,7 @@ static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
> tcg_reg_free(s, reg);
> if (ts->val_type == TEMP_VAL_REG) {
> if (ts->reg != reg) {
> - tcg_out_mov(s, reg, ts->reg);
> + tcg_out_mov(s, ts->type, reg, ts->reg);
> }
> } else if (ts->val_type == TEMP_VAL_MEM) {
> tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
> @@ -1846,7 +1846,7 @@ static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
> reg = ts->reg;
> if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) {
> reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
> - tcg_out_mov(s, reg, ts->reg);
> + tcg_out_mov(s, ts->type, reg, ts->reg);
> }
> func_arg = reg;
> tcg_regset_set_reg(allocated_regs, reg);
> @@ -1905,7 +1905,7 @@ static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
> assert(s->reg_to_temp[reg] == -1);
> if (ts->fixed_reg) {
> if (ts->reg != reg) {
> - tcg_out_mov(s, ts->reg, reg);
> + tcg_out_mov(s, ts->type, ts->reg, reg);
> }
> } else {
> if (ts->val_type == TEMP_VAL_REG)
> diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c
> index 3892f75..5d2a2bc 100644
> --- a/tcg/x86_64/tcg-target.c
> +++ b/tcg/x86_64/tcg-target.c
> @@ -354,9 +354,10 @@ static void tcg_out_modrm_offset2(TCGContext *s, int opc, int r, int rm,
> }
> #endif
>
> -static inline void tcg_out_mov(TCGContext *s, int ret, int arg)
> +static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
> {
> - tcg_out_modrm(s, 0x8b | P_REXW, ret, arg);
> + int rexw = (type == TCG_TYPE_I64 ? P_REXW : 0);
> + tcg_out_modrm(s, 0x8b | rexw, ret, arg);
> }
>
> static inline void tcg_out_movi(TCGContext *s, TCGType type,
> @@ -635,10 +636,11 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
> case 2:
> default:
> /* movl */
> - tcg_out_modrm(s, 0x8b, data_reg, TCG_REG_RAX);
> + tcg_out_mov(s, TCG_TYPE_I32, data_reg, TCG_REG_RAX);
> break;
> case 3:
> - tcg_out_mov(s, data_reg, TCG_REG_RAX);
> + /* movq */
> + tcg_out_mov(s, TCG_TYPE_I64, data_reg, TCG_REG_RAX);
> break;
> }
>
> @@ -814,11 +816,11 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> break;
> case 2:
> /* movl */
> - tcg_out_modrm(s, 0x8b, TCG_REG_RSI, data_reg);
> + tcg_out_mov(s, TCG_TYPE_I32, TCG_REG_RSI, data_reg);
> break;
> default:
> case 3:
> - tcg_out_mov(s, TCG_REG_RSI, data_reg);
> + tcg_out_mov(s, TCG_TYPE_I64, TCG_REG_RSI, data_reg);
> break;
> }
> tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_RDX, mem_index);
> @@ -863,7 +865,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> break;
> case 1:
> if (bswap) {
> - tcg_out_modrm(s, 0x8b, r1, data_reg); /* movl */
> + tcg_out_mov(s, TCG_TYPE_I32, r1, data_reg);
> tcg_out8(s, 0x66); /* rolw $8, %ecx */
> tcg_out_modrm(s, 0xc1, 0, r1);
> tcg_out8(s, 8);
> @@ -875,7 +877,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> break;
> case 2:
> if (bswap) {
> - tcg_out_modrm(s, 0x8b, r1, data_reg); /* movl */
> + tcg_out_mov(s, TCG_TYPE_I32, r1, data_reg);
> /* bswap data_reg */
> tcg_out_opc(s, (0xc8 + r1) | P_EXT, 0, r1, 0);
> data_reg = r1;
> @@ -885,7 +887,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
> break;
> case 3:
> if (bswap) {
> - tcg_out_mov(s, r1, data_reg);
> + tcg_out_mov(s, TCG_TYPE_I64, r1, data_reg);
> /* bswap data_reg */
> tcg_out_opc(s, (0xc8 + r1) | P_EXT | P_REXW, 0, r1, 0);
> data_reg = r1;
> --
> 1.7.0.1
>
>
>
>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH 2/2] tcg: Use INDEX_op_qemu_ld32 for 32-bit results.
2010-05-03 23:30 ` [Qemu-devel] [PATCH 2/2] tcg: Use INDEX_op_qemu_ld32 for 32-bit results Richard Henderson
@ 2010-05-28 18:22 ` Aurelien Jarno
0 siblings, 0 replies; 7+ messages in thread
From: Aurelien Jarno @ 2010-05-28 18:22 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
On Mon, May 03, 2010 at 04:30:48PM -0700, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <rth@twiddle.net>
Thanks, applied.
> ---
> tcg/tcg-op.h | 8 ++++++++
> 1 files changed, 8 insertions(+), 0 deletions(-)
>
> diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
> index bafac2b..aa436de 100644
> --- a/tcg/tcg-op.h
> +++ b/tcg/tcg-op.h
> @@ -2172,12 +2172,20 @@ static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
>
> static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
> {
> +#if TARGET_LONG_BITS == 32
> + tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32, ret, addr, mem_index);
> +#else
> tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32u, ret, addr, mem_index);
> +#endif
> }
>
> static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
> {
> +#if TARGET_LONG_BITS == 32
> + tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32, ret, addr, mem_index);
> +#else
> tcg_gen_qemu_ldst_op(INDEX_op_qemu_ld32s, ret, addr, mem_index);
> +#endif
> }
>
> static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
> --
> 1.7.0.1
>
>
>
>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [PATCH 1/2] tcg: Add TYPE parameter to tcg_out_mov.
2010-05-28 18:21 ` Aurelien Jarno
@ 2010-05-28 21:35 ` Richard Henderson
0 siblings, 0 replies; 7+ messages in thread
From: Richard Henderson @ 2010-05-28 21:35 UTC (permalink / raw)
To: Aurelien Jarno; +Cc: qemu-devel
On 05/28/2010 11:21 AM, Aurelien Jarno wrote:
>> + tcg_out_mov(s, TCG_TYPE_PTR, data_reg, arg0);
>
> Is it something correct? This refers to a data register according to the
> name of the variable.
>
>> break;
>> }
>>
>> @@ -1007,10 +1007,10 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
>> tcg_out32(s, 0);
>>
>> /* mov (delay slot) */
>> - tcg_out_mov(s, arg0, addr_reg);
>> + tcg_out_mov(s, TCG_TYPE_PTR, arg0, addr_reg);
>
> Here this looks correct
>
>> /* mov */
>> - tcg_out_mov(s, arg1, data_reg);
>> + tcg_out_mov(s, TCG_TYPE_PTR, arg1, data_reg);
>
> Here not.
>
> I am also a bit puzzled that TCG_TYPE_PTR only appears on the sparc
> target, though I haven't looked at the code, it might be normal.
Most targets I didn't bother to figure out whether the item is or isn't a pointer.
I.e. on arm/hppa/ppc/mips targets I simply always used _I32, and on ppc64 target I
always used _I64.
Sparc is, at present, the only target that supports multiple register sizes.
The only TCG_TYPE_FOO we have that corresponds to the current register size
is TCG_TYPE_PTR; there isn't a TCG_TYPE_REG or whatever that documents that
we want to move an object of the native register size.
Not that it *really* matters for sparc, since there is one common move insn
for both 32-bit and 64-bit mode, but I thought _PTR was slightly more correct
than using either _I32 or _I64.
r~
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2010-05-28 21:35 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2010-05-03 23:30 [Qemu-devel] [PATCH 0/2] two tcg improvements Richard Henderson
2010-05-03 23:30 ` [Qemu-devel] [PATCH 1/2] tcg: Add TYPE parameter to tcg_out_mov Richard Henderson
2010-05-28 18:21 ` Aurelien Jarno
2010-05-28 21:35 ` Richard Henderson
2010-05-03 23:30 ` [Qemu-devel] [PATCH 2/2] tcg: Use INDEX_op_qemu_ld32 for 32-bit results Richard Henderson
2010-05-28 18:22 ` Aurelien Jarno
2010-05-17 18:31 ` [Qemu-devel] [PATCH 0/2] two tcg improvements Richard Henderson
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