* [PATCH 1/7] ARM: S5PC100: Move external interrupt defines
@ 2010-06-03 5:01 ` Joonyoung Shim
0 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 5:01 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves external interrupt defines from gpio.h to regs-gpio.h
for consistency with s5pv210.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pc100/include/mach/gpio.h | 7 -------
arch/arm/mach-s5pc100/include/mach/regs-gpio.h | 7 +++++++
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-s5pc100/include/mach/gpio.h b/arch/arm/mach-s5pc100/include/mach/gpio.h
index 71ae1f5..29a8a12 100644
--- a/arch/arm/mach-s5pc100/include/mach/gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/gpio.h
@@ -146,13 +146,6 @@ enum s5p_gpio_number {
/* define the number of gpios we need to the one after the MP04() range */
#define ARCH_NR_GPIOS (S5PC100_GPIO_END + 1)
-#define EINT_MODE S3C_GPIO_SFN(0x2)
-
-#define EINT_GPIO_0(x) S5PC100_GPH0(x)
-#define EINT_GPIO_1(x) S5PC100_GPH1(x)
-#define EINT_GPIO_2(x) S5PC100_GPH2(x)
-#define EINT_GPIO_3(x) S5PC100_GPH3(x)
-
#include <asm-generic/gpio.h>
#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
index dd6295e..6abe481 100644
--- a/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5pc100/include/mach/regs-gpio.h
@@ -71,5 +71,12 @@
#define S5P_EXTINT_RISEEDGE (0x03)
#define S5P_EXTINT_BOTHEDGE (0x04)
+#define EINT_MODE S3C_GPIO_SFN(0x2)
+
+#define EINT_GPIO_0(x) S5PC100_GPH0(x)
+#define EINT_GPIO_1(x) S5PC100_GPH1(x)
+#define EINT_GPIO_2(x) S5PC100_GPH2(x)
+#define EINT_GPIO_3(x) S5PC100_GPH3(x)
+
#endif /* __ASM_MACH_S5PC100_REGS_GPIO_H */
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 2/7] ARM: S5P: Add GPIOlib gpio_to_irq for external interrupts
2010-06-03 5:01 ` Joonyoung Shim
@ 2010-06-03 5:01 ` Joonyoung Shim
-1 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 5:01 UTC (permalink / raw)
To: ben-linux; +Cc: linux-arm-kernel, linux-samsung-soc, kyungmin.park
This patch is to support gpio_to_irq() of GPIOlib for external
interrupts. The gpio_to_irq() calls s5p_gpiolib_eint_to_irq function.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/plat-s5p/Makefile | 1 +
arch/arm/plat-s5p/gpiolib.c | 35 ++++++++++++++++++++++++
arch/arm/plat-samsung/include/plat/gpio-core.h | 2 +
3 files changed, 38 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/plat-s5p/gpiolib.c
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 39c242b..f6e1a13 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -15,6 +15,7 @@ obj- :=
obj-y += dev-uart.o
obj-y += cpu.o
obj-y += clock.o
+obj-y += gpiolib.o
obj-y += irq.o
obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
diff --git a/arch/arm/plat-s5p/gpiolib.c b/arch/arm/plat-s5p/gpiolib.c
new file mode 100644
index 0000000..0c27a9d
--- /dev/null
+++ b/arch/arm/plat-s5p/gpiolib.c
@@ -0,0 +1,35 @@
+/*
+ * linux/arch/arm/plat-s5p/gpiolib.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co.Ltd
+ * Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ *
+ * S5P - GPIOlib support
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/gpio.h>
+#include <mach/irqs.h>
+#include <mach/regs-gpio.h>
+
+/* be called from gpio_to_irq() for external interrupts */
+int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset)
+{
+ switch (chip->base) {
+ case EINT_GPIO_0(0):
+ return IRQ_EINT(offset);
+ case EINT_GPIO_1(0):
+ return IRQ_EINT(8 + offset);
+ case EINT_GPIO_2(0):
+ return IRQ_EINT(16 + offset);
+ case EINT_GPIO_3(0):
+ return IRQ_EINT(24 + offset);
+ default:
+ return -EINVAL;
+ }
+}
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index e358c7d..f6c5151 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -121,6 +121,8 @@ extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
/* exported for core SoC support to change */
extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default;
+extern int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset);
+
#ifdef CONFIG_S3C_GPIO_TRACK
extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 2/7] ARM: S5P: Add GPIOlib gpio_to_irq for external interrupts
@ 2010-06-03 5:01 ` Joonyoung Shim
0 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 5:01 UTC (permalink / raw)
To: linux-arm-kernel
This patch is to support gpio_to_irq() of GPIOlib for external
interrupts. The gpio_to_irq() calls s5p_gpiolib_eint_to_irq function.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/plat-s5p/Makefile | 1 +
arch/arm/plat-s5p/gpiolib.c | 35 ++++++++++++++++++++++++
arch/arm/plat-samsung/include/plat/gpio-core.h | 2 +
3 files changed, 38 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/plat-s5p/gpiolib.c
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 39c242b..f6e1a13 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -15,6 +15,7 @@ obj- :=
obj-y += dev-uart.o
obj-y += cpu.o
obj-y += clock.o
+obj-y += gpiolib.o
obj-y += irq.o
obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
diff --git a/arch/arm/plat-s5p/gpiolib.c b/arch/arm/plat-s5p/gpiolib.c
new file mode 100644
index 0000000..0c27a9d
--- /dev/null
+++ b/arch/arm/plat-s5p/gpiolib.c
@@ -0,0 +1,35 @@
+/*
+ * linux/arch/arm/plat-s5p/gpiolib.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co.Ltd
+ * Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ *
+ * S5P - GPIOlib support
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/gpio.h>
+#include <mach/irqs.h>
+#include <mach/regs-gpio.h>
+
+/* be called from gpio_to_irq() for external interrupts */
+int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset)
+{
+ switch (chip->base) {
+ case EINT_GPIO_0(0):
+ return IRQ_EINT(offset);
+ case EINT_GPIO_1(0):
+ return IRQ_EINT(8 + offset);
+ case EINT_GPIO_2(0):
+ return IRQ_EINT(16 + offset);
+ case EINT_GPIO_3(0):
+ return IRQ_EINT(24 + offset);
+ default:
+ return -EINVAL;
+ }
+}
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index e358c7d..f6c5151 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -121,6 +121,8 @@ extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
/* exported for core SoC support to change */
extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default;
+extern int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset);
+
#ifdef CONFIG_S3C_GPIO_TRACK
extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH 2/7] ARM: S5P: Add GPIOlib gpio_to_irq for external interrupts
2010-06-03 5:01 ` Joonyoung Shim
@ 2010-06-03 5:43 ` Ben Dooks
-1 siblings, 0 replies; 18+ messages in thread
From: Ben Dooks @ 2010-06-03 5:43 UTC (permalink / raw)
To: Joonyoung Shim
Cc: kyungmin.park, linux-samsung-soc, linux-arm-kernel, ben-linux
On Thu, Jun 03, 2010 at 02:01:34PM +0900, Joonyoung Shim wrote:
> This patch is to support gpio_to_irq() of GPIOlib for external
> interrupts. The gpio_to_irq() calls s5p_gpiolib_eint_to_irq function.
How about each s3c_gpio_chip have a irq base in it?
> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
> arch/arm/plat-s5p/Makefile | 1 +
> arch/arm/plat-s5p/gpiolib.c | 35 ++++++++++++++++++++++++
> arch/arm/plat-samsung/include/plat/gpio-core.h | 2 +
> 3 files changed, 38 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/plat-s5p/gpiolib.c
>
> diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
> index 39c242b..f6e1a13 100644
> --- a/arch/arm/plat-s5p/Makefile
> +++ b/arch/arm/plat-s5p/Makefile
> @@ -15,6 +15,7 @@ obj- :=
> obj-y += dev-uart.o
> obj-y += cpu.o
> obj-y += clock.o
> +obj-y += gpiolib.o
> obj-y += irq.o
> obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
>
> diff --git a/arch/arm/plat-s5p/gpiolib.c b/arch/arm/plat-s5p/gpiolib.c
> new file mode 100644
> index 0000000..0c27a9d
> --- /dev/null
> +++ b/arch/arm/plat-s5p/gpiolib.c
> @@ -0,0 +1,35 @@
> +/*
> + * linux/arch/arm/plat-s5p/gpiolib.c
> + *
> + * Copyright (C) 2010 Samsung Electronics Co.Ltd
> + * Author: Joonyoung Shim <jy0922.shim@samsung.com>
> + *
> + * S5P - GPIOlib support
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + *
> + */
> +
> +#include <linux/gpio.h>
> +#include <mach/irqs.h>
> +#include <mach/regs-gpio.h>
> +
> +/* be called from gpio_to_irq() for external interrupts */
> +int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset)
> +{
> + switch (chip->base) {
> + case EINT_GPIO_0(0):
> + return IRQ_EINT(offset);
> + case EINT_GPIO_1(0):
> + return IRQ_EINT(8 + offset);
> + case EINT_GPIO_2(0):
> + return IRQ_EINT(16 + offset);
> + case EINT_GPIO_3(0):
> + return IRQ_EINT(24 + offset);
> + default:
> + return -EINVAL;
> + }
> +}
> diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
> index e358c7d..f6c5151 100644
> --- a/arch/arm/plat-samsung/include/plat/gpio-core.h
> +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
> @@ -121,6 +121,8 @@ extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
> /* exported for core SoC support to change */
> extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default;
>
> +extern int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset);
> +
> #ifdef CONFIG_S3C_GPIO_TRACK
> extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
>
> --
> 1.7.0.4
>
--
--
Ben
Q: What's a light-year?
A: One-third less calories than a regular year.
^ permalink raw reply [flat|nested] 18+ messages in thread* [PATCH 2/7] ARM: S5P: Add GPIOlib gpio_to_irq for external interrupts
@ 2010-06-03 5:43 ` Ben Dooks
0 siblings, 0 replies; 18+ messages in thread
From: Ben Dooks @ 2010-06-03 5:43 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Jun 03, 2010 at 02:01:34PM +0900, Joonyoung Shim wrote:
> This patch is to support gpio_to_irq() of GPIOlib for external
> interrupts. The gpio_to_irq() calls s5p_gpiolib_eint_to_irq function.
How about each s3c_gpio_chip have a irq base in it?
> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> ---
> arch/arm/plat-s5p/Makefile | 1 +
> arch/arm/plat-s5p/gpiolib.c | 35 ++++++++++++++++++++++++
> arch/arm/plat-samsung/include/plat/gpio-core.h | 2 +
> 3 files changed, 38 insertions(+), 0 deletions(-)
> create mode 100644 arch/arm/plat-s5p/gpiolib.c
>
> diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
> index 39c242b..f6e1a13 100644
> --- a/arch/arm/plat-s5p/Makefile
> +++ b/arch/arm/plat-s5p/Makefile
> @@ -15,6 +15,7 @@ obj- :=
> obj-y += dev-uart.o
> obj-y += cpu.o
> obj-y += clock.o
> +obj-y += gpiolib.o
> obj-y += irq.o
> obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
>
> diff --git a/arch/arm/plat-s5p/gpiolib.c b/arch/arm/plat-s5p/gpiolib.c
> new file mode 100644
> index 0000000..0c27a9d
> --- /dev/null
> +++ b/arch/arm/plat-s5p/gpiolib.c
> @@ -0,0 +1,35 @@
> +/*
> + * linux/arch/arm/plat-s5p/gpiolib.c
> + *
> + * Copyright (C) 2010 Samsung Electronics Co.Ltd
> + * Author: Joonyoung Shim <jy0922.shim@samsung.com>
> + *
> + * S5P - GPIOlib support
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + *
> + */
> +
> +#include <linux/gpio.h>
> +#include <mach/irqs.h>
> +#include <mach/regs-gpio.h>
> +
> +/* be called from gpio_to_irq() for external interrupts */
> +int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset)
> +{
> + switch (chip->base) {
> + case EINT_GPIO_0(0):
> + return IRQ_EINT(offset);
> + case EINT_GPIO_1(0):
> + return IRQ_EINT(8 + offset);
> + case EINT_GPIO_2(0):
> + return IRQ_EINT(16 + offset);
> + case EINT_GPIO_3(0):
> + return IRQ_EINT(24 + offset);
> + default:
> + return -EINVAL;
> + }
> +}
> diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
> index e358c7d..f6c5151 100644
> --- a/arch/arm/plat-samsung/include/plat/gpio-core.h
> +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
> @@ -121,6 +121,8 @@ extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
> /* exported for core SoC support to change */
> extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default;
>
> +extern int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset);
> +
> #ifdef CONFIG_S3C_GPIO_TRACK
> extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
>
> --
> 1.7.0.4
>
--
--
Ben
Q: What's a light-year?
A: One-third less calories than a regular year.
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH 2/7] ARM: S5P: Add GPIOlib gpio_to_irq for external interrupts
2010-06-03 5:43 ` Ben Dooks
@ 2010-06-03 6:14 ` Joonyoung Shim
-1 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 6:14 UTC (permalink / raw)
To: Ben Dooks; +Cc: linux-arm-kernel, linux-samsung-soc, kyungmin.park
On 6/3/2010 2:43 PM, Ben Dooks wrote:
> On Thu, Jun 03, 2010 at 02:01:34PM +0900, Joonyoung Shim wrote:
>> This patch is to support gpio_to_irq() of GPIOlib for external
>> interrupts. The gpio_to_irq() calls s5p_gpiolib_eint_to_irq function.
>
> How about each s3c_gpio_chip have a irq base in it?
>
Good, then it can be arch and irq type(gpio, external)independent codes.
>> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
>> ---
>> arch/arm/plat-s5p/Makefile | 1 +
>> arch/arm/plat-s5p/gpiolib.c | 35 ++++++++++++++++++++++++
>> arch/arm/plat-samsung/include/plat/gpio-core.h | 2 +
>> 3 files changed, 38 insertions(+), 0 deletions(-)
>> create mode 100644 arch/arm/plat-s5p/gpiolib.c
>>
>> diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
>> index 39c242b..f6e1a13 100644
>> --- a/arch/arm/plat-s5p/Makefile
>> +++ b/arch/arm/plat-s5p/Makefile
>> @@ -15,6 +15,7 @@ obj- :=
>> obj-y += dev-uart.o
>> obj-y += cpu.o
>> obj-y += clock.o
>> +obj-y += gpiolib.o
>> obj-y += irq.o
>> obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
>>
>> diff --git a/arch/arm/plat-s5p/gpiolib.c b/arch/arm/plat-s5p/gpiolib.c
>> new file mode 100644
>> index 0000000..0c27a9d
>> --- /dev/null
>> +++ b/arch/arm/plat-s5p/gpiolib.c
>> @@ -0,0 +1,35 @@
>> +/*
>> + * linux/arch/arm/plat-s5p/gpiolib.c
>> + *
>> + * Copyright (C) 2010 Samsung Electronics Co.Ltd
>> + * Author: Joonyoung Shim <jy0922.shim@samsung.com>
>> + *
>> + * S5P - GPIOlib support
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License as published by the
>> + * Free Software Foundation; either version 2 of the License, or (at your
>> + * option) any later version.
>> + *
>> + */
>> +
>> +#include <linux/gpio.h>
>> +#include <mach/irqs.h>
>> +#include <mach/regs-gpio.h>
>> +
>> +/* be called from gpio_to_irq() for external interrupts */
>> +int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset)
>> +{
>> + switch (chip->base) {
>> + case EINT_GPIO_0(0):
>> + return IRQ_EINT(offset);
>> + case EINT_GPIO_1(0):
>> + return IRQ_EINT(8 + offset);
>> + case EINT_GPIO_2(0):
>> + return IRQ_EINT(16 + offset);
>> + case EINT_GPIO_3(0):
>> + return IRQ_EINT(24 + offset);
>> + default:
>> + return -EINVAL;
>> + }
>> +}
>> diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
>> index e358c7d..f6c5151 100644
>> --- a/arch/arm/plat-samsung/include/plat/gpio-core.h
>> +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
>> @@ -121,6 +121,8 @@ extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
>> /* exported for core SoC support to change */
>> extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default;
>>
>> +extern int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset);
>> +
>> #ifdef CONFIG_S3C_GPIO_TRACK
>> extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
>>
>> --
>> 1.7.0.4
>>
>
^ permalink raw reply [flat|nested] 18+ messages in thread* [PATCH 2/7] ARM: S5P: Add GPIOlib gpio_to_irq for external interrupts
@ 2010-06-03 6:14 ` Joonyoung Shim
0 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 6:14 UTC (permalink / raw)
To: linux-arm-kernel
On 6/3/2010 2:43 PM, Ben Dooks wrote:
> On Thu, Jun 03, 2010 at 02:01:34PM +0900, Joonyoung Shim wrote:
>> This patch is to support gpio_to_irq() of GPIOlib for external
>> interrupts. The gpio_to_irq() calls s5p_gpiolib_eint_to_irq function.
>
> How about each s3c_gpio_chip have a irq base in it?
>
Good, then it can be arch and irq type(gpio, external)independent codes.
>> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
>> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
>> ---
>> arch/arm/plat-s5p/Makefile | 1 +
>> arch/arm/plat-s5p/gpiolib.c | 35 ++++++++++++++++++++++++
>> arch/arm/plat-samsung/include/plat/gpio-core.h | 2 +
>> 3 files changed, 38 insertions(+), 0 deletions(-)
>> create mode 100644 arch/arm/plat-s5p/gpiolib.c
>>
>> diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
>> index 39c242b..f6e1a13 100644
>> --- a/arch/arm/plat-s5p/Makefile
>> +++ b/arch/arm/plat-s5p/Makefile
>> @@ -15,6 +15,7 @@ obj- :=
>> obj-y += dev-uart.o
>> obj-y += cpu.o
>> obj-y += clock.o
>> +obj-y += gpiolib.o
>> obj-y += irq.o
>> obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
>>
>> diff --git a/arch/arm/plat-s5p/gpiolib.c b/arch/arm/plat-s5p/gpiolib.c
>> new file mode 100644
>> index 0000000..0c27a9d
>> --- /dev/null
>> +++ b/arch/arm/plat-s5p/gpiolib.c
>> @@ -0,0 +1,35 @@
>> +/*
>> + * linux/arch/arm/plat-s5p/gpiolib.c
>> + *
>> + * Copyright (C) 2010 Samsung Electronics Co.Ltd
>> + * Author: Joonyoung Shim <jy0922.shim@samsung.com>
>> + *
>> + * S5P - GPIOlib support
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License as published by the
>> + * Free Software Foundation; either version 2 of the License, or (at your
>> + * option) any later version.
>> + *
>> + */
>> +
>> +#include <linux/gpio.h>
>> +#include <mach/irqs.h>
>> +#include <mach/regs-gpio.h>
>> +
>> +/* be called from gpio_to_irq() for external interrupts */
>> +int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset)
>> +{
>> + switch (chip->base) {
>> + case EINT_GPIO_0(0):
>> + return IRQ_EINT(offset);
>> + case EINT_GPIO_1(0):
>> + return IRQ_EINT(8 + offset);
>> + case EINT_GPIO_2(0):
>> + return IRQ_EINT(16 + offset);
>> + case EINT_GPIO_3(0):
>> + return IRQ_EINT(24 + offset);
>> + default:
>> + return -EINVAL;
>> + }
>> +}
>> diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
>> index e358c7d..f6c5151 100644
>> --- a/arch/arm/plat-samsung/include/plat/gpio-core.h
>> +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
>> @@ -121,6 +121,8 @@ extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
>> /* exported for core SoC support to change */
>> extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default;
>>
>> +extern int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset);
>> +
>> #ifdef CONFIG_S3C_GPIO_TRACK
>> extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
>>
>> --
>> 1.7.0.4
>>
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 3/7] ARM: S5PV210: Support GPIOlib gpio_to_irq for external interrupts
2010-06-03 5:01 ` Joonyoung Shim
@ 2010-06-03 5:01 ` Joonyoung Shim
-1 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 5:01 UTC (permalink / raw)
To: ben-linux; +Cc: linux-arm-kernel, linux-samsung-soc, kyungmin.park
This patch is to support GPIOlib gpio_to_irq for external interrupts to
s5pv210 machine.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pv210/gpiolib.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c
index 9ea8972..5b73c3e 100644
--- a/arch/arm/mach-s5pv210/gpiolib.c
+++ b/arch/arm/mach-s5pv210/gpiolib.c
@@ -213,6 +213,7 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
.base = S5PV210_GPH0(0),
.ngpio = S5PV210_GPIO_H0_NR,
.label = "GPH0",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = (S5P_VA_GPIO + 0xC20),
@@ -221,6 +222,7 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
.base = S5PV210_GPH1(0),
.ngpio = S5PV210_GPIO_H1_NR,
.label = "GPH1",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = (S5P_VA_GPIO + 0xC40),
@@ -229,6 +231,7 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
.base = S5PV210_GPH2(0),
.ngpio = S5PV210_GPIO_H2_NR,
.label = "GPH2",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = (S5P_VA_GPIO + 0xC60),
@@ -237,6 +240,7 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
.base = S5PV210_GPH3(0),
.ngpio = S5PV210_GPIO_H3_NR,
.label = "GPH3",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
},
};
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 3/7] ARM: S5PV210: Support GPIOlib gpio_to_irq for external interrupts
@ 2010-06-03 5:01 ` Joonyoung Shim
0 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 5:01 UTC (permalink / raw)
To: linux-arm-kernel
This patch is to support GPIOlib gpio_to_irq for external interrupts to
s5pv210 machine.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pv210/gpiolib.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c
index 9ea8972..5b73c3e 100644
--- a/arch/arm/mach-s5pv210/gpiolib.c
+++ b/arch/arm/mach-s5pv210/gpiolib.c
@@ -213,6 +213,7 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
.base = S5PV210_GPH0(0),
.ngpio = S5PV210_GPIO_H0_NR,
.label = "GPH0",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = (S5P_VA_GPIO + 0xC20),
@@ -221,6 +222,7 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
.base = S5PV210_GPH1(0),
.ngpio = S5PV210_GPIO_H1_NR,
.label = "GPH1",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = (S5P_VA_GPIO + 0xC40),
@@ -229,6 +231,7 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
.base = S5PV210_GPH2(0),
.ngpio = S5PV210_GPIO_H2_NR,
.label = "GPH2",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = (S5P_VA_GPIO + 0xC60),
@@ -237,6 +240,7 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
.base = S5PV210_GPH3(0),
.ngpio = S5PV210_GPIO_H3_NR,
.label = "GPH3",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
},
};
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 4/7] ARM: S5PC100: Use S5P GPIOlib gpio_to_irq function for external interrupts
2010-06-03 5:01 ` Joonyoung Shim
@ 2010-06-03 5:01 ` Joonyoung Shim
-1 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 5:01 UTC (permalink / raw)
To: ben-linux; +Cc: linux-arm-kernel, linux-samsung-soc, kyungmin.park
This changes from s5pc100 machine specific gpio_to_irq function to
S5P GPIOlib gpio_to_irq function for external interrupts.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pc100/gpiolib.c | 25 ++++---------------------
1 files changed, 4 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-s5pc100/gpiolib.c b/arch/arm/mach-s5pc100/gpiolib.c
index 0fab7f2..60704ef 100644
--- a/arch/arm/mach-s5pc100/gpiolib.c
+++ b/arch/arm/mach-s5pc100/gpiolib.c
@@ -66,25 +66,6 @@ static int s5pc100_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
return S3C_IRQ_GPIO(chip->base + offset);
}
-static int s5pc100_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset)
-{
- int base;
-
- base = chip->base - S5PC100_GPH0(0);
- if (base == 0)
- return IRQ_EINT(offset);
- base = chip->base - S5PC100_GPH1(0);
- if (base == 0)
- return IRQ_EINT(8 + offset);
- base = chip->base - S5PC100_GPH2(0);
- if (base == 0)
- return IRQ_EINT(16 + offset);
- base = chip->base - S5PC100_GPH3(0);
- if (base == 0)
- return IRQ_EINT(24 + offset);
- return -EINVAL;
-}
-
static struct s3c_gpio_cfg gpio_cfg = {
.set_config = s3c_gpio_setcfg_s3c64xx_4bit,
.set_pull = s3c_gpio_setpull_updown,
@@ -232,6 +213,7 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
.base = S5PC100_GPH0(0),
.ngpio = S5PC100_GPIO_H0_NR,
.label = "GPH0",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = S5PC100_GPH1_BASE,
@@ -240,6 +222,7 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
.base = S5PC100_GPH1(0),
.ngpio = S5PC100_GPIO_H1_NR,
.label = "GPH1",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = S5PC100_GPH2_BASE,
@@ -248,6 +231,7 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
.base = S5PC100_GPH2(0),
.ngpio = S5PC100_GPIO_H2_NR,
.label = "GPH2",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = S5PC100_GPH3_BASE,
@@ -256,6 +240,7 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
.base = S5PC100_GPH3(0),
.ngpio = S5PC100_GPIO_H3_NR,
.label = "GPH3",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = S5PC100_GPI_BASE,
@@ -399,8 +384,6 @@ static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
- } else if (chip->config == &gpio_cfg_eint) {
- chip->chip.to_irq = s5pc100_gpiolib_to_eint;
}
}
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 4/7] ARM: S5PC100: Use S5P GPIOlib gpio_to_irq function for external interrupts
@ 2010-06-03 5:01 ` Joonyoung Shim
0 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 5:01 UTC (permalink / raw)
To: linux-arm-kernel
This changes from s5pc100 machine specific gpio_to_irq function to
S5P GPIOlib gpio_to_irq function for external interrupts.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pc100/gpiolib.c | 25 ++++---------------------
1 files changed, 4 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-s5pc100/gpiolib.c b/arch/arm/mach-s5pc100/gpiolib.c
index 0fab7f2..60704ef 100644
--- a/arch/arm/mach-s5pc100/gpiolib.c
+++ b/arch/arm/mach-s5pc100/gpiolib.c
@@ -66,25 +66,6 @@ static int s5pc100_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
return S3C_IRQ_GPIO(chip->base + offset);
}
-static int s5pc100_gpiolib_to_eint(struct gpio_chip *chip, unsigned int offset)
-{
- int base;
-
- base = chip->base - S5PC100_GPH0(0);
- if (base == 0)
- return IRQ_EINT(offset);
- base = chip->base - S5PC100_GPH1(0);
- if (base == 0)
- return IRQ_EINT(8 + offset);
- base = chip->base - S5PC100_GPH2(0);
- if (base == 0)
- return IRQ_EINT(16 + offset);
- base = chip->base - S5PC100_GPH3(0);
- if (base == 0)
- return IRQ_EINT(24 + offset);
- return -EINVAL;
-}
-
static struct s3c_gpio_cfg gpio_cfg = {
.set_config = s3c_gpio_setcfg_s3c64xx_4bit,
.set_pull = s3c_gpio_setpull_updown,
@@ -232,6 +213,7 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
.base = S5PC100_GPH0(0),
.ngpio = S5PC100_GPIO_H0_NR,
.label = "GPH0",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = S5PC100_GPH1_BASE,
@@ -240,6 +222,7 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
.base = S5PC100_GPH1(0),
.ngpio = S5PC100_GPIO_H1_NR,
.label = "GPH1",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = S5PC100_GPH2_BASE,
@@ -248,6 +231,7 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
.base = S5PC100_GPH2(0),
.ngpio = S5PC100_GPIO_H2_NR,
.label = "GPH2",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = S5PC100_GPH3_BASE,
@@ -256,6 +240,7 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
.base = S5PC100_GPH3(0),
.ngpio = S5PC100_GPIO_H3_NR,
.label = "GPH3",
+ .to_irq = s5p_gpiolib_eint_to_irq,
},
}, {
.base = S5PC100_GPI_BASE,
@@ -399,8 +384,6 @@ static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID);
}
- } else if (chip->config == &gpio_cfg_eint) {
- chip->chip.to_irq = s5pc100_gpiolib_to_eint;
}
}
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 5/7] ARM: S5PV210: Add gpio interrupt support
2010-06-03 5:01 ` Joonyoung Shim
@ 2010-06-03 5:01 ` Joonyoung Shim
-1 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 5:01 UTC (permalink / raw)
To: ben-linux; +Cc: linux-arm-kernel, linux-samsung-soc, kyungmin.park
This patch is to support gpio interrupts on s5pv210.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pv210/gpiolib.c | 8 +-
arch/arm/mach-s5pv210/include/mach/irqs.h | 16 ++-
arch/arm/plat-s5p/Makefile | 2 +-
arch/arm/plat-s5p/irq-gpioint.c | 208 ++++++++++++++++++++++++
arch/arm/plat-samsung/include/plat/gpio-core.h | 2 +
5 files changed, 233 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/plat-s5p/irq-gpioint.c
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c
index 5b73c3e..166725f 100644
--- a/arch/arm/mach-s5pv210/gpiolib.c
+++ b/arch/arm/mach-s5pv210/gpiolib.c
@@ -150,6 +150,7 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
.label = "GPG3",
},
}, {
+ .config = &gpio_cfg_noint,
.chip = {
.base = S5PV210_GPI(0),
.ngpio = S5PV210_GPIO_I_NR,
@@ -249,11 +250,16 @@ static __init int s5pv210_gpiolib_init(void)
{
struct s3c_gpio_chip *chip = s5pv210_gpio_4bit;
int nr_chips = ARRAY_SIZE(s5pv210_gpio_4bit);
+ int gpioint_group = 0;
int i = 0;
for (i = 0; i < nr_chips; i++, chip++) {
- if (chip->config == NULL)
+ if (chip->config == NULL) {
chip->config = &gpio_cfg;
+
+ /* gpio interrupts */
+ s5p_gpioint_add(chip, gpioint_group++);
+ }
if (chip->base == NULL)
chip->base = S5PV210_BANK_BASE(i);
}
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 9689537..43baacc 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -121,8 +121,22 @@
#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
+/* GPIO interrupt */
+#define S5P_GPIOINT_GROUP_NR 22
+#define S5P_GPIOINT_BASE (IRQ_EINT(31) + 1)
+#define S5P_IRQ_GPIOINT(x) (S5P_GPIOINT_BASE + (x))
+
/* Set the default NR_IRQS */
-#define NR_IRQS (IRQ_EINT(31) + 1)
+
+/*
+ * GPIO groups is 27. Each GPIO group can have max 8 GPIO interrupts.
+ *
+ * We should include gpios of all gpio groups from GPIO_A0 until GPIO_J4 to
+ * NR_IRQS because 22 gpio groups having gpio interrupts aren't in order and
+ * are mixed with no interrupt gpio groups, then it can give simple irq
+ * computation of gpio interrupts.
+ */
+#define NR_IRQS (S5P_IRQ_GPIOINT(27 * 8) + 1)
/* Compatibility */
#define IRQ_LCD_FIFO IRQ_LCD0
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index f6e1a13..23c153c 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -16,6 +16,6 @@ obj-y += dev-uart.o
obj-y += cpu.o
obj-y += clock.o
obj-y += gpiolib.o
-obj-y += irq.o
+obj-y += irq.o irq-gpioint.o
obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
new file mode 100644
index 0000000..c172e37
--- /dev/null
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -0,0 +1,208 @@
+/*
+ * linux/arch/arm/plat-s5p/irq-gpioint.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co.Ltd
+ * Author: Kyungmin Park <kyungmin.park@samsung.com>
+ * Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+#include <mach/map.h>
+#include <plat/gpio-core.h>
+#include <plat/gpio-cfg.h>
+
+#define S5P_GPIOREG(x) (S5P_VA_GPIO + (x))
+
+#define GPIOINT_CON_OFFSET 0x700
+#define GPIOINT_MASK_OFFSET 0x900
+#define GPIOINT_PEND_OFFSET 0xA00
+
+#define GPIOINT_LEVEL_LOW 0x0
+#define GPIOINT_LEVEL_HIGH 0x1
+#define GPIOINT_EDGE_FALLING 0x2
+#define GPIOINT_EDGE_RISING 0x3
+#define GPIOINT_EDGE_BOTH 0x4
+
+static struct s3c_gpio_chip *s3c_chips[S5P_GPIOINT_GROUP_NR];
+
+static int s5p_gpioint_get_group(unsigned int irq)
+{
+ struct gpio_chip *chip = get_irq_data(irq);
+ struct s3c_gpio_chip *s3c_chip = container_of(chip,
+ struct s3c_gpio_chip, chip);
+ int group;
+
+ for (group = 0; group < S5P_GPIOINT_GROUP_NR; group++)
+ if (s3c_chip == s3c_chips[group])
+ break;
+
+ return group;
+}
+
+static int s5p_gpioint_get_offset(unsigned int irq)
+{
+ struct gpio_chip *chip = get_irq_data(irq);
+ return irq - S5P_IRQ_GPIOINT(chip->base);
+}
+
+static void s5p_gpioint_ack(unsigned int irq)
+{
+ int group, offset, pend_offset;
+ unsigned int value;
+
+ group = s5p_gpioint_get_group(irq);
+ offset = s5p_gpioint_get_offset(irq);
+ pend_offset = group << 2;
+
+ value = __raw_readl(S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
+ value |= 1 << offset;
+ __raw_writel(value, S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
+}
+
+static void s5p_gpioint_mask(unsigned int irq)
+{
+ int group, offset, mask_offset;
+ unsigned int value;
+
+ group = s5p_gpioint_get_group(irq);
+ offset = s5p_gpioint_get_offset(irq);
+ mask_offset = group << 2;
+
+ value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
+ value |= 1 << offset;
+ __raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
+}
+
+static void s5p_gpioint_unmask(unsigned int irq)
+{
+ int group, offset, mask_offset;
+ unsigned int value;
+
+ group = s5p_gpioint_get_group(irq);
+ offset = s5p_gpioint_get_offset(irq);
+ mask_offset = group << 2;
+
+ value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
+ value &= ~(1 << offset);
+ __raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
+}
+
+static void s5p_gpioint_mask_ack(unsigned int irq)
+{
+ s5p_gpioint_mask(irq);
+ s5p_gpioint_ack(irq);
+}
+
+static int s5p_gpioint_set_type(unsigned int irq, unsigned int type)
+{
+ int group, offset, con_offset;
+ unsigned int value;
+
+ group = s5p_gpioint_get_group(irq);
+ offset = s5p_gpioint_get_offset(irq);
+ con_offset = group << 2;
+
+ switch (type) {
+ case IRQ_TYPE_NONE:
+ printk(KERN_WARNING "No irq type\n");
+ return -EINVAL;
+ case IRQ_TYPE_EDGE_RISING:
+ type = GPIOINT_EDGE_RISING;
+ break;
+ case IRQ_TYPE_EDGE_FALLING:
+ type = GPIOINT_EDGE_FALLING;
+ break;
+ case IRQ_TYPE_EDGE_BOTH:
+ type = GPIOINT_EDGE_BOTH;
+ break;
+ case IRQ_TYPE_LEVEL_HIGH:
+ type = GPIOINT_LEVEL_HIGH;
+ break;
+ case IRQ_TYPE_LEVEL_LOW:
+ type = GPIOINT_LEVEL_LOW;
+ break;
+ default:
+ BUG();
+ }
+
+ value = __raw_readl(S5P_GPIOREG(GPIOINT_CON_OFFSET) + con_offset);
+ value &= ~(0xf << (offset * 0x4));
+ value |= (type << (offset * 0x4));
+ __raw_writel(value, S5P_GPIOREG(GPIOINT_CON_OFFSET) + con_offset);
+
+ return 0;
+}
+
+struct irq_chip s5p_gpioint = {
+ .name = "GPIO",
+ .ack = s5p_gpioint_ack,
+ .mask = s5p_gpioint_mask,
+ .mask_ack = s5p_gpioint_mask_ack,
+ .unmask = s5p_gpioint_unmask,
+ .set_type = s5p_gpioint_set_type,
+};
+
+static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
+{
+ int group, offset, pend_offset, mask_offset;
+ int real_irq;
+ unsigned int pend, mask;
+
+ for (group = 0; group < S5P_GPIOINT_GROUP_NR; group++) {
+ pend_offset = group << 2;
+ pend = __raw_readl(S5P_GPIOREG(GPIOINT_PEND_OFFSET) +
+ pend_offset);
+ if (!pend)
+ continue;
+
+ mask_offset = group << 2;
+ mask = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) +
+ mask_offset);
+ pend &= ~mask;
+
+ for (offset = 0; offset < 8; offset++) {
+ if (pend & (1 << offset)) {
+ real_irq = s3c_chips[group]->chip.base +
+ offset;
+ generic_handle_irq(S5P_IRQ_GPIOINT(real_irq));
+ }
+ }
+ }
+}
+
+void s5p_gpioint_add(struct s3c_gpio_chip *chip, int group)
+{
+ int irq;
+ int i;
+
+ s3c_chips[group] = chip;
+
+ for (i = 0; i < chip->chip.ngpio; i++) {
+ irq = S5P_GPIOINT_BASE + chip->chip.base + i;
+ set_irq_chip(irq, &s5p_gpioint);
+ set_irq_data(irq, &chip->chip);
+ set_irq_handler(irq, handle_level_irq);
+ set_irq_flags(irq, IRQF_VALID);
+ }
+}
+
+int __init s5p_gpioint_init(void)
+{
+ /* register gpio interrupt handler */
+ set_irq_chained_handler(IRQ_GPIOINT, s5p_gpioint_handler);
+
+ return 0;
+}
+
+arch_initcall(s5p_gpioint_init);
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index f6c5151..a6b844c 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -123,6 +123,8 @@ extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default;
extern int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset);
+extern void s5p_gpioint_add(struct s3c_gpio_chip *chip, int group);
+
#ifdef CONFIG_S3C_GPIO_TRACK
extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 5/7] ARM: S5PV210: Add gpio interrupt support
@ 2010-06-03 5:01 ` Joonyoung Shim
0 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 5:01 UTC (permalink / raw)
To: linux-arm-kernel
This patch is to support gpio interrupts on s5pv210.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pv210/gpiolib.c | 8 +-
arch/arm/mach-s5pv210/include/mach/irqs.h | 16 ++-
arch/arm/plat-s5p/Makefile | 2 +-
arch/arm/plat-s5p/irq-gpioint.c | 208 ++++++++++++++++++++++++
arch/arm/plat-samsung/include/plat/gpio-core.h | 2 +
5 files changed, 233 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/plat-s5p/irq-gpioint.c
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c
index 5b73c3e..166725f 100644
--- a/arch/arm/mach-s5pv210/gpiolib.c
+++ b/arch/arm/mach-s5pv210/gpiolib.c
@@ -150,6 +150,7 @@ static struct s3c_gpio_chip s5pv210_gpio_4bit[] = {
.label = "GPG3",
},
}, {
+ .config = &gpio_cfg_noint,
.chip = {
.base = S5PV210_GPI(0),
.ngpio = S5PV210_GPIO_I_NR,
@@ -249,11 +250,16 @@ static __init int s5pv210_gpiolib_init(void)
{
struct s3c_gpio_chip *chip = s5pv210_gpio_4bit;
int nr_chips = ARRAY_SIZE(s5pv210_gpio_4bit);
+ int gpioint_group = 0;
int i = 0;
for (i = 0; i < nr_chips; i++, chip++) {
- if (chip->config == NULL)
+ if (chip->config == NULL) {
chip->config = &gpio_cfg;
+
+ /* gpio interrupts */
+ s5p_gpioint_add(chip, gpioint_group++);
+ }
if (chip->base == NULL)
chip->base = S5PV210_BANK_BASE(i);
}
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 9689537..43baacc 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -121,8 +121,22 @@
#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
+/* GPIO interrupt */
+#define S5P_GPIOINT_GROUP_NR 22
+#define S5P_GPIOINT_BASE (IRQ_EINT(31) + 1)
+#define S5P_IRQ_GPIOINT(x) (S5P_GPIOINT_BASE + (x))
+
/* Set the default NR_IRQS */
-#define NR_IRQS (IRQ_EINT(31) + 1)
+
+/*
+ * GPIO groups is 27. Each GPIO group can have max 8 GPIO interrupts.
+ *
+ * We should include gpios of all gpio groups from GPIO_A0 until GPIO_J4 to
+ * NR_IRQS because 22 gpio groups having gpio interrupts aren't in order and
+ * are mixed with no interrupt gpio groups, then it can give simple irq
+ * computation of gpio interrupts.
+ */
+#define NR_IRQS (S5P_IRQ_GPIOINT(27 * 8) + 1)
/* Compatibility */
#define IRQ_LCD_FIFO IRQ_LCD0
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index f6e1a13..23c153c 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -16,6 +16,6 @@ obj-y += dev-uart.o
obj-y += cpu.o
obj-y += clock.o
obj-y += gpiolib.o
-obj-y += irq.o
+obj-y += irq.o irq-gpioint.o
obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
new file mode 100644
index 0000000..c172e37
--- /dev/null
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -0,0 +1,208 @@
+/*
+ * linux/arch/arm/plat-s5p/irq-gpioint.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co.Ltd
+ * Author: Kyungmin Park <kyungmin.park@samsung.com>
+ * Author: Joonyoung Shim <jy0922.shim@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+
+#include <mach/map.h>
+#include <plat/gpio-core.h>
+#include <plat/gpio-cfg.h>
+
+#define S5P_GPIOREG(x) (S5P_VA_GPIO + (x))
+
+#define GPIOINT_CON_OFFSET 0x700
+#define GPIOINT_MASK_OFFSET 0x900
+#define GPIOINT_PEND_OFFSET 0xA00
+
+#define GPIOINT_LEVEL_LOW 0x0
+#define GPIOINT_LEVEL_HIGH 0x1
+#define GPIOINT_EDGE_FALLING 0x2
+#define GPIOINT_EDGE_RISING 0x3
+#define GPIOINT_EDGE_BOTH 0x4
+
+static struct s3c_gpio_chip *s3c_chips[S5P_GPIOINT_GROUP_NR];
+
+static int s5p_gpioint_get_group(unsigned int irq)
+{
+ struct gpio_chip *chip = get_irq_data(irq);
+ struct s3c_gpio_chip *s3c_chip = container_of(chip,
+ struct s3c_gpio_chip, chip);
+ int group;
+
+ for (group = 0; group < S5P_GPIOINT_GROUP_NR; group++)
+ if (s3c_chip == s3c_chips[group])
+ break;
+
+ return group;
+}
+
+static int s5p_gpioint_get_offset(unsigned int irq)
+{
+ struct gpio_chip *chip = get_irq_data(irq);
+ return irq - S5P_IRQ_GPIOINT(chip->base);
+}
+
+static void s5p_gpioint_ack(unsigned int irq)
+{
+ int group, offset, pend_offset;
+ unsigned int value;
+
+ group = s5p_gpioint_get_group(irq);
+ offset = s5p_gpioint_get_offset(irq);
+ pend_offset = group << 2;
+
+ value = __raw_readl(S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
+ value |= 1 << offset;
+ __raw_writel(value, S5P_GPIOREG(GPIOINT_PEND_OFFSET) + pend_offset);
+}
+
+static void s5p_gpioint_mask(unsigned int irq)
+{
+ int group, offset, mask_offset;
+ unsigned int value;
+
+ group = s5p_gpioint_get_group(irq);
+ offset = s5p_gpioint_get_offset(irq);
+ mask_offset = group << 2;
+
+ value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
+ value |= 1 << offset;
+ __raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
+}
+
+static void s5p_gpioint_unmask(unsigned int irq)
+{
+ int group, offset, mask_offset;
+ unsigned int value;
+
+ group = s5p_gpioint_get_group(irq);
+ offset = s5p_gpioint_get_offset(irq);
+ mask_offset = group << 2;
+
+ value = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
+ value &= ~(1 << offset);
+ __raw_writel(value, S5P_GPIOREG(GPIOINT_MASK_OFFSET) + mask_offset);
+}
+
+static void s5p_gpioint_mask_ack(unsigned int irq)
+{
+ s5p_gpioint_mask(irq);
+ s5p_gpioint_ack(irq);
+}
+
+static int s5p_gpioint_set_type(unsigned int irq, unsigned int type)
+{
+ int group, offset, con_offset;
+ unsigned int value;
+
+ group = s5p_gpioint_get_group(irq);
+ offset = s5p_gpioint_get_offset(irq);
+ con_offset = group << 2;
+
+ switch (type) {
+ case IRQ_TYPE_NONE:
+ printk(KERN_WARNING "No irq type\n");
+ return -EINVAL;
+ case IRQ_TYPE_EDGE_RISING:
+ type = GPIOINT_EDGE_RISING;
+ break;
+ case IRQ_TYPE_EDGE_FALLING:
+ type = GPIOINT_EDGE_FALLING;
+ break;
+ case IRQ_TYPE_EDGE_BOTH:
+ type = GPIOINT_EDGE_BOTH;
+ break;
+ case IRQ_TYPE_LEVEL_HIGH:
+ type = GPIOINT_LEVEL_HIGH;
+ break;
+ case IRQ_TYPE_LEVEL_LOW:
+ type = GPIOINT_LEVEL_LOW;
+ break;
+ default:
+ BUG();
+ }
+
+ value = __raw_readl(S5P_GPIOREG(GPIOINT_CON_OFFSET) + con_offset);
+ value &= ~(0xf << (offset * 0x4));
+ value |= (type << (offset * 0x4));
+ __raw_writel(value, S5P_GPIOREG(GPIOINT_CON_OFFSET) + con_offset);
+
+ return 0;
+}
+
+struct irq_chip s5p_gpioint = {
+ .name = "GPIO",
+ .ack = s5p_gpioint_ack,
+ .mask = s5p_gpioint_mask,
+ .mask_ack = s5p_gpioint_mask_ack,
+ .unmask = s5p_gpioint_unmask,
+ .set_type = s5p_gpioint_set_type,
+};
+
+static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
+{
+ int group, offset, pend_offset, mask_offset;
+ int real_irq;
+ unsigned int pend, mask;
+
+ for (group = 0; group < S5P_GPIOINT_GROUP_NR; group++) {
+ pend_offset = group << 2;
+ pend = __raw_readl(S5P_GPIOREG(GPIOINT_PEND_OFFSET) +
+ pend_offset);
+ if (!pend)
+ continue;
+
+ mask_offset = group << 2;
+ mask = __raw_readl(S5P_GPIOREG(GPIOINT_MASK_OFFSET) +
+ mask_offset);
+ pend &= ~mask;
+
+ for (offset = 0; offset < 8; offset++) {
+ if (pend & (1 << offset)) {
+ real_irq = s3c_chips[group]->chip.base +
+ offset;
+ generic_handle_irq(S5P_IRQ_GPIOINT(real_irq));
+ }
+ }
+ }
+}
+
+void s5p_gpioint_add(struct s3c_gpio_chip *chip, int group)
+{
+ int irq;
+ int i;
+
+ s3c_chips[group] = chip;
+
+ for (i = 0; i < chip->chip.ngpio; i++) {
+ irq = S5P_GPIOINT_BASE + chip->chip.base + i;
+ set_irq_chip(irq, &s5p_gpioint);
+ set_irq_data(irq, &chip->chip);
+ set_irq_handler(irq, handle_level_irq);
+ set_irq_flags(irq, IRQF_VALID);
+ }
+}
+
+int __init s5p_gpioint_init(void)
+{
+ /* register gpio interrupt handler */
+ set_irq_chained_handler(IRQ_GPIOINT, s5p_gpioint_handler);
+
+ return 0;
+}
+
+arch_initcall(s5p_gpioint_init);
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index f6c5151..a6b844c 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -123,6 +123,8 @@ extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default;
extern int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset);
+extern void s5p_gpioint_add(struct s3c_gpio_chip *chip, int group);
+
#ifdef CONFIG_S3C_GPIO_TRACK
extern struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END];
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 6/7] ARM: S5PC100: Use S5P gpio interrupts interface
2010-06-03 5:01 ` Joonyoung Shim
@ 2010-06-03 5:01 ` Joonyoung Shim
-1 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 5:01 UTC (permalink / raw)
To: ben-linux; +Cc: linux-arm-kernel, linux-samsung-soc, kyungmin.park
The s5pc100 can use s5p gpio interrupts codes instead of s5pc100
specific gpio interrupts codes.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pc100/Makefile | 2 +-
arch/arm/mach-s5pc100/gpiolib.c | 37 +---
arch/arm/mach-s5pc100/include/mach/irqs.h | 18 ++-
arch/arm/mach-s5pc100/irq-gpio.c | 266 -----------------------------
4 files changed, 24 insertions(+), 299 deletions(-)
delete mode 100644 arch/arm/mach-s5pc100/irq-gpio.c
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index 543f3de..e9723f8 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -11,7 +11,7 @@ obj- :=
# Core support for S5PC100 system
-obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o gpiolib.o irq-gpio.o
+obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o gpiolib.o
obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o
obj-$(CONFIG_CPU_S5PC100) += dma.o
diff --git a/arch/arm/mach-s5pc100/gpiolib.c b/arch/arm/mach-s5pc100/gpiolib.c
index 60704ef..a34a700 100644
--- a/arch/arm/mach-s5pc100/gpiolib.c
+++ b/arch/arm/mach-s5pc100/gpiolib.c
@@ -63,7 +63,7 @@
static int s5pc100_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
{
- return S3C_IRQ_GPIO(chip->base + offset);
+ return S5P_IRQ_GPIOINT(chip->base + offset);
}
static struct s3c_gpio_cfg gpio_cfg = {
@@ -365,45 +365,26 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
},
};
-/* FIXME move from irq-gpio.c */
-extern struct irq_chip s5pc100_gpioint;
-extern void s5pc100_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc);
-
-static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
-{
- /* Interrupt */
- if (chip->config == &gpio_cfg) {
- int i, irq;
-
- chip->chip.to_irq = s5pc100_gpiolib_to_irq;
-
- for (i = 0; i < chip->chip.ngpio; i++) {
- irq = S3C_IRQ_GPIO_BASE + chip->chip.base + i;
- set_irq_chip(irq, &s5pc100_gpioint);
- set_irq_data(irq, &chip->chip);
- set_irq_handler(irq, handle_level_irq);
- set_irq_flags(irq, IRQF_VALID);
- }
- }
-}
-
static __init int s5pc100_gpiolib_init(void)
{
struct s3c_gpio_chip *chip;
int nr_chips;
+ int gpioint_group = 0;
chip = s5pc100_gpio_chips;
nr_chips = ARRAY_SIZE(s5pc100_gpio_chips);
- for (; nr_chips > 0; nr_chips--, chip++)
- s5pc100_gpiolib_link(chip);
+ for (; nr_chips > 0; nr_chips--, chip++) {
+ if (chip->config == &gpio_cfg) {
+ /* gpio interrupts */
+ chip->chip.to_irq = s5pc100_gpiolib_to_irq;
+ s5p_gpioint_add(chip, gpioint_group++);
+ }
+ }
samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips,
ARRAY_SIZE(s5pc100_gpio_chips));
- /* Interrupt */
- set_irq_chained_handler(IRQ_GPIOINT, s5pc100_irq_gpioint_handler);
-
return 0;
}
core_initcall(s5pc100_gpiolib_init);
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index 28aa551..8f725bd 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -100,11 +100,21 @@
#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
-#define S3C_IRQ_GPIO_BASE (IRQ_EINT(31) + 1)
-#define S3C_IRQ_GPIO(x) (S3C_IRQ_GPIO_BASE + (x))
+#define S5P_GPIOINT_GROUP_NR 21
+#define S5P_GPIOINT_BASE (IRQ_EINT(31) + 1)
+#define S5P_IRQ_GPIOINT(x) (S5P_GPIOINT_BASE + (x))
-/* Until MP04 Groups -> 40 (exactly 39) Groups * 8 ~= 320 GPIOs */
-#define NR_IRQS (S3C_IRQ_GPIO(320) + 1)
+/* Set the default NR_IRQS */
+
+/*
+ * GPIO groups is 25. Each GPIO group can have max 8 GPIO interrupts.
+ *
+ * We should include gpios of all gpio groups from GPIO_A0 until GPIO_J4 to
+ * NR_IRQS because 21 gpio groups having gpio interrupts aren't in order and
+ * are mixed with no interrupt gpio groups, then it can give simple irq
+ * computation of gpio interrupts.
+ */
+#define NR_IRQS (S5P_IRQ_GPIOINT(25 * 8) + 1)
/* Compatibility */
#define IRQ_LCD_FIFO IRQ_LCD0
diff --git a/arch/arm/mach-s5pc100/irq-gpio.c b/arch/arm/mach-s5pc100/irq-gpio.c
deleted file mode 100644
index 2bf86c1..0000000
--- a/arch/arm/mach-s5pc100/irq-gpio.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*
- * arch/arm/mach-s5pc100/irq-gpio.c
- *
- * Copyright (C) 2009 Samsung Electronics
- *
- * S5PC100 - Interrupt handling for IRQ_GPIO${group}(x)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/gpio.h>
-
-#include <mach/map.h>
-#include <plat/gpio-cfg.h>
-
-#define S5P_GPIOREG(x) (S5P_VA_GPIO + (x))
-
-#define CON_OFFSET 0x700
-#define MASK_OFFSET 0x900
-#define PEND_OFFSET 0xA00
-#define CON_OFFSET_2 0xE00
-#define MASK_OFFSET_2 0xF00
-#define PEND_OFFSET_2 0xF40
-
-#define GPIOINT_LEVEL_LOW 0x0
-#define GPIOINT_LEVEL_HIGH 0x1
-#define GPIOINT_EDGE_FALLING 0x2
-#define GPIOINT_EDGE_RISING 0x3
-#define GPIOINT_EDGE_BOTH 0x4
-
-static int group_to_con_offset(int group)
-{
- return group << 2;
-}
-
-static int group_to_mask_offset(int group)
-{
- return group << 2;
-}
-
-static int group_to_pend_offset(int group)
-{
- return group << 2;
-}
-
-static int s5pc100_get_start(unsigned int group)
-{
- switch (group) {
- case 0: return S5PC100_GPIO_A0_START;
- case 1: return S5PC100_GPIO_A1_START;
- case 2: return S5PC100_GPIO_B_START;
- case 3: return S5PC100_GPIO_C_START;
- case 4: return S5PC100_GPIO_D_START;
- case 5: return S5PC100_GPIO_E0_START;
- case 6: return S5PC100_GPIO_E1_START;
- case 7: return S5PC100_GPIO_F0_START;
- case 8: return S5PC100_GPIO_F1_START;
- case 9: return S5PC100_GPIO_F2_START;
- case 10: return S5PC100_GPIO_F3_START;
- case 11: return S5PC100_GPIO_G0_START;
- case 12: return S5PC100_GPIO_G1_START;
- case 13: return S5PC100_GPIO_G2_START;
- case 14: return S5PC100_GPIO_G3_START;
- case 15: return S5PC100_GPIO_I_START;
- case 16: return S5PC100_GPIO_J0_START;
- case 17: return S5PC100_GPIO_J1_START;
- case 18: return S5PC100_GPIO_J2_START;
- case 19: return S5PC100_GPIO_J3_START;
- case 20: return S5PC100_GPIO_J4_START;
- default:
- BUG();
- }
-
- return -EINVAL;
-}
-
-static int s5pc100_get_group(unsigned int irq)
-{
- irq -= S3C_IRQ_GPIO(0);
-
- switch (irq) {
- case S5PC100_GPIO_A0_START ... S5PC100_GPIO_A1_START - 1:
- return 0;
- case S5PC100_GPIO_A1_START ... S5PC100_GPIO_B_START - 1:
- return 1;
- case S5PC100_GPIO_B_START ... S5PC100_GPIO_C_START - 1:
- return 2;
- case S5PC100_GPIO_C_START ... S5PC100_GPIO_D_START - 1:
- return 3;
- case S5PC100_GPIO_D_START ... S5PC100_GPIO_E0_START - 1:
- return 4;
- case S5PC100_GPIO_E0_START ... S5PC100_GPIO_E1_START - 1:
- return 5;
- case S5PC100_GPIO_E1_START ... S5PC100_GPIO_F0_START - 1:
- return 6;
- case S5PC100_GPIO_F0_START ... S5PC100_GPIO_F1_START - 1:
- return 7;
- case S5PC100_GPIO_F1_START ... S5PC100_GPIO_F2_START - 1:
- return 8;
- case S5PC100_GPIO_F2_START ... S5PC100_GPIO_F3_START - 1:
- return 9;
- case S5PC100_GPIO_F3_START ... S5PC100_GPIO_G0_START - 1:
- return 10;
- case S5PC100_GPIO_G0_START ... S5PC100_GPIO_G1_START - 1:
- return 11;
- case S5PC100_GPIO_G1_START ... S5PC100_GPIO_G2_START - 1:
- return 12;
- case S5PC100_GPIO_G2_START ... S5PC100_GPIO_G3_START - 1:
- return 13;
- case S5PC100_GPIO_G3_START ... S5PC100_GPIO_H0_START - 1:
- return 14;
- case S5PC100_GPIO_I_START ... S5PC100_GPIO_J0_START - 1:
- return 15;
- case S5PC100_GPIO_J0_START ... S5PC100_GPIO_J1_START - 1:
- return 16;
- case S5PC100_GPIO_J1_START ... S5PC100_GPIO_J2_START - 1:
- return 17;
- case S5PC100_GPIO_J2_START ... S5PC100_GPIO_J3_START - 1:
- return 18;
- case S5PC100_GPIO_J3_START ... S5PC100_GPIO_J4_START - 1:
- return 19;
- case S5PC100_GPIO_J4_START ... S5PC100_GPIO_K0_START - 1:
- return 20;
- default:
- BUG();
- }
-
- return -EINVAL;
-}
-
-static int s5pc100_get_offset(unsigned int irq)
-{
- struct gpio_chip *chip = get_irq_data(irq);
- return irq - S3C_IRQ_GPIO(chip->base);
-}
-
-static void s5pc100_gpioint_ack(unsigned int irq)
-{
- int group, offset, pend_offset;
- unsigned int value;
-
- group = s5pc100_get_group(irq);
- offset = s5pc100_get_offset(irq);
- pend_offset = group_to_pend_offset(group);
-
- value = __raw_readl(S5P_GPIOREG(PEND_OFFSET) + pend_offset);
- value |= 1 << offset;
- __raw_writel(value, S5P_GPIOREG(PEND_OFFSET) + pend_offset);
-}
-
-static void s5pc100_gpioint_mask(unsigned int irq)
-{
- int group, offset, mask_offset;
- unsigned int value;
-
- group = s5pc100_get_group(irq);
- offset = s5pc100_get_offset(irq);
- mask_offset = group_to_mask_offset(group);
-
- value = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset);
- value |= 1 << offset;
- __raw_writel(value, S5P_GPIOREG(MASK_OFFSET) + mask_offset);
-}
-
-static void s5pc100_gpioint_unmask(unsigned int irq)
-{
- int group, offset, mask_offset;
- unsigned int value;
-
- group = s5pc100_get_group(irq);
- offset = s5pc100_get_offset(irq);
- mask_offset = group_to_mask_offset(group);
-
- value = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset);
- value &= ~(1 << offset);
- __raw_writel(value, S5P_GPIOREG(MASK_OFFSET) + mask_offset);
-}
-
-static void s5pc100_gpioint_mask_ack(unsigned int irq)
-{
- s5pc100_gpioint_mask(irq);
- s5pc100_gpioint_ack(irq);
-}
-
-static int s5pc100_gpioint_set_type(unsigned int irq, unsigned int type)
-{
- int group, offset, con_offset;
- unsigned int value;
-
- group = s5pc100_get_group(irq);
- offset = s5pc100_get_offset(irq);
- con_offset = group_to_con_offset(group);
-
- switch (type) {
- case IRQ_TYPE_NONE:
- printk(KERN_WARNING "No irq type\n");
- return -EINVAL;
- case IRQ_TYPE_EDGE_RISING:
- type = GPIOINT_EDGE_RISING;
- break;
- case IRQ_TYPE_EDGE_FALLING:
- type = GPIOINT_EDGE_FALLING;
- break;
- case IRQ_TYPE_EDGE_BOTH:
- type = GPIOINT_EDGE_BOTH;
- break;
- case IRQ_TYPE_LEVEL_HIGH:
- type = GPIOINT_LEVEL_HIGH;
- break;
- case IRQ_TYPE_LEVEL_LOW:
- type = GPIOINT_LEVEL_LOW;
- break;
- default:
- BUG();
- }
-
-
- value = __raw_readl(S5P_GPIOREG(CON_OFFSET) + con_offset);
- value &= ~(0xf << (offset * 0x4));
- value |= (type << (offset * 0x4));
- __raw_writel(value, S5P_GPIOREG(CON_OFFSET) + con_offset);
-
- return 0;
-}
-
-struct irq_chip s5pc100_gpioint = {
- .name = "GPIO",
- .ack = s5pc100_gpioint_ack,
- .mask = s5pc100_gpioint_mask,
- .mask_ack = s5pc100_gpioint_mask_ack,
- .unmask = s5pc100_gpioint_unmask,
- .set_type = s5pc100_gpioint_set_type,
-};
-
-void s5pc100_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc)
-{
- int group, offset, pend_offset, mask_offset;
- int real_irq, group_end;
- unsigned int pend, mask;
-
- group_end = 21;
-
- for (group = 0; group < group_end; group++) {
- pend_offset = group_to_pend_offset(group);
- pend = __raw_readl(S5P_GPIOREG(PEND_OFFSET) + pend_offset);
- if (!pend)
- continue;
-
- mask_offset = group_to_mask_offset(group);
- mask = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset);
- pend &= ~mask;
-
- for (offset = 0; offset < 8; offset++) {
- if (pend & (1 << offset)) {
- real_irq = s5pc100_get_start(group) + offset;
- generic_handle_irq(S3C_IRQ_GPIO(real_irq));
- }
- }
- }
-}
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 6/7] ARM: S5PC100: Use S5P gpio interrupts interface
@ 2010-06-03 5:01 ` Joonyoung Shim
0 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 5:01 UTC (permalink / raw)
To: linux-arm-kernel
The s5pc100 can use s5p gpio interrupts codes instead of s5pc100
specific gpio interrupts codes.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pc100/Makefile | 2 +-
arch/arm/mach-s5pc100/gpiolib.c | 37 +---
arch/arm/mach-s5pc100/include/mach/irqs.h | 18 ++-
arch/arm/mach-s5pc100/irq-gpio.c | 266 -----------------------------
4 files changed, 24 insertions(+), 299 deletions(-)
delete mode 100644 arch/arm/mach-s5pc100/irq-gpio.c
diff --git a/arch/arm/mach-s5pc100/Makefile b/arch/arm/mach-s5pc100/Makefile
index 543f3de..e9723f8 100644
--- a/arch/arm/mach-s5pc100/Makefile
+++ b/arch/arm/mach-s5pc100/Makefile
@@ -11,7 +11,7 @@ obj- :=
# Core support for S5PC100 system
-obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o gpiolib.o irq-gpio.o
+obj-$(CONFIG_CPU_S5PC100) += cpu.o init.o clock.o gpiolib.o
obj-$(CONFIG_CPU_S5PC100) += setup-i2c0.o
obj-$(CONFIG_CPU_S5PC100) += dma.o
diff --git a/arch/arm/mach-s5pc100/gpiolib.c b/arch/arm/mach-s5pc100/gpiolib.c
index 60704ef..a34a700 100644
--- a/arch/arm/mach-s5pc100/gpiolib.c
+++ b/arch/arm/mach-s5pc100/gpiolib.c
@@ -63,7 +63,7 @@
static int s5pc100_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
{
- return S3C_IRQ_GPIO(chip->base + offset);
+ return S5P_IRQ_GPIOINT(chip->base + offset);
}
static struct s3c_gpio_cfg gpio_cfg = {
@@ -365,45 +365,26 @@ static struct s3c_gpio_chip s5pc100_gpio_chips[] = {
},
};
-/* FIXME move from irq-gpio.c */
-extern struct irq_chip s5pc100_gpioint;
-extern void s5pc100_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc);
-
-static __init void s5pc100_gpiolib_link(struct s3c_gpio_chip *chip)
-{
- /* Interrupt */
- if (chip->config == &gpio_cfg) {
- int i, irq;
-
- chip->chip.to_irq = s5pc100_gpiolib_to_irq;
-
- for (i = 0; i < chip->chip.ngpio; i++) {
- irq = S3C_IRQ_GPIO_BASE + chip->chip.base + i;
- set_irq_chip(irq, &s5pc100_gpioint);
- set_irq_data(irq, &chip->chip);
- set_irq_handler(irq, handle_level_irq);
- set_irq_flags(irq, IRQF_VALID);
- }
- }
-}
-
static __init int s5pc100_gpiolib_init(void)
{
struct s3c_gpio_chip *chip;
int nr_chips;
+ int gpioint_group = 0;
chip = s5pc100_gpio_chips;
nr_chips = ARRAY_SIZE(s5pc100_gpio_chips);
- for (; nr_chips > 0; nr_chips--, chip++)
- s5pc100_gpiolib_link(chip);
+ for (; nr_chips > 0; nr_chips--, chip++) {
+ if (chip->config == &gpio_cfg) {
+ /* gpio interrupts */
+ chip->chip.to_irq = s5pc100_gpiolib_to_irq;
+ s5p_gpioint_add(chip, gpioint_group++);
+ }
+ }
samsung_gpiolib_add_4bit_chips(s5pc100_gpio_chips,
ARRAY_SIZE(s5pc100_gpio_chips));
- /* Interrupt */
- set_irq_chained_handler(IRQ_GPIOINT, s5pc100_irq_gpioint_handler);
-
return 0;
}
core_initcall(s5pc100_gpiolib_init);
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index 28aa551..8f725bd 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -100,11 +100,21 @@
#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
-#define S3C_IRQ_GPIO_BASE (IRQ_EINT(31) + 1)
-#define S3C_IRQ_GPIO(x) (S3C_IRQ_GPIO_BASE + (x))
+#define S5P_GPIOINT_GROUP_NR 21
+#define S5P_GPIOINT_BASE (IRQ_EINT(31) + 1)
+#define S5P_IRQ_GPIOINT(x) (S5P_GPIOINT_BASE + (x))
-/* Until MP04 Groups -> 40 (exactly 39) Groups * 8 ~= 320 GPIOs */
-#define NR_IRQS (S3C_IRQ_GPIO(320) + 1)
+/* Set the default NR_IRQS */
+
+/*
+ * GPIO groups is 25. Each GPIO group can have max 8 GPIO interrupts.
+ *
+ * We should include gpios of all gpio groups from GPIO_A0 until GPIO_J4 to
+ * NR_IRQS because 21 gpio groups having gpio interrupts aren't in order and
+ * are mixed with no interrupt gpio groups, then it can give simple irq
+ * computation of gpio interrupts.
+ */
+#define NR_IRQS (S5P_IRQ_GPIOINT(25 * 8) + 1)
/* Compatibility */
#define IRQ_LCD_FIFO IRQ_LCD0
diff --git a/arch/arm/mach-s5pc100/irq-gpio.c b/arch/arm/mach-s5pc100/irq-gpio.c
deleted file mode 100644
index 2bf86c1..0000000
--- a/arch/arm/mach-s5pc100/irq-gpio.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*
- * arch/arm/mach-s5pc100/irq-gpio.c
- *
- * Copyright (C) 2009 Samsung Electronics
- *
- * S5PC100 - Interrupt handling for IRQ_GPIO${group}(x)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/gpio.h>
-
-#include <mach/map.h>
-#include <plat/gpio-cfg.h>
-
-#define S5P_GPIOREG(x) (S5P_VA_GPIO + (x))
-
-#define CON_OFFSET 0x700
-#define MASK_OFFSET 0x900
-#define PEND_OFFSET 0xA00
-#define CON_OFFSET_2 0xE00
-#define MASK_OFFSET_2 0xF00
-#define PEND_OFFSET_2 0xF40
-
-#define GPIOINT_LEVEL_LOW 0x0
-#define GPIOINT_LEVEL_HIGH 0x1
-#define GPIOINT_EDGE_FALLING 0x2
-#define GPIOINT_EDGE_RISING 0x3
-#define GPIOINT_EDGE_BOTH 0x4
-
-static int group_to_con_offset(int group)
-{
- return group << 2;
-}
-
-static int group_to_mask_offset(int group)
-{
- return group << 2;
-}
-
-static int group_to_pend_offset(int group)
-{
- return group << 2;
-}
-
-static int s5pc100_get_start(unsigned int group)
-{
- switch (group) {
- case 0: return S5PC100_GPIO_A0_START;
- case 1: return S5PC100_GPIO_A1_START;
- case 2: return S5PC100_GPIO_B_START;
- case 3: return S5PC100_GPIO_C_START;
- case 4: return S5PC100_GPIO_D_START;
- case 5: return S5PC100_GPIO_E0_START;
- case 6: return S5PC100_GPIO_E1_START;
- case 7: return S5PC100_GPIO_F0_START;
- case 8: return S5PC100_GPIO_F1_START;
- case 9: return S5PC100_GPIO_F2_START;
- case 10: return S5PC100_GPIO_F3_START;
- case 11: return S5PC100_GPIO_G0_START;
- case 12: return S5PC100_GPIO_G1_START;
- case 13: return S5PC100_GPIO_G2_START;
- case 14: return S5PC100_GPIO_G3_START;
- case 15: return S5PC100_GPIO_I_START;
- case 16: return S5PC100_GPIO_J0_START;
- case 17: return S5PC100_GPIO_J1_START;
- case 18: return S5PC100_GPIO_J2_START;
- case 19: return S5PC100_GPIO_J3_START;
- case 20: return S5PC100_GPIO_J4_START;
- default:
- BUG();
- }
-
- return -EINVAL;
-}
-
-static int s5pc100_get_group(unsigned int irq)
-{
- irq -= S3C_IRQ_GPIO(0);
-
- switch (irq) {
- case S5PC100_GPIO_A0_START ... S5PC100_GPIO_A1_START - 1:
- return 0;
- case S5PC100_GPIO_A1_START ... S5PC100_GPIO_B_START - 1:
- return 1;
- case S5PC100_GPIO_B_START ... S5PC100_GPIO_C_START - 1:
- return 2;
- case S5PC100_GPIO_C_START ... S5PC100_GPIO_D_START - 1:
- return 3;
- case S5PC100_GPIO_D_START ... S5PC100_GPIO_E0_START - 1:
- return 4;
- case S5PC100_GPIO_E0_START ... S5PC100_GPIO_E1_START - 1:
- return 5;
- case S5PC100_GPIO_E1_START ... S5PC100_GPIO_F0_START - 1:
- return 6;
- case S5PC100_GPIO_F0_START ... S5PC100_GPIO_F1_START - 1:
- return 7;
- case S5PC100_GPIO_F1_START ... S5PC100_GPIO_F2_START - 1:
- return 8;
- case S5PC100_GPIO_F2_START ... S5PC100_GPIO_F3_START - 1:
- return 9;
- case S5PC100_GPIO_F3_START ... S5PC100_GPIO_G0_START - 1:
- return 10;
- case S5PC100_GPIO_G0_START ... S5PC100_GPIO_G1_START - 1:
- return 11;
- case S5PC100_GPIO_G1_START ... S5PC100_GPIO_G2_START - 1:
- return 12;
- case S5PC100_GPIO_G2_START ... S5PC100_GPIO_G3_START - 1:
- return 13;
- case S5PC100_GPIO_G3_START ... S5PC100_GPIO_H0_START - 1:
- return 14;
- case S5PC100_GPIO_I_START ... S5PC100_GPIO_J0_START - 1:
- return 15;
- case S5PC100_GPIO_J0_START ... S5PC100_GPIO_J1_START - 1:
- return 16;
- case S5PC100_GPIO_J1_START ... S5PC100_GPIO_J2_START - 1:
- return 17;
- case S5PC100_GPIO_J2_START ... S5PC100_GPIO_J3_START - 1:
- return 18;
- case S5PC100_GPIO_J3_START ... S5PC100_GPIO_J4_START - 1:
- return 19;
- case S5PC100_GPIO_J4_START ... S5PC100_GPIO_K0_START - 1:
- return 20;
- default:
- BUG();
- }
-
- return -EINVAL;
-}
-
-static int s5pc100_get_offset(unsigned int irq)
-{
- struct gpio_chip *chip = get_irq_data(irq);
- return irq - S3C_IRQ_GPIO(chip->base);
-}
-
-static void s5pc100_gpioint_ack(unsigned int irq)
-{
- int group, offset, pend_offset;
- unsigned int value;
-
- group = s5pc100_get_group(irq);
- offset = s5pc100_get_offset(irq);
- pend_offset = group_to_pend_offset(group);
-
- value = __raw_readl(S5P_GPIOREG(PEND_OFFSET) + pend_offset);
- value |= 1 << offset;
- __raw_writel(value, S5P_GPIOREG(PEND_OFFSET) + pend_offset);
-}
-
-static void s5pc100_gpioint_mask(unsigned int irq)
-{
- int group, offset, mask_offset;
- unsigned int value;
-
- group = s5pc100_get_group(irq);
- offset = s5pc100_get_offset(irq);
- mask_offset = group_to_mask_offset(group);
-
- value = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset);
- value |= 1 << offset;
- __raw_writel(value, S5P_GPIOREG(MASK_OFFSET) + mask_offset);
-}
-
-static void s5pc100_gpioint_unmask(unsigned int irq)
-{
- int group, offset, mask_offset;
- unsigned int value;
-
- group = s5pc100_get_group(irq);
- offset = s5pc100_get_offset(irq);
- mask_offset = group_to_mask_offset(group);
-
- value = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset);
- value &= ~(1 << offset);
- __raw_writel(value, S5P_GPIOREG(MASK_OFFSET) + mask_offset);
-}
-
-static void s5pc100_gpioint_mask_ack(unsigned int irq)
-{
- s5pc100_gpioint_mask(irq);
- s5pc100_gpioint_ack(irq);
-}
-
-static int s5pc100_gpioint_set_type(unsigned int irq, unsigned int type)
-{
- int group, offset, con_offset;
- unsigned int value;
-
- group = s5pc100_get_group(irq);
- offset = s5pc100_get_offset(irq);
- con_offset = group_to_con_offset(group);
-
- switch (type) {
- case IRQ_TYPE_NONE:
- printk(KERN_WARNING "No irq type\n");
- return -EINVAL;
- case IRQ_TYPE_EDGE_RISING:
- type = GPIOINT_EDGE_RISING;
- break;
- case IRQ_TYPE_EDGE_FALLING:
- type = GPIOINT_EDGE_FALLING;
- break;
- case IRQ_TYPE_EDGE_BOTH:
- type = GPIOINT_EDGE_BOTH;
- break;
- case IRQ_TYPE_LEVEL_HIGH:
- type = GPIOINT_LEVEL_HIGH;
- break;
- case IRQ_TYPE_LEVEL_LOW:
- type = GPIOINT_LEVEL_LOW;
- break;
- default:
- BUG();
- }
-
-
- value = __raw_readl(S5P_GPIOREG(CON_OFFSET) + con_offset);
- value &= ~(0xf << (offset * 0x4));
- value |= (type << (offset * 0x4));
- __raw_writel(value, S5P_GPIOREG(CON_OFFSET) + con_offset);
-
- return 0;
-}
-
-struct irq_chip s5pc100_gpioint = {
- .name = "GPIO",
- .ack = s5pc100_gpioint_ack,
- .mask = s5pc100_gpioint_mask,
- .mask_ack = s5pc100_gpioint_mask_ack,
- .unmask = s5pc100_gpioint_unmask,
- .set_type = s5pc100_gpioint_set_type,
-};
-
-void s5pc100_irq_gpioint_handler(unsigned int irq, struct irq_desc *desc)
-{
- int group, offset, pend_offset, mask_offset;
- int real_irq, group_end;
- unsigned int pend, mask;
-
- group_end = 21;
-
- for (group = 0; group < group_end; group++) {
- pend_offset = group_to_pend_offset(group);
- pend = __raw_readl(S5P_GPIOREG(PEND_OFFSET) + pend_offset);
- if (!pend)
- continue;
-
- mask_offset = group_to_mask_offset(group);
- mask = __raw_readl(S5P_GPIOREG(MASK_OFFSET) + mask_offset);
- pend &= ~mask;
-
- for (offset = 0; offset < 8; offset++) {
- if (pend & (1 << offset)) {
- real_irq = s5pc100_get_start(group) + offset;
- generic_handle_irq(S3C_IRQ_GPIO(real_irq));
- }
- }
- }
-}
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 7/7] ARM: S5P: Add GPIOlib gpio_to_irq for gpio interrupts
2010-06-03 5:01 ` Joonyoung Shim
@ 2010-06-03 5:01 ` Joonyoung Shim
-1 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 5:01 UTC (permalink / raw)
To: ben-linux; +Cc: linux-arm-kernel, linux-samsung-soc, kyungmin.park
This patch is to support gpio_to_irq() of GPIOlib for gpio interrupts on
s5p cpus. The gpio_to_irq() calls s5p_gpiolib_gpioint_to_irq function.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pc100/gpiolib.c | 7 +------
arch/arm/mach-s5pv210/gpiolib.c | 1 +
arch/arm/plat-s5p/gpiolib.c | 7 +++++++
arch/arm/plat-samsung/include/plat/gpio-core.h | 2 ++
4 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-s5pc100/gpiolib.c b/arch/arm/mach-s5pc100/gpiolib.c
index a34a700..2dcb501 100644
--- a/arch/arm/mach-s5pc100/gpiolib.c
+++ b/arch/arm/mach-s5pc100/gpiolib.c
@@ -61,11 +61,6 @@
* L3 8 4Bit None
*/
-static int s5pc100_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
-{
- return S5P_IRQ_GPIOINT(chip->base + offset);
-}
-
static struct s3c_gpio_cfg gpio_cfg = {
.set_config = s3c_gpio_setcfg_s3c64xx_4bit,
.set_pull = s3c_gpio_setpull_updown,
@@ -377,7 +372,7 @@ static __init int s5pc100_gpiolib_init(void)
for (; nr_chips > 0; nr_chips--, chip++) {
if (chip->config == &gpio_cfg) {
/* gpio interrupts */
- chip->chip.to_irq = s5pc100_gpiolib_to_irq;
+ chip->chip.to_irq = s5p_gpiolib_gpioint_to_irq;
s5p_gpioint_add(chip, gpioint_group++);
}
}
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c
index 166725f..f4ac81f 100644
--- a/arch/arm/mach-s5pv210/gpiolib.c
+++ b/arch/arm/mach-s5pv210/gpiolib.c
@@ -258,6 +258,7 @@ static __init int s5pv210_gpiolib_init(void)
chip->config = &gpio_cfg;
/* gpio interrupts */
+ chip->chip.to_irq = s5p_gpiolib_gpioint_to_irq;
s5p_gpioint_add(chip, gpioint_group++);
}
if (chip->base == NULL)
diff --git a/arch/arm/plat-s5p/gpiolib.c b/arch/arm/plat-s5p/gpiolib.c
index 0c27a9d..dcd1ee4 100644
--- a/arch/arm/plat-s5p/gpiolib.c
+++ b/arch/arm/plat-s5p/gpiolib.c
@@ -33,3 +33,10 @@ int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset)
return -EINVAL;
}
}
+
+/* be called from gpio_to_irq() for gpio interrupts */
+int s5p_gpiolib_gpioint_to_irq(struct gpio_chip *chip, unsigned int offset)
+{
+ return S5P_IRQ_GPIOINT(chip->base + offset);
+}
+
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index a6b844c..d484aaf 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -122,6 +122,8 @@ extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default;
extern int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset);
+extern int s5p_gpiolib_gpioint_to_irq(struct gpio_chip *chip,
+ unsigned int offset);
extern void s5p_gpioint_add(struct s3c_gpio_chip *chip, int group);
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 7/7] ARM: S5P: Add GPIOlib gpio_to_irq for gpio interrupts
@ 2010-06-03 5:01 ` Joonyoung Shim
0 siblings, 0 replies; 18+ messages in thread
From: Joonyoung Shim @ 2010-06-03 5:01 UTC (permalink / raw)
To: linux-arm-kernel
This patch is to support gpio_to_irq() of GPIOlib for gpio interrupts on
s5p cpus. The gpio_to_irq() calls s5p_gpiolib_gpioint_to_irq function.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
arch/arm/mach-s5pc100/gpiolib.c | 7 +------
arch/arm/mach-s5pv210/gpiolib.c | 1 +
arch/arm/plat-s5p/gpiolib.c | 7 +++++++
arch/arm/plat-samsung/include/plat/gpio-core.h | 2 ++
4 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-s5pc100/gpiolib.c b/arch/arm/mach-s5pc100/gpiolib.c
index a34a700..2dcb501 100644
--- a/arch/arm/mach-s5pc100/gpiolib.c
+++ b/arch/arm/mach-s5pc100/gpiolib.c
@@ -61,11 +61,6 @@
* L3 8 4Bit None
*/
-static int s5pc100_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset)
-{
- return S5P_IRQ_GPIOINT(chip->base + offset);
-}
-
static struct s3c_gpio_cfg gpio_cfg = {
.set_config = s3c_gpio_setcfg_s3c64xx_4bit,
.set_pull = s3c_gpio_setpull_updown,
@@ -377,7 +372,7 @@ static __init int s5pc100_gpiolib_init(void)
for (; nr_chips > 0; nr_chips--, chip++) {
if (chip->config == &gpio_cfg) {
/* gpio interrupts */
- chip->chip.to_irq = s5pc100_gpiolib_to_irq;
+ chip->chip.to_irq = s5p_gpiolib_gpioint_to_irq;
s5p_gpioint_add(chip, gpioint_group++);
}
}
diff --git a/arch/arm/mach-s5pv210/gpiolib.c b/arch/arm/mach-s5pv210/gpiolib.c
index 166725f..f4ac81f 100644
--- a/arch/arm/mach-s5pv210/gpiolib.c
+++ b/arch/arm/mach-s5pv210/gpiolib.c
@@ -258,6 +258,7 @@ static __init int s5pv210_gpiolib_init(void)
chip->config = &gpio_cfg;
/* gpio interrupts */
+ chip->chip.to_irq = s5p_gpiolib_gpioint_to_irq;
s5p_gpioint_add(chip, gpioint_group++);
}
if (chip->base == NULL)
diff --git a/arch/arm/plat-s5p/gpiolib.c b/arch/arm/plat-s5p/gpiolib.c
index 0c27a9d..dcd1ee4 100644
--- a/arch/arm/plat-s5p/gpiolib.c
+++ b/arch/arm/plat-s5p/gpiolib.c
@@ -33,3 +33,10 @@ int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset)
return -EINVAL;
}
}
+
+/* be called from gpio_to_irq() for gpio interrupts */
+int s5p_gpiolib_gpioint_to_irq(struct gpio_chip *chip, unsigned int offset)
+{
+ return S5P_IRQ_GPIOINT(chip->base + offset);
+}
+
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index a6b844c..d484aaf 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -122,6 +122,8 @@ extern void samsung_gpiolib_add_4bit2(struct s3c_gpio_chip *chip);
extern struct s3c_gpio_cfg s3c24xx_gpiocfg_default;
extern int s5p_gpiolib_eint_to_irq(struct gpio_chip *chip, unsigned int offset);
+extern int s5p_gpiolib_gpioint_to_irq(struct gpio_chip *chip,
+ unsigned int offset);
extern void s5p_gpioint_add(struct s3c_gpio_chip *chip, int group);
--
1.7.0.4
^ permalink raw reply related [flat|nested] 18+ messages in thread