[U-Boot] [PATCH V3 1/4] ide: add configuration CONFIG_IDE_SWAP_IO

[U-Boot] [PATCH V3 1/4] ide: add configuration CONFIG_IDE_SWAP_IO

[Albert Aribaud]

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
---
This patch set introduces CONFIG_IDE_SWAP_IO as suggested by
Wolfgang Denk, adds orion5x support to cmd_ide.c and adds IDE
support to edminiv2.

Patchset history:

V1: Initial 4-patch set -- not cleanly submitted (does
    not appear on gmane for instance) and contained some
    unrelated changes.

V2: Slimmed down to 3 patches and removed unrelated
    changes.

V3: Back to 4 patches (cmd_ide improvement, driver addition,
    cmd_ide support for orion, edminiv2 support for sata);
    made initialization code reuseable as a block driver ;
    moved to C structures; commented some constants.

 arch/powerpc/include/asm/config.h |    3 +++
 common/cmd_ide.c                  |   18 +++++++++---------
 doc/README.PXA_CF                 |    8 ++++++++
 include/configs/ap325rxa.h        |    1 +
 include/configs/ms7720se.h        |    1 +
 include/configs/r2dplus.h         |    1 +
 include/configs/r7780mp.h         |    1 +
 7 files changed, 24 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index fc3facb..371989d 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -76,4 +76,7 @@
 /* Relocation to SDRAM works on all PPC boards */
 #define CONFIG_RELOC_FIXUP_WORKS
 
+/* All PPC boards must swap IDE bytes */
+#define CONFIG_IDE_SWAP_IO
+
 #endif /* _ASM_CONFIG_H_ */
diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index d486697..9292a5b 100644
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -853,7 +853,7 @@ input_swap_data(int dev, ulong *sect_buf, int words)
 #endif	/* __LITTLE_ENDIAN || CONFIG_AU1X00 */
 
 
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
+#if defined(CONFIG_IDE_SWAP_IO)
 static void
 output_data(int dev, ulong *sect_buf, int words)
 {
@@ -897,15 +897,15 @@ output_data(int dev, ulong *sect_buf, int words)
 	}
 #endif
 }
-#else	/* ! __PPC__ */
+#else	/* ! CONFIG_IDE_SWAP_IO */
 static void
 output_data(int dev, ulong *sect_buf, int words)
 {
 	outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
 }
-#endif	/* __PPC__ */
+#endif	/* CONFIG_IDE_SWAP_IO */
 
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
+#if defined(CONFIG_IDE_SWAP_IO)
 static void
 input_data(int dev, ulong *sect_buf, int words)
 {
@@ -955,14 +955,14 @@ input_data(int dev, ulong *sect_buf, int words)
 	}
 #endif
 }
-#else	/* ! __PPC__ */
+#else	/* ! CONFIG_IDE_SWAP_IO */
 static void
 input_data(int dev, ulong *sect_buf, int words)
 {
 	insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
 }
 
-#endif	/* __PPC__ */
+#endif	/* CONFIG_IDE_SWAP_IO */
 
 /* -------------------------------------------------------------------------
  */
@@ -1579,7 +1579,7 @@ int ide_device_present(int dev)
  * ATAPI Support
  */
 
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
+#if defined(CONFIG_IDE_SWAP_IO)
 /* since ATAPI may use commands with not 4 bytes alligned length
  * we have our own transfer functions, 2 bytes alligned */
 static void
@@ -1646,7 +1646,7 @@ input_data_shorts(int dev, ushort *sect_buf, int shorts)
 #endif
 }
 
-#else	/* ! __PPC__ */
+#else	/* ! CONFIG_IDE_SWAP_IO */
 static void
 output_data_shorts(int dev, ushort *sect_buf, int shorts)
 {
@@ -1659,7 +1659,7 @@ input_data_shorts(int dev, ushort *sect_buf, int shorts)
 	insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
 }
 
-#endif	/* __PPC__ */
+#endif	/* CONFIG_IDE_SWAP_IO */
 
 /*
  * Wait until (Status & mask) == res, or timeout (in ms)
diff --git a/doc/README.PXA_CF b/doc/README.PXA_CF
index 6a0f236..1d76b32 100644
--- a/doc/README.PXA_CF
+++ b/doc/README.PXA_CF
@@ -6,6 +6,14 @@ follow the connections of the standard lubbock. Anyway just the block
 marked memory configuration should be touched since the other parameters
 are imposed by the PXA architecture.
 
+EDIT 2010-07-01: in common/cmd_ide.c, having CONFIG_PXA_PCMCIA defined
+would cause looping on inw()/outw() rather than using insw()/outsw(),
+thus making sure IDE / ATA bytes are properly swapped. This behaviour
+is now controlled by CONFIG_IDE_SWAP_IO, therefore PXA boards with
+PCMCIA should #define CONFIG_IDE_SWAP_IO.
+
+#define CONFIG_IDE_SWAP_IO
+
 #define CONFIG_PXA_PCMCIA 1
 #define CONFIG_PXA_IDE 1
 
diff --git a/include/configs/ap325rxa.h b/include/configs/ap325rxa.h
index 70dd47e..80a5797 100644
--- a/include/configs/ap325rxa.h
+++ b/include/configs/ap325rxa.h
@@ -138,6 +138,7 @@
 #define CONFIG_SYS_ATA_DATA_OFFSET	0x200	/* data reg offset */
 #define CONFIG_SYS_ATA_REG_OFFSET	0x200	/* reg offset */
 #define CONFIG_SYS_ATA_ALT_OFFSET	0x210	/* alternate register offset */
+#define CONFIG_IDE_SWAP_IO
 
 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
 #define CONFIG_SYS_MAX_FLASH_BANKS	1
diff --git a/include/configs/ms7720se.h b/include/configs/ms7720se.h
index ba0a3f8..0ea3527 100644
--- a/include/configs/ms7720se.h
+++ b/include/configs/ms7720se.h
@@ -122,5 +122,6 @@
 #define CONFIG_SYS_ATA_DATA_OFFSET	0		/* data reg offset */
 #define CONFIG_SYS_ATA_REG_OFFSET	0		/* reg offset */
 #define CONFIG_SYS_ATA_ALT_OFFSET	0x200		/* alternate register offset */
+#define CONFIG_IDE_SWAP_IO
 
 #endif	/* __MS7720SE_H */
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index 8931b97..955f3ff 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -96,6 +96,7 @@
 #define CONFIG_SYS_ATA_DATA_OFFSET	0x1000	/* data reg offset */
 #define CONFIG_SYS_ATA_REG_OFFSET	0x1000	/* reg offset */
 #define CONFIG_SYS_ATA_ALT_OFFSET	0x800	/* alternate register offset */
+#define CONFIG_IDE_SWAP_IO
 
 /*
  * SuperH PCI Bridge Configration
diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h
index 71c570e..3afe93a 100644
--- a/include/configs/r7780mp.h
+++ b/include/configs/r7780mp.h
@@ -171,6 +171,7 @@
 #define CONFIG_SYS_ATA_DATA_OFFSET     0x1000          /* data reg offset */
 #define CONFIG_SYS_ATA_REG_OFFSET      0x1000          /* reg offset */
 #define CONFIG_SYS_ATA_ALT_OFFSET      0x800           /* alternate register offset */
+#define CONFIG_IDE_SWAP_IO
 #endif /* CONFIG_CMD_IDE */
 
 #endif /* __R7780RP_H */
-- 
1.6.4.4

[U-Boot] [PATCH V3 2/4] drivers/block: add mv_sata_ide driver

[Albert Aribaud]

This driver only provides initialization code; actual driving
is done by cmd_ide.c using the ATA compatibility mode of the
Marvell SATAHC controller.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
---
 drivers/block/Makefile      |    1 +
 drivers/block/mv_sata_ide.c |   61 +++++++++++++++++++++++++++++++++++++++++++
 include/mv_sata_ide.h       |   54 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 116 insertions(+), 0 deletions(-)
 create mode 100644 drivers/block/mv_sata_ide.c
 create mode 100644 include/mv_sata_ide.h

diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index 3f6ad5c..b47a5e4 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -36,6 +36,7 @@ COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o
 COBJS-$(CONFIG_SCSI_AHCI) += ahci.o
 COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
 COBJS-$(CONFIG_SYSTEMACE) += systemace.o
+COBJS-$(CONFIG_MV_SATA_IDE) += mv_sata_ide.o
 
 COBJS	:= $(COBJS-y)
 SRCS	:= $(COBJS:.o=.c)
diff --git a/drivers/block/mv_sata_ide.c b/drivers/block/mv_sata_ide.c
new file mode 100644
index 0000000..10f8bf6
--- /dev/null
+++ b/drivers/block/mv_sata_ide.c
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ *
+ * Written-by: Albert ARIBAUD <albert.aribaud@free.fr>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include "mv_sata_ide.h"
+
+/* Mask and values for device DETection and link initialization */
+#define MV_SATA_SCONTROL_DET_MASK		0x0000000F
+#define MV_SATA_SCONTROL_DET_NONE		0x00000000
+#define MV_SATA_SCONTROL_DET_INIT		0x00000001
+
+/* Mask and values for device Interface Power Management */
+#define MV_SATA_SCONTROL_IMP_MASK		0x00000F00
+#define MV_SATA_SCONTROL_IMP_NO_LP_ALLOWED	0x00000300
+
+#define MV_SATA_SCONTROL_MASK \
+	(MV_SATA_SCONTROL_DET_MASK|MV_SATA_SCONTROL_IMP_MASK)
+
+#define MV_SATA_PORT_INIT \
+	(MV_SATA_SCONTROL_DET_INIT|MV_SATA_SCONTROL_IMP_NO_LP_ALLOWED)
+
+#define MV_SATA_PORT_USE \
+	(MV_SATA_SCONTROL_DET_NONE|MV_SATA_SCONTROL_IMP_NO_LP_ALLOWED)
+
+void mv_sata_ide_initialize_port(
+	struct mv_sata_interface_registers *port)
+{
+	u32 reg;
+
+	reg = readl(&port->SControl);
+
+	reg = (reg & ~MV_SATA_SCONTROL_MASK) | MV_SATA_PORT_INIT;
+
+	writel(reg, &port->SControl);
+
+	reg = (reg & ~MV_SATA_SCONTROL_MASK) | MV_SATA_PORT_USE;
+
+	writel(reg, &port->SControl);
+}
diff --git a/include/mv_sata_ide.h b/include/mv_sata_ide.h
new file mode 100644
index 0000000..fdcb137
--- /dev/null
+++ b/include/mv_sata_ide.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
+ *
+ * Written-by: Albert ARIBAUD <albert.aribaud@free.fr>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _MV_SATA_IDE_H
+#define _MV_SATA_IDE_H
+
+#ifndef __ASSEMBLY__
+
+/* SATA insterface registers */
+struct mv_sata_interface_registers
+{
+	volatile u32 SStatus;
+	volatile u32 SError;
+	volatile u32 SControl;
+	volatile u32 LTMode;
+	volatile u32 PhyMode3;
+	volatile u32 PhyMode4;
+	volatile u32 Reserved1[5];
+	volatile u32 PhyMode1;
+	volatile u32 PhyMode2;
+	volatile u32 BIST_CR;
+	volatile u32 BIST_DW1;
+	volatile u32 BIST_DW2;
+	volatile u32 SErrorIntrMask;
+};
+
+/* Initialize a SATA port */
+void mv_sata_ide_initialize_port(
+	struct mv_sata_interface_registers *port);
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* _MV_SATA_IDE_H */
-- 
1.6.4.4

[U-Boot] [PATCH V3 3/4] orion5x: add support for cmd_ide.c

[Albert Aribaud]

This patch allows cmd_ide.c to use the Marvell SATAHC controller
integrated in the Orion5x SoC, thus enabling access to SATA disks
for Orion5x-based boards such as the ED Mini V2.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
---
 arch/arm/include/asm/arch-orion5x/orion5x.h |   11 +++++++++++
 common/cmd_ide.c                            |    4 ++++
 2 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h b/arch/arm/include/asm/arch-orion5x/orion5x.h
index 4008c84..585083a 100644
--- a/arch/arm/include/asm/arch-orion5x/orion5x.h
+++ b/arch/arm/include/asm/arch-orion5x/orion5x.h
@@ -55,6 +55,17 @@
 #define ORION5X_USB20_PORT0_BASE		(ORION5X_REGISTER(0x50000))
 #define ORION5X_USB20_PORT1_BASE		(ORION5X_REGISTER(0xA0000))
 #define ORION5X_EGIGA_BASE			(ORION5X_REGISTER(0x72000))
+#define ORION5X_SATA_BASE			(ORION5X_REGISTER(0x80000))
+#define ORION5X_SATA_PORT0_OFFSET		0x2000
+#define ORION5X_SATA_PORT1_OFFSET		0x4000
+
+/* SATA Interface Register port 0 and 1 */
+#define orion5x_port0_sata_registers \
+  ((struct mv_sata_interface_registers *) \
+  (ORION5X_SATA_BASE+ORION5X_SATA_PORT0_OFFSET+0x300))
+#define orion5x_port1_sata_registers \
+  ((struct mv_sata_interface_registers *) \
+  (ORION5X_SATA_BASE+ORION5X_SATA_PORT1_OFFSET+0x300))
 
 #define CONFIG_MAX_RAM_BANK_SIZE		(64*1024*1024)
 
diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index 9292a5b..7f98ebb 100644
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -45,6 +45,10 @@
 #include <mpc5xxx.h>
 #endif
 
+#ifdef CONFIG_ORION5X
+#include <asm/arch/orion5x.h>
+#endif
+
 #include <ide.h>
 #include <ata.h>
 
-- 
1.6.4.4

[U-Boot] [PATCH V3 4/4] edminiv2: add cmd_ide support

[Albert Aribaud]

This patch uses mv_sata_ide and cmd_ide to enable the use of the
integrated SATAHC controller port 1.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
---
 board/LaCie/edminiv2/edminiv2.c |    5 ++++
 include/configs/edminiv2.h      |   47 +++++++++++++++++++++++++++++++++++++-
 2 files changed, 50 insertions(+), 2 deletions(-)

diff --git a/board/LaCie/edminiv2/edminiv2.c b/board/LaCie/edminiv2/edminiv2.c
index 54c0ffe..6336429 100644
--- a/board/LaCie/edminiv2/edminiv2.c
+++ b/board/LaCie/edminiv2/edminiv2.c
@@ -88,5 +88,10 @@ int board_init(void)
 	/* boot parameter start at 256th byte of RAM base */
 	gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
 
+	/* Enable SATA ports if SATA IDE was configured */
+#if defined(CONFIG_MV_SATA_IDE)
+	mv_sata_ide_initialize_port(orion5x_port1_sata_registers);
+#endif
+
 	return 0;
 }
diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
index c3d95a0..1a61437 100644
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@@ -52,6 +52,12 @@
 #define CONFIG_SYS_HZ		1000
 
 /*
+ * __io is necessary for cmd_ide to compile
+ */
+
+#define __io
+
+/*
  * Board-specific values for Orion5x MPP low level init:
  * - MPPs 12 to 15 are SATA LEDs (mode 5)
  * - Others are GPIO/unused (mode 3 for MPP0, mode 5 for
@@ -60,7 +66,7 @@
 
 #define ORION5X_MPP0_7		0x00000003
 #define ORION5X_MPP8_15		0x55550000
-#define ORION5X_MPP16_23	0x00000000
+#define ORION5X_MPP16_23	0x00005555
 
 /*
  * Board-specific values for Orion5x GPIO low level init:
@@ -74,7 +80,6 @@
  */
 
 #define ORION5X_GPIO_OUT_ENABLE	0x03fcffff
-#define ORION5X_GPIO_OUT_VALUE	0x03fcffff
 
 /*
  * NS16550 Configuration
@@ -131,6 +136,7 @@
  * Commands configuration - using default command set for now
  */
 #include <config_cmd_default.h>
+
 /*
  * Disabling some default commands for staggered bring-up
  */
@@ -138,6 +144,43 @@
 #undef CONFIG_CMD_NET	/* no net since no eth */
 #undef CONFIG_CMD_NFS	/* no NFS since no net */
 
+#define CONFIG_CMD_IDE
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_EXT2
+
+/*
+ * ED Mini V2 has an IDE-compatible SATA connector for port 1
+ */
+ 
+#define CONFIG_MV_SATA_IDE
+#define CONFIG_MV_SATA_IDE_USE_PORT1
+
+/* Needs byte-swapping for ATA data register */
+#define CONFIG_IDE_SWAP_IO
+
+/* Data, registers and alternate blocks are at the same offset */
+#define CONFIG_SYS_ATA_DATA_OFFSET	(0x0100)
+#define CONFIG_SYS_ATA_REG_OFFSET	(0x0100)
+#define CONFIG_SYS_ATA_ALT_OFFSET	(0x0100)
+
+/* Each 8-bit ATA register is aligned to a 4-bytes address */
+#define CONFIG_SYS_ATA_STRIDE		4
+
+/* Controller supports 48-bits LBA addressing */
+#define CONFIG_LBA48
+
+/*
+ * CONFIG_CMD_IDE requires some #defines for ATA registers
+ */
+
+/* A single bus, a single device */
+#define CONFIG_SYS_IDE_MAXBUS		1
+#define CONFIG_SYS_IDE_MAXDEVICE	1
+/* ATA registers base is at SATA controller base */
+#define CONFIG_SYS_ATA_BASE_ADDR	ORION5X_SATA_BASE
+/* ATA bus 0 is orion5x port 1 on ED Mini V2 */
+#define CONFIG_SYS_ATA_IDE0_OFFSET	ORION5X_SATA_PORT1_OFFSET
+
 /*
  *  Environment variables configurations
  */
-- 
1.6.4.4

[U-Boot] [PATCH V3 4/4] edminiv2: add cmd_ide support

[Prafulla Wadaskar]

 

> -----Original Message-----
> From: u-boot-bounces at lists.denx.de 
> [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Albert Aribaud
> Sent: Friday, July 09, 2010 12:11 AM
> To: u-boot at lists.denx.de
> Subject: [U-Boot] [PATCH V3 4/4] edminiv2: add cmd_ide support
> 
> This patch uses mv_sata_ide and cmd_ide to enable the use of the
> integrated SATAHC controller port 1.
> 
> Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
> ---
>  board/LaCie/edminiv2/edminiv2.c |    5 ++++
>  include/configs/edminiv2.h      |   47 
> +++++++++++++++++++++++++++++++++++++-
>  2 files changed, 50 insertions(+), 2 deletions(-)
> 
> diff --git a/board/LaCie/edminiv2/edminiv2.c 
> b/board/LaCie/edminiv2/edminiv2.c
> index 54c0ffe..6336429 100644
> --- a/board/LaCie/edminiv2/edminiv2.c
> +++ b/board/LaCie/edminiv2/edminiv2.c
> @@ -88,5 +88,10 @@ int board_init(void)
>  	/* boot parameter start at 256th byte of RAM base */
>  	gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
>  
> +	/* Enable SATA ports if SATA IDE was configured */
> +#if defined(CONFIG_MV_SATA_IDE)
> +	mv_sata_ide_initialize_port(orion5x_port1_sata_registers);
> +#endif
> +
>  	return 0;
>  }
> diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
> index c3d95a0..1a61437 100644
> --- a/include/configs/edminiv2.h
> +++ b/include/configs/edminiv2.h
> @@ -52,6 +52,12 @@
>  #define CONFIG_SYS_HZ		1000
>  
>  /*
> + * __io is necessary for cmd_ide to compile
> + */
> +
> +#define __io
> +
> +/*
>   * Board-specific values for Orion5x MPP low level init:
>   * - MPPs 12 to 15 are SATA LEDs (mode 5)
>   * - Others are GPIO/unused (mode 3 for MPP0, mode 5 for
> @@ -60,7 +66,7 @@
>  
>  #define ORION5X_MPP0_7		0x00000003
>  #define ORION5X_MPP8_15		0x55550000
> -#define ORION5X_MPP16_23	0x00000000
> +#define ORION5X_MPP16_23	0x00005555
>  
>  /*
>   * Board-specific values for Orion5x GPIO low level init:
> @@ -74,7 +80,6 @@
>   */
>  
>  #define ORION5X_GPIO_OUT_ENABLE	0x03fcffff
> -#define ORION5X_GPIO_OUT_VALUE	0x03fcffff

Why did you removed this?

Regards..
Prafulla . .

[U-Boot] [PATCH V3 4/4] edminiv2: add cmd_ide support

[Albert ARIBAUD]

Le 12/07/2010 08:46, Prafulla Wadaskar a ?crit :

>>   #define ORION5X_GPIO_OUT_ENABLE	0x03fcffff
>> -#define ORION5X_GPIO_OUT_VALUE	0x03fcffff
>
> Why did you removed this?

This is unused code, actually, which I fixed on-the-fly but has no 
relationship with IDE support. I will  postpone its removal to a 
separate bugfix patch.

Amicalement,
-- 
Albert.

[U-Boot] [PATCH V3 3/4] orion5x: add support for cmd_ide.c

[Prafulla Wadaskar]

 

> -----Original Message-----
> From: u-boot-bounces at lists.denx.de 
> [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Albert Aribaud
> Sent: Friday, July 09, 2010 12:11 AM
> To: u-boot at lists.denx.de
> Subject: [U-Boot] [PATCH V3 3/4] orion5x: add support for cmd_ide.c
> 
> This patch allows cmd_ide.c to use the Marvell SATAHC controller
> integrated in the Orion5x SoC, thus enabling access to SATA disks
> for Orion5x-based boards such as the ED Mini V2.
> 
> Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
> ---
>  arch/arm/include/asm/arch-orion5x/orion5x.h |   11 +++++++++++
>  common/cmd_ide.c                            |    4 ++++
>  2 files changed, 15 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h 
> b/arch/arm/include/asm/arch-orion5x/orion5x.h
> index 4008c84..585083a 100644
> --- a/arch/arm/include/asm/arch-orion5x/orion5x.h
> +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h
> @@ -55,6 +55,17 @@
>  #define ORION5X_USB20_PORT0_BASE		
> (ORION5X_REGISTER(0x50000))
>  #define ORION5X_USB20_PORT1_BASE		
> (ORION5X_REGISTER(0xA0000))
>  #define ORION5X_EGIGA_BASE			
> (ORION5X_REGISTER(0x72000))
> +#define ORION5X_SATA_BASE			
> (ORION5X_REGISTER(0x80000))
> +#define ORION5X_SATA_PORT0_OFFSET		0x2000
> +#define ORION5X_SATA_PORT1_OFFSET		0x4000
> +
> +/* SATA Interface Register port 0 and 1 */
> +#define orion5x_port0_sata_registers \
> +  ((struct mv_sata_interface_registers *) \
> +  (ORION5X_SATA_BASE+ORION5X_SATA_PORT0_OFFSET+0x300))
> +#define orion5x_port1_sata_registers \
> +  ((struct mv_sata_interface_registers *) \
> +  (ORION5X_SATA_BASE+ORION5X_SATA_PORT1_OFFSET+0x300))

Pls remove this and use _BASE macro in c code

>  
>  #define CONFIG_MAX_RAM_BANK_SIZE		(64*1024*1024)
>  
> diff --git a/common/cmd_ide.c b/common/cmd_ide.c
> index 9292a5b..7f98ebb 100644
> --- a/common/cmd_ide.c
> +++ b/common/cmd_ide.c
> @@ -45,6 +45,10 @@
>  #include <mpc5xxx.h>
>  #endif
>  
> +#ifdef CONFIG_ORION5X
> +#include <asm/arch/orion5x.h>
> +#endif
> +

Why do you need this include? 

Regards..
Prafulla . .

[U-Boot] [PATCH V3 3/4] orion5x: add support for cmd_ide.c

[Albert ARIBAUD]

Le 12/07/2010 08:46, Prafulla Wadaskar a ?crit :
>
>
>> -----Original Message-----
>> From: u-boot-bounces at lists.denx.de
>> [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Albert Aribaud
>> Sent: Friday, July 09, 2010 12:11 AM
>> To: u-boot at lists.denx.de
>> Subject: [U-Boot] [PATCH V3 3/4] orion5x: add support for cmd_ide.c
>>
>> This patch allows cmd_ide.c to use the Marvell SATAHC controller
>> integrated in the Orion5x SoC, thus enabling access to SATA disks
>> for Orion5x-based boards such as the ED Mini V2.
>>
>> Signed-off-by: Albert Aribaud<albert.aribaud@free.fr>
>> ---
>>   arch/arm/include/asm/arch-orion5x/orion5x.h |   11 +++++++++++
>>   common/cmd_ide.c                            |    4 ++++
>>   2 files changed, 15 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/include/asm/arch-orion5x/orion5x.h
>> b/arch/arm/include/asm/arch-orion5x/orion5x.h
>> index 4008c84..585083a 100644
>> --- a/arch/arm/include/asm/arch-orion5x/orion5x.h
>> +++ b/arch/arm/include/asm/arch-orion5x/orion5x.h
>> @@ -55,6 +55,17 @@
>>   #define ORION5X_USB20_PORT0_BASE		
>> (ORION5X_REGISTER(0x50000))
>>   #define ORION5X_USB20_PORT1_BASE		
>> (ORION5X_REGISTER(0xA0000))
>>   #define ORION5X_EGIGA_BASE			
>> (ORION5X_REGISTER(0x72000))
>> +#define ORION5X_SATA_BASE			
>> (ORION5X_REGISTER(0x80000))
>> +#define ORION5X_SATA_PORT0_OFFSET		0x2000
>> +#define ORION5X_SATA_PORT1_OFFSET		0x4000
>> +
>> +/* SATA Interface Register port 0 and 1 */
>> +#define orion5x_port0_sata_registers \
>> +  ((struct mv_sata_interface_registers *) \
>> +  (ORION5X_SATA_BASE+ORION5X_SATA_PORT0_OFFSET+0x300))
>> +#define orion5x_port1_sata_registers \
>> +  ((struct mv_sata_interface_registers *) \
>> +  (ORION5X_SATA_BASE+ORION5X_SATA_PORT1_OFFSET+0x300))
>
> Pls remove this and use _BASE macro in c code

Not sure I understand this comment. Can you elaborate?

>>
>>   #define CONFIG_MAX_RAM_BANK_SIZE		(64*1024*1024)
>>
>> diff --git a/common/cmd_ide.c b/common/cmd_ide.c
>> index 9292a5b..7f98ebb 100644
>> --- a/common/cmd_ide.c
>> +++ b/common/cmd_ide.c
>> @@ -45,6 +45,10 @@
>>   #include<mpc5xxx.h>
>>   #endif
>>
>> +#ifdef CONFIG_ORION5X
>> +#include<asm/arch/orion5x.h>
>> +#endif
>> +
>
> Why do you need this include?

Because just like for other SoC / boards which are #included right 
before, CMD_IDE requires defining some constants that specify where the 
SATA register block resides in RAM, and in the orion5x case, these 
constants will be based on orion5x symbols.

This is not strictly speaking required until CMD_IDE is actually used, 
i.e. until edmini declares support for CMD_IDE in next patch, but the 
change logically belongs to "orion5x support" rather than "edminiv2 
support".

> Regards..
> Prafulla . .

Amicalement,
-- 
Albert.

[U-Boot] [PATCH V3 2/4] drivers/block: add mv_sata_ide driver

[Prafulla Wadaskar]

 

> -----Original Message-----
> From: u-boot-bounces at lists.denx.de 
> [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Albert Aribaud
> Sent: Friday, July 09, 2010 12:11 AM
> To: u-boot at lists.denx.de
> Subject: [U-Boot] [PATCH V3 2/4] drivers/block: add mv_sata_ide driver
> 
> This driver only provides initialization code; actual driving
> is done by cmd_ide.c using the ATA compatibility mode of the
> Marvell SATAHC controller.
> 
> Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
> ---
>  drivers/block/Makefile      |    1 +
>  drivers/block/mv_sata_ide.c |   61 
> +++++++++++++++++++++++++++++++++++++++++++
>  include/mv_sata_ide.h       |   54 
> ++++++++++++++++++++++++++++++++++++++
>  3 files changed, 116 insertions(+), 0 deletions(-)
>  create mode 100644 drivers/block/mv_sata_ide.c
>  create mode 100644 include/mv_sata_ide.h
> 
> diff --git a/drivers/block/Makefile b/drivers/block/Makefile
> index 3f6ad5c..b47a5e4 100644
> --- a/drivers/block/Makefile
> +++ b/drivers/block/Makefile
> @@ -36,6 +36,7 @@ COBJS-$(CONFIG_SATA_SIL3114) += sata_sil3114.o
>  COBJS-$(CONFIG_SCSI_AHCI) += ahci.o
>  COBJS-$(CONFIG_SCSI_SYM53C8XX) += sym53c8xx.o
>  COBJS-$(CONFIG_SYSTEMACE) += systemace.o
> +COBJS-$(CONFIG_MV_SATA_IDE) += mv_sata_ide.o

Pls correct ordering here

>  
>  COBJS	:= $(COBJS-y)
>  SRCS	:= $(COBJS:.o=.c)
> diff --git a/drivers/block/mv_sata_ide.c b/drivers/block/mv_sata_ide.c
> new file mode 100644
> index 0000000..10f8bf6
> --- /dev/null
> +++ b/drivers/block/mv_sata_ide.c
> @@ -0,0 +1,61 @@
> +/*
> + * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
> + *
> + * Written-by: Albert ARIBAUD <albert.aribaud@free.fr>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include "mv_sata_ide.h"
> +
> +/* Mask and values for device DETection and link initialization */
> +#define MV_SATA_SCONTROL_DET_MASK		0x0000000F

Overall if you use MVSATA you can make your patch shorter.

> +#define MV_SATA_SCONTROL_DET_NONE		0x00000000
> +#define MV_SATA_SCONTROL_DET_INIT		0x00000001
> +
> +/* Mask and values for device Interface Power Management */
> +#define MV_SATA_SCONTROL_IMP_MASK		0x00000F00
> +#define MV_SATA_SCONTROL_IMP_NO_LP_ALLOWED	0x00000300
> +
> +#define MV_SATA_SCONTROL_MASK \
> +	(MV_SATA_SCONTROL_DET_MASK|MV_SATA_SCONTROL_IMP_MASK)
> +
> +#define MV_SATA_PORT_INIT \
> +	(MV_SATA_SCONTROL_DET_INIT|MV_SATA_SCONTROL_IMP_NO_LP_ALLOWED)
> +
> +#define MV_SATA_PORT_USE \
> +	(MV_SATA_SCONTROL_DET_NONE|MV_SATA_SCONTROL_IMP_NO_LP_ALLOWED)
> +
> +void mv_sata_ide_initialize_port(
> +	struct mv_sata_interface_registers *port)
> +{
> +	u32 reg;
> +
> +	reg = readl(&port->SControl);
> +
> +	reg = (reg & ~MV_SATA_SCONTROL_MASK) | MV_SATA_PORT_INIT;
> +
> +	writel(reg, &port->SControl);
> +
> +	reg = (reg & ~MV_SATA_SCONTROL_MASK) | MV_SATA_PORT_USE;
> +
> +	writel(reg, &port->SControl);
> +}
> diff --git a/include/mv_sata_ide.h b/include/mv_sata_ide.h
> new file mode 100644
> index 0000000..fdcb137
> --- /dev/null
> +++ b/include/mv_sata_ide.h
> @@ -0,0 +1,54 @@
> +/*
> + * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
> + *
> + * Written-by: Albert ARIBAUD <albert.aribaud@free.fr>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#ifndef _MV_SATA_IDE_H
> +#define _MV_SATA_IDE_H
> +
> +#ifndef __ASSEMBLY__
> +
> +/* SATA insterface registers */
> +struct mv_sata_interface_registers
> +{
> +	volatile u32 SStatus;

Pls remove volatiles from here

> +	volatile u32 SError;
> +	volatile u32 SControl;
> +	volatile u32 LTMode;
> +	volatile u32 PhyMode3;
> +	volatile u32 PhyMode4;
> +	volatile u32 Reserved1[5];
> +	volatile u32 PhyMode1;
> +	volatile u32 PhyMode2;
> +	volatile u32 BIST_CR;
> +	volatile u32 BIST_DW1;
> +	volatile u32 BIST_DW2;
> +	volatile u32 SErrorIntrMask;
> +};
> +
> +/* Initialize a SATA port */
> +void mv_sata_ide_initialize_port(
> +	struct mv_sata_interface_registers *port);
> +
> +#endif /* __ASSEMBLY__ */
> +
> +#endif /* _MV_SATA_IDE_H */
> -- 

Regards..
Prafulla . .