All of lore.kernel.org
 help / color / mirror / Atom feed
* Is it any serial8250 platform driver available?
@ 2010-10-22 19:23 ` Ardelean, Andrei
  0 siblings, 0 replies; 7+ messages in thread
From: Ardelean, Andrei @ 2010-10-22 19:23 UTC (permalink / raw)
  To: linux-mips

Hi,

I am porting MIPS Linux from MALTA to a new board. I ported early
console code from malta_console.c and I am looking now to use a
interrupt driven driver for TTY. My UART is compatible with 8250 (1 UART
port only) but the UART registers are directly mapped in CPU memory map.
There is no PCI bus. My problem is that the driver implemented in 8250.c
is very complex and it seems to be hardcode for ISA bus, is it any
simple platform UART driver available to be directly mapped in the CPU
space? Can you give me some advice what would be a good approach for my
case?

Thanks,
Andrei
  

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Is it any serial8250 platform driver available?
@ 2010-10-22 19:23 ` Ardelean, Andrei
  0 siblings, 0 replies; 7+ messages in thread
From: Ardelean, Andrei @ 2010-10-22 19:23 UTC (permalink / raw)
  To: linux-mips

Hi,

I am porting MIPS Linux from MALTA to a new board. I ported early
console code from malta_console.c and I am looking now to use a
interrupt driven driver for TTY. My UART is compatible with 8250 (1 UART
port only) but the UART registers are directly mapped in CPU memory map.
There is no PCI bus. My problem is that the driver implemented in 8250.c
is very complex and it seems to be hardcode for ISA bus, is it any
simple platform UART driver available to be directly mapped in the CPU
space? Can you give me some advice what would be a good approach for my
case?

Thanks,
Andrei
  

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Is it any serial8250 platform driver available?
  2010-10-22 19:23 ` Ardelean, Andrei
  (?)
@ 2010-10-22 19:31 ` David Daney
  2010-10-25 15:37     ` Ardelean, Andrei
  -1 siblings, 1 reply; 7+ messages in thread
From: David Daney @ 2010-10-22 19:31 UTC (permalink / raw)
  To: Ardelean, Andrei; +Cc: linux-mips

On 10/22/2010 12:23 PM, Ardelean, Andrei wrote:
> Hi,
>
> I am porting MIPS Linux from MALTA to a new board. I ported early
> console code from malta_console.c and I am looking now to use a
> interrupt driven driver for TTY. My UART is compatible with 8250 (1 UART
> port only) but the UART registers are directly mapped in CPU memory map.
> There is no PCI bus. My problem is that the driver implemented in 8250.c
> is very complex and it seems to be hardcode for ISA bus, is it any
> simple platform UART driver available to be directly mapped in the CPU
> space? Can you give me some advice what would be a good approach for my
> case?
>

Many chips have 8250 compatible ports and use 8250.c.

See arch/mips/cavium-octeon/serial.c

David Daeny

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Is it any serial8250 platform driver available?
  2010-10-25 15:37     ` Ardelean, Andrei
  (?)
@ 2010-10-25 14:53     ` Sergei Shtylyov
  -1 siblings, 0 replies; 7+ messages in thread
From: Sergei Shtylyov @ 2010-10-25 14:53 UTC (permalink / raw)
  To: Ardelean, Andrei; +Cc: David Daney, linux-mips

Hello.

[Resending to the list as I've only replied to Andrei -- due to stupid keyboard 
layout switcher in  OpenSUSE preventing Ctrl-Shift-R in Thunderbird from 
working... :-/]

On 25-10-2010 19:37, Ardelean, Andrei wrote:

> Hi David,

> I studied this driver and few other examples and I have one question
> regarding the driver configuration:
> Which field must be initialized in the plat_serial8250_port structure:
> 	unsigned long	iobase;		/* io base address */
> 	void __iomem	*membase;	/* ioremap cookie or NULL */
> 	resource_size_t	mapbase;	/* resource base */
> Some drivers init only one of them, other two fields.

    Of course, .iobase is for I/O port mapped UARTs (think PC), .mapbase and 
.membase are for the memory mapped UARTs (like your case).

> My UART is located at 0x1bf01000, can I put this value in all those
> fields?

    You only need to put that into ,mapbase.

> Thanks,
> Andrei

WBR, Sergei

^ permalink raw reply	[flat|nested] 7+ messages in thread

* RE: Is it any serial8250 platform driver available?
@ 2010-10-25 15:37     ` Ardelean, Andrei
  0 siblings, 0 replies; 7+ messages in thread
From: Ardelean, Andrei @ 2010-10-25 15:37 UTC (permalink / raw)
  To: David Daney; +Cc: linux-mips

Hi David,

I studied this driver and few other examples and I have one question
regarding the driver configuration:
Which field must be initialized in the plat_serial8250_port structure: 
	unsigned long	iobase;		/* io base address */
	void __iomem	*membase;	/* ioremap cookie or NULL */
	resource_size_t	mapbase;	/* resource base */ 
Some drivers init only one of them, other two fields. 

My UART is located at 0x1bf01000, can I put this value in all those
fields?

Thanks,
Andrei


-----Original Message-----
From: David Daney [mailto:ddaney@caviumnetworks.com] 
Sent: Friday, October 22, 2010 3:31 PM
To: Ardelean, Andrei
Cc: linux-mips@linux-mips.org
Subject: Re: Is it any serial8250 platform driver available?

On 10/22/2010 12:23 PM, Ardelean, Andrei wrote:
> Hi,
>
> I am porting MIPS Linux from MALTA to a new board. I ported early
> console code from malta_console.c and I am looking now to use a
> interrupt driven driver for TTY. My UART is compatible with 8250 (1
UART
> port only) but the UART registers are directly mapped in CPU memory
map.
> There is no PCI bus. My problem is that the driver implemented in
8250.c
> is very complex and it seems to be hardcode for ISA bus, is it any
> simple platform UART driver available to be directly mapped in the CPU
> space? Can you give me some advice what would be a good approach for
my
> case?
>

Many chips have 8250 compatible ports and use 8250.c.

See arch/mips/cavium-octeon/serial.c

David Daeny

^ permalink raw reply	[flat|nested] 7+ messages in thread

* RE: Is it any serial8250 platform driver available?
@ 2010-10-25 15:37     ` Ardelean, Andrei
  0 siblings, 0 replies; 7+ messages in thread
From: Ardelean, Andrei @ 2010-10-25 15:37 UTC (permalink / raw)
  To: David Daney; +Cc: linux-mips

Hi David,

I studied this driver and few other examples and I have one question
regarding the driver configuration:
Which field must be initialized in the plat_serial8250_port structure: 
	unsigned long	iobase;		/* io base address */
	void __iomem	*membase;	/* ioremap cookie or NULL */
	resource_size_t	mapbase;	/* resource base */ 
Some drivers init only one of them, other two fields. 

My UART is located at 0x1bf01000, can I put this value in all those
fields?

Thanks,
Andrei


-----Original Message-----
From: David Daney [mailto:ddaney@caviumnetworks.com] 
Sent: Friday, October 22, 2010 3:31 PM
To: Ardelean, Andrei
Cc: linux-mips@linux-mips.org
Subject: Re: Is it any serial8250 platform driver available?

On 10/22/2010 12:23 PM, Ardelean, Andrei wrote:
> Hi,
>
> I am porting MIPS Linux from MALTA to a new board. I ported early
> console code from malta_console.c and I am looking now to use a
> interrupt driven driver for TTY. My UART is compatible with 8250 (1
UART
> port only) but the UART registers are directly mapped in CPU memory
map.
> There is no PCI bus. My problem is that the driver implemented in
8250.c
> is very complex and it seems to be hardcode for ISA bus, is it any
> simple platform UART driver available to be directly mapped in the CPU
> space? Can you give me some advice what would be a good approach for
my
> case?
>

Many chips have 8250 compatible ports and use 8250.c.

See arch/mips/cavium-octeon/serial.c

David Daeny

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: Is it any serial8250 platform driver available?
  2010-10-25 15:37     ` Ardelean, Andrei
  (?)
  (?)
@ 2010-10-25 16:43     ` David Daney
  -1 siblings, 0 replies; 7+ messages in thread
From: David Daney @ 2010-10-25 16:43 UTC (permalink / raw)
  To: Ardelean, Andrei; +Cc: linux-mips

On 10/25/2010 08:37 AM, Ardelean, Andrei wrote:
> Hi David,
>
> I studied this driver and few other examples and I have one question
> regarding the driver configuration:
> Which field must be initialized in the plat_serial8250_port structure:
> 	unsigned long	iobase;		/* io base address */
> 	void __iomem	*membase;	/* ioremap cookie or NULL */
> 	resource_size_t	mapbase;	/* resource base */
> Some drivers init only one of them, other two fields.
>
> My UART is located at 0x1bf01000, can I put this value in all those
> fields?
>

As with many things in life, it depends.

In this case it depends on the flags you pass as well as any serial_in() 
and serial_out() functions you may have.  It is fortunate you have the 
source code available, you can use it to see how the different options 
affect things.

David Daney


> Thanks,
> Andrei
>
>
> -----Original Message-----
> From: David Daney [mailto:ddaney@caviumnetworks.com]
> Sent: Friday, October 22, 2010 3:31 PM
> To: Ardelean, Andrei
> Cc: linux-mips@linux-mips.org
> Subject: Re: Is it any serial8250 platform driver available?
>
> On 10/22/2010 12:23 PM, Ardelean, Andrei wrote:
>> Hi,
>>
>> I am porting MIPS Linux from MALTA to a new board. I ported early
>> console code from malta_console.c and I am looking now to use a
>> interrupt driven driver for TTY. My UART is compatible with 8250 (1
> UART
>> port only) but the UART registers are directly mapped in CPU memory
> map.
>> There is no PCI bus. My problem is that the driver implemented in
> 8250.c
>> is very complex and it seems to be hardcode for ISA bus, is it any
>> simple platform UART driver available to be directly mapped in the CPU
>> space? Can you give me some advice what would be a good approach for
> my
>> case?
>>
>
> Many chips have 8250 compatible ports and use 8250.c.
>
> See arch/mips/cavium-octeon/serial.c
>
> David Daeny
>

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2010-10-25 16:56 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2010-10-22 19:23 Is it any serial8250 platform driver available? Ardelean, Andrei
2010-10-22 19:23 ` Ardelean, Andrei
2010-10-22 19:31 ` David Daney
2010-10-25 15:37   ` Ardelean, Andrei
2010-10-25 15:37     ` Ardelean, Andrei
2010-10-25 14:53     ` Sergei Shtylyov
2010-10-25 16:43     ` David Daney

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.