* [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April
@ 2010-04-26 19:04 Luis R. Rodriguez
2010-04-26 19:04 ` [PATCH 01/13] ath9k_hw: update initvals for AR9003 Luis R. Rodriguez
` (12 more replies)
0 siblings, 13 replies; 15+ messages in thread
From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw)
To: linville; +Cc: linux-wireless, Luis R. Rodriguez
John, this series contains a few fixes we've made to AR9003 over
the last few weeks. We've tested them considerably. Also included
is a change for AR9280 2.0 to enable fast PLL clock.
Happy Monday.
Felix Fietkau (10):
ath9k_hw: update initvals for AR9003
ath9k_hw: fix pll clock setting for 5ghz on AR9003
ath9k_hw: fix typo in the AR9003 EEPROM data structure definition
ath9k_hw: update EEPROM data structure for AR9280
ath9k_hw: fix fast clock handling for 5GHz channels
ath9k: wake queue after processing edma rx frames
ath9k_hw: use the configured power limit for AR9003
ath9k_hw: Fix typos in tx rate power level parsing for AR9003
ath9k_hw: Fix endian bug in an AR9003 EEPROM field
ath9k_hw: fix noisefloor timeout handling on AR9003
Luis R. Rodriguez (2):
ath9k_hw: disable TX IQ calibration for AR9003
ath9k_hw: Fix TX interrupt mitigation settings
Vasanthakumar Thiagarajan (1):
ath9k_hw: Fix usec to hw clock conversion in 5Ghz for ar9003
drivers/net/wireless/ath/ath9k/ar5008_phy.c | 5 +-
drivers/net/wireless/ath/ath9k/ar9002_phy.c | 16 +-
drivers/net/wireless/ath/ath9k/ar9003_calib.c | 3 +-
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 8 +-
drivers/net/wireless/ath/ath9k/ar9003_eeprom.h | 2 +-
drivers/net/wireless/ath/ath9k/ar9003_initvals.h | 265 +++++++++++-----------
drivers/net/wireless/ath/ath9k/ar9003_mac.c | 3 +
drivers/net/wireless/ath/ath9k/ar9003_phy.c | 16 +-
drivers/net/wireless/ath/ath9k/eeprom.h | 3 +-
drivers/net/wireless/ath/ath9k/eeprom_def.c | 2 +
drivers/net/wireless/ath/ath9k/hw.c | 24 ++-
drivers/net/wireless/ath/ath9k/hw.h | 8 +-
drivers/net/wireless/ath/ath9k/mac.c | 10 +-
drivers/net/wireless/ath/ath9k/xmit.c | 2 +
14 files changed, 189 insertions(+), 178 deletions(-)
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 01/13] ath9k_hw: update initvals for AR9003 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez @ 2010-04-26 19:04 ` Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 02/13] ath9k_hw: fix pll clock setting for 5ghz on AR9003 Luis R. Rodriguez ` (11 subsequent siblings) 12 siblings, 0 replies; 15+ messages in thread From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw) To: linville; +Cc: linux-wireless, Felix Fietkau, Luis R. Rodriguez From: Felix Fietkau <nbd@openwrt.org> This synchs up the initvals to the values used on the Atheros HAL for AR9003. This specific change adds support for a new high power module. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> --- drivers/net/wireless/ath/ath9k/ar9003_initvals.h | 265 +++++++++++----------- 1 files changed, 128 insertions(+), 137 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/ar9003_initvals.h b/drivers/net/wireless/ath/ath9k/ar9003_initvals.h index e0391b1..a131cd1 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_initvals.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_initvals.h @@ -31,7 +31,7 @@ static const u32 ar9300_2p0_radio_postamble[][5] = { static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p0[][5] = { /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ - {0x0000a410, 0x000050da, 0x000050da, 0x000050da, 0x000050da}, + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, @@ -545,7 +545,7 @@ static const u32 ar9300_2p0_soc_postamble[][5] = { }; static const u32 ar9200_merlin_2p0_radio_core[][2] = { - /* Addr common */ + /* Addr allmodes */ {0x00007800, 0x00040000}, {0x00007804, 0xdb005012}, {0x00007808, 0x04924914}, @@ -835,71 +835,71 @@ static const u32 ar9300_2p0_baseband_core[][2] = { static const u32 ar9300Modes_high_power_tx_gain_table_2p0[][5] = { /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ - {0x0000a410, 0x000050d9, 0x000050d9, 0x000050da, 0x000050da}, + {0x0000a410, 0x000050db, 0x000050db, 0x000050d9, 0x000050d9}, {0x0000a500, 0x00020220, 0x00020220, 0x00000000, 0x00000000}, {0x0000a504, 0x06020223, 0x06020223, 0x04000002, 0x04000002}, - {0x0000a508, 0x0b022220, 0x0b022220, 0x08000004, 0x08000004}, - {0x0000a50c, 0x10022223, 0x10022223, 0x0b000200, 0x0b000200}, - {0x0000a510, 0x17022620, 0x17022620, 0x0f000202, 0x0f000202}, - {0x0000a514, 0x1b022622, 0x1b022622, 0x11000400, 0x11000400}, - {0x0000a518, 0x1f022822, 0x1f022822, 0x15000402, 0x15000402}, - {0x0000a51c, 0x24022842, 0x24022842, 0x19000404, 0x19000404}, - {0x0000a520, 0x28042840, 0x28042840, 0x1b000603, 0x1b000603}, - {0x0000a524, 0x2c042842, 0x2c042842, 0x1f000a02, 0x1f000a02}, - {0x0000a528, 0x30042844, 0x30042844, 0x23000a04, 0x23000a04}, - {0x0000a52c, 0x34042846, 0x34042846, 0x26000a20, 0x26000a20}, - {0x0000a530, 0x39042869, 0x39042869, 0x2a000e20, 0x2a000e20}, - {0x0000a534, 0x3d062869, 0x3d062869, 0x2e000e22, 0x2e000e22}, - {0x0000a538, 0x44062c69, 0x44062c69, 0x31000e24, 0x31000e24}, - {0x0000a53c, 0x48063069, 0x48063069, 0x34001640, 0x34001640}, - {0x0000a540, 0x4c0a3065, 0x4c0a3065, 0x38001660, 0x38001660}, - {0x0000a544, 0x500a3069, 0x500a3069, 0x3b001861, 0x3b001861}, - {0x0000a548, 0x530a3469, 0x530a3469, 0x3e001a81, 0x3e001a81}, - {0x0000a54c, 0x590a7464, 0x590a7464, 0x42001a83, 0x42001a83}, - {0x0000a550, 0x5e0a7865, 0x5e0a7865, 0x44001c84, 0x44001c84}, - {0x0000a554, 0x630a7e66, 0x630a7e66, 0x48001ce3, 0x48001ce3}, - {0x0000a558, 0x680a7e89, 0x680a7e89, 0x4c001ce5, 0x4c001ce5}, - {0x0000a55c, 0x6e0a7e8c, 0x6e0a7e8c, 0x50001ce9, 0x50001ce9}, - {0x0000a560, 0x730e7e8c, 0x730e7e8c, 0x54001ceb, 0x54001ceb}, - {0x0000a564, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, - {0x0000a568, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, - {0x0000a56c, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, - {0x0000a570, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, - {0x0000a574, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, - {0x0000a578, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, - {0x0000a57c, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, + {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004}, + {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200}, + {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202}, + {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400}, + {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402}, + {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404}, + {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603}, + {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02}, + {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04}, + {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20}, + {0x0000a530, 0x34043643, 0x34043643, 0x2a000e20, 0x2a000e20}, + {0x0000a534, 0x38043a44, 0x38043a44, 0x2e000e22, 0x2e000e22}, + {0x0000a538, 0x3b043e45, 0x3b043e45, 0x31000e24, 0x31000e24}, + {0x0000a53c, 0x40063e46, 0x40063e46, 0x34001640, 0x34001640}, + {0x0000a540, 0x44083e46, 0x44083e46, 0x38001660, 0x38001660}, + {0x0000a544, 0x46083e66, 0x46083e66, 0x3b001861, 0x3b001861}, + {0x0000a548, 0x4b0a3e69, 0x4b0a3e69, 0x3e001a81, 0x3e001a81}, + {0x0000a54c, 0x4f0a5e66, 0x4f0a5e66, 0x42001a83, 0x42001a83}, + {0x0000a550, 0x540a7e66, 0x540a7e66, 0x44001c84, 0x44001c84}, + {0x0000a554, 0x570a7e89, 0x570a7e89, 0x48001ce3, 0x48001ce3}, + {0x0000a558, 0x5c0e7e8a, 0x5c0e7e8a, 0x4c001ce5, 0x4c001ce5}, + {0x0000a55c, 0x60127e8b, 0x60127e8b, 0x50001ce9, 0x50001ce9}, + {0x0000a560, 0x65127ecc, 0x65127ecc, 0x54001ceb, 0x54001ceb}, + {0x0000a564, 0x6b169ecd, 0x6b169ecd, 0x56001eec, 0x56001eec}, + {0x0000a568, 0x70169f0e, 0x70169f0e, 0x56001eec, 0x56001eec}, + {0x0000a56c, 0x75169f4f, 0x75169f4f, 0x56001eec, 0x56001eec}, + {0x0000a570, 0x75169f4f, 0x75169f4f, 0x56001eec, 0x56001eec}, + {0x0000a574, 0x75169f4f, 0x75169f4f, 0x56001eec, 0x56001eec}, + {0x0000a578, 0x75169f4f, 0x75169f4f, 0x56001eec, 0x56001eec}, + {0x0000a57c, 0x75169f4f, 0x75169f4f, 0x56001eec, 0x56001eec}, {0x0000a580, 0x00820220, 0x00820220, 0x00800000, 0x00800000}, {0x0000a584, 0x06820223, 0x06820223, 0x04800002, 0x04800002}, - {0x0000a588, 0x0b822220, 0x0b822220, 0x08800004, 0x08800004}, - {0x0000a58c, 0x10822223, 0x10822223, 0x0b800200, 0x0b800200}, - {0x0000a590, 0x17822620, 0x17822620, 0x0f800202, 0x0f800202}, - {0x0000a594, 0x1b822622, 0x1b822622, 0x11800400, 0x11800400}, - {0x0000a598, 0x1f822822, 0x1f822822, 0x15800402, 0x15800402}, - {0x0000a59c, 0x24822842, 0x24822842, 0x19800404, 0x19800404}, - {0x0000a5a0, 0x28842840, 0x28842840, 0x1b800603, 0x1b800603}, - {0x0000a5a4, 0x2c842842, 0x2c842842, 0x1f800a02, 0x1f800a02}, - {0x0000a5a8, 0x30842844, 0x30842844, 0x23800a04, 0x23800a04}, - {0x0000a5ac, 0x34842846, 0x34842846, 0x26800a20, 0x26800a20}, - {0x0000a5b0, 0x39842869, 0x39842869, 0x2a800e20, 0x2a800e20}, - {0x0000a5b4, 0x3d862869, 0x3d862869, 0x2e800e22, 0x2e800e22}, - {0x0000a5b8, 0x44862c69, 0x44862c69, 0x31800e24, 0x31800e24}, - {0x0000a5bc, 0x48863069, 0x48863069, 0x34801640, 0x34801640}, - {0x0000a5c0, 0x4c8a3065, 0x4c8a3065, 0x38801660, 0x38801660}, - {0x0000a5c4, 0x508a3069, 0x508a3069, 0x3b801861, 0x3b801861}, - {0x0000a5c8, 0x538a3469, 0x538a3469, 0x3e801a81, 0x3e801a81}, - {0x0000a5cc, 0x598a7464, 0x598a7464, 0x42801a83, 0x42801a83}, - {0x0000a5d0, 0x5e8a7865, 0x5e8a7865, 0x44801c84, 0x44801c84}, - {0x0000a5d4, 0x638a7e66, 0x638a7e66, 0x48801ce3, 0x48801ce3}, - {0x0000a5d8, 0x688a7e89, 0x688a7e89, 0x4c801ce5, 0x4c801ce5}, - {0x0000a5dc, 0x6e8a7e8c, 0x6e8a7e8c, 0x50801ce9, 0x50801ce9}, - {0x0000a5e0, 0x738e7e8c, 0x738e7e8c, 0x54801ceb, 0x54801ceb}, - {0x0000a5e4, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, - {0x0000a5e8, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, - {0x0000a5ec, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, - {0x0000a5f0, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, - {0x0000a5f4, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, - {0x0000a5f8, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, - {0x0000a5fc, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, + {0x0000a588, 0x0a822220, 0x0a822220, 0x08800004, 0x08800004}, + {0x0000a58c, 0x0f822223, 0x0f822223, 0x0b800200, 0x0b800200}, + {0x0000a590, 0x14822620, 0x14822620, 0x0f800202, 0x0f800202}, + {0x0000a594, 0x18822622, 0x18822622, 0x11800400, 0x11800400}, + {0x0000a598, 0x1b822822, 0x1b822822, 0x15800402, 0x15800402}, + {0x0000a59c, 0x20822842, 0x20822842, 0x19800404, 0x19800404}, + {0x0000a5a0, 0x22822c41, 0x22822c41, 0x1b800603, 0x1b800603}, + {0x0000a5a4, 0x28823042, 0x28823042, 0x1f800a02, 0x1f800a02}, + {0x0000a5a8, 0x2c823044, 0x2c823044, 0x23800a04, 0x23800a04}, + {0x0000a5ac, 0x2f823644, 0x2f823644, 0x26800a20, 0x26800a20}, + {0x0000a5b0, 0x34843643, 0x34843643, 0x2a800e20, 0x2a800e20}, + {0x0000a5b4, 0x38843a44, 0x38843a44, 0x2e800e22, 0x2e800e22}, + {0x0000a5b8, 0x3b843e45, 0x3b843e45, 0x31800e24, 0x31800e24}, + {0x0000a5bc, 0x40863e46, 0x40863e46, 0x34801640, 0x34801640}, + {0x0000a5c0, 0x4c8a3065, 0x44883e46, 0x44883e46, 0x38801660}, + {0x0000a5c4, 0x46883e66, 0x46883e66, 0x3b801861, 0x3b801861}, + {0x0000a5c8, 0x4b8a3e69, 0x4b8a3e69, 0x3e801a81, 0x3e801a81}, + {0x0000a5cc, 0x4f8a5e66, 0x4f8a5e66, 0x42801a83, 0x42801a83}, + {0x0000a5d0, 0x548a7e66, 0x548a7e66, 0x44801c84, 0x44801c84}, + {0x0000a5d4, 0x578a7e89, 0x578a7e89, 0x48801ce3, 0x48801ce3}, + {0x0000a5d8, 0x5c8e7e8a, 0x5c8e7e8a, 0x4c801ce5, 0x4c801ce5}, + {0x0000a5dc, 0x60927e8b, 0x60927e8b, 0x50801ce9, 0x50801ce9}, + {0x0000a5e0, 0x65927ecc, 0x65927ecc, 0x54801ceb, 0x54801ceb}, + {0x0000a5e4, 0x6b969ecd, 0x6b969ecd, 0x56801eec, 0x56801eec}, + {0x0000a5e8, 0x70969f0e, 0x70969f0e, 0x56801eec, 0x56801eec}, + {0x0000a5ec, 0x75969f4f, 0x75969f4f, 0x56801eec, 0x56801eec}, + {0x0000a5f0, 0x75969f4f, 0x75969f4f, 0x56801eec, 0x56801eec}, + {0x0000a5f4, 0x75969f4f, 0x75969f4f, 0x56801eec, 0x56801eec}, + {0x0000a5f8, 0x75969f4f, 0x75969f4f, 0x56801eec, 0x56801eec}, + {0x0000a5fc, 0x75969f4f, 0x75969f4f, 0x56801eec, 0x56801eec}, {0x00016044, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, {0x00016048, 0xad241a61, 0xad241a61, 0xad241a61, 0xad241a61}, {0x00016068, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, @@ -913,71 +913,71 @@ static const u32 ar9300Modes_high_power_tx_gain_table_2p0[][5] = { static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p0[][5] = { /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ - {0x0000a410, 0x000050d9, 0x000050d9, 0x000050da, 0x000050da}, + {0x0000a410, 0x000050db, 0x000050db, 0x000050d9, 0x000050d9}, {0x0000a500, 0x00020220, 0x00020220, 0x00000000, 0x00000000}, {0x0000a504, 0x06020223, 0x06020223, 0x04000002, 0x04000002}, - {0x0000a508, 0x0b022220, 0x0b022220, 0x08000004, 0x08000004}, - {0x0000a50c, 0x10022223, 0x10022223, 0x0b000200, 0x0b000200}, - {0x0000a510, 0x17022620, 0x17022620, 0x0f000202, 0x0f000202}, - {0x0000a514, 0x1b022622, 0x1b022622, 0x11000400, 0x11000400}, - {0x0000a518, 0x1f022822, 0x1f022822, 0x15000402, 0x15000402}, - {0x0000a51c, 0x24022842, 0x24022842, 0x19000404, 0x19000404}, - {0x0000a520, 0x28042840, 0x28042840, 0x1b000603, 0x1b000603}, - {0x0000a524, 0x2c042842, 0x2c042842, 0x1f000a02, 0x1f000a02}, - {0x0000a528, 0x30042844, 0x30042844, 0x23000a04, 0x23000a04}, - {0x0000a52c, 0x34042846, 0x34042846, 0x26000a20, 0x26000a20}, - {0x0000a530, 0x39042869, 0x39042869, 0x2a000e20, 0x2a000e20}, - {0x0000a534, 0x3d062869, 0x3d062869, 0x2e000e22, 0x2e000e22}, - {0x0000a538, 0x44062c69, 0x44062c69, 0x31000e24, 0x31000e24}, - {0x0000a53c, 0x48063069, 0x48063069, 0x34001640, 0x34001640}, - {0x0000a540, 0x4c0a3065, 0x4c0a3065, 0x38001660, 0x38001660}, - {0x0000a544, 0x500a3069, 0x500a3069, 0x3b001861, 0x3b001861}, - {0x0000a548, 0x530a3469, 0x530a3469, 0x3e001a81, 0x3e001a81}, - {0x0000a54c, 0x590a7464, 0x590a7464, 0x42001a83, 0x42001a83}, - {0x0000a550, 0x5e0a7865, 0x5e0a7865, 0x44001c84, 0x44001c84}, - {0x0000a554, 0x630a7e66, 0x630a7e66, 0x48001ce3, 0x48001ce3}, - {0x0000a558, 0x680a7e89, 0x680a7e89, 0x4c001ce5, 0x4c001ce5}, - {0x0000a55c, 0x6e0a7e8c, 0x6e0a7e8c, 0x50001ce9, 0x50001ce9}, - {0x0000a560, 0x730e7e8c, 0x730e7e8c, 0x54001ceb, 0x54001ceb}, - {0x0000a564, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, - {0x0000a568, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, - {0x0000a56c, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, - {0x0000a570, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, - {0x0000a574, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, - {0x0000a578, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, - {0x0000a57c, 0x730e7e8c, 0x730e7e8c, 0x56001eec, 0x56001eec}, + {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004}, + {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200}, + {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202}, + {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400}, + {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402}, + {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404}, + {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603}, + {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02}, + {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04}, + {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20}, + {0x0000a530, 0x34043643, 0x34043643, 0x2a000e20, 0x2a000e20}, + {0x0000a534, 0x38043a44, 0x38043a44, 0x2e000e22, 0x2e000e22}, + {0x0000a538, 0x3b043e45, 0x3b043e45, 0x31000e24, 0x31000e24}, + {0x0000a53c, 0x40063e46, 0x40063e46, 0x34001640, 0x34001640}, + {0x0000a540, 0x44083e46, 0x44083e46, 0x38001660, 0x38001660}, + {0x0000a544, 0x46083e66, 0x46083e66, 0x3b001861, 0x3b001861}, + {0x0000a548, 0x4b0a3e69, 0x4b0a3e69, 0x3e001a81, 0x3e001a81}, + {0x0000a54c, 0x4f0a5e66, 0x4f0a5e66, 0x42001a83, 0x42001a83}, + {0x0000a550, 0x540a7e66, 0x540a7e66, 0x44001c84, 0x44001c84}, + {0x0000a554, 0x570a7e89, 0x570a7e89, 0x48001ce3, 0x48001ce3}, + {0x0000a558, 0x5c0e7e8a, 0x5c0e7e8a, 0x4c001ce5, 0x4c001ce5}, + {0x0000a55c, 0x60127e8b, 0x60127e8b, 0x50001ce9, 0x50001ce9}, + {0x0000a560, 0x65127ecc, 0x65127ecc, 0x54001ceb, 0x54001ceb}, + {0x0000a564, 0x6b169ecd, 0x6b169ecd, 0x56001eec, 0x56001eec}, + {0x0000a568, 0x70169f0e, 0x70169f0e, 0x56001eec, 0x56001eec}, + {0x0000a56c, 0x75169f4f, 0x75169f4f, 0x56001eec, 0x56001eec}, + {0x0000a570, 0x75169f4f, 0x75169f4f, 0x56001eec, 0x56001eec}, + {0x0000a574, 0x75169f4f, 0x75169f4f, 0x56001eec, 0x56001eec}, + {0x0000a578, 0x75169f4f, 0x75169f4f, 0x56001eec, 0x56001eec}, + {0x0000a57c, 0x75169f4f, 0x75169f4f, 0x56001eec, 0x56001eec}, {0x0000a580, 0x00820220, 0x00820220, 0x00800000, 0x00800000}, {0x0000a584, 0x06820223, 0x06820223, 0x04800002, 0x04800002}, - {0x0000a588, 0x0b822220, 0x0b822220, 0x08800004, 0x08800004}, - {0x0000a58c, 0x10822223, 0x10822223, 0x0b800200, 0x0b800200}, - {0x0000a590, 0x17822620, 0x17822620, 0x0f800202, 0x0f800202}, - {0x0000a594, 0x1b822622, 0x1b822622, 0x11800400, 0x11800400}, - {0x0000a598, 0x1f822822, 0x1f822822, 0x15800402, 0x15800402}, - {0x0000a59c, 0x24822842, 0x24822842, 0x19800404, 0x19800404}, - {0x0000a5a0, 0x28842840, 0x28842840, 0x1b800603, 0x1b800603}, - {0x0000a5a4, 0x2c842842, 0x2c842842, 0x1f800a02, 0x1f800a02}, - {0x0000a5a8, 0x30842844, 0x30842844, 0x23800a04, 0x23800a04}, - {0x0000a5ac, 0x34842846, 0x34842846, 0x26800a20, 0x26800a20}, - {0x0000a5b0, 0x39842869, 0x39842869, 0x2a800e20, 0x2a800e20}, - {0x0000a5b4, 0x3d862869, 0x3d862869, 0x2e800e22, 0x2e800e22}, - {0x0000a5b8, 0x44862c69, 0x44862c69, 0x31800e24, 0x31800e24}, - {0x0000a5bc, 0x48863069, 0x48863069, 0x34801640, 0x34801640}, - {0x0000a5c0, 0x4c8a3065, 0x4c8a3065, 0x38801660, 0x38801660}, - {0x0000a5c4, 0x508a3069, 0x508a3069, 0x3b801861, 0x3b801861}, - {0x0000a5c8, 0x538a3469, 0x538a3469, 0x3e801a81, 0x3e801a81}, - {0x0000a5cc, 0x598a7464, 0x598a7464, 0x42801a83, 0x42801a83}, - {0x0000a5d0, 0x5e8a7865, 0x5e8a7865, 0x44801c84, 0x44801c84}, - {0x0000a5d4, 0x638a7e66, 0x638a7e66, 0x48801ce3, 0x48801ce3}, - {0x0000a5d8, 0x688a7e89, 0x688a7e89, 0x4c801ce5, 0x4c801ce5}, - {0x0000a5dc, 0x6e8a7e8c, 0x6e8a7e8c, 0x50801ce9, 0x50801ce9}, - {0x0000a5e0, 0x738e7e8c, 0x738e7e8c, 0x54801ceb, 0x54801ceb}, - {0x0000a5e4, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, - {0x0000a5e8, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, - {0x0000a5ec, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, - {0x0000a5f0, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, - {0x0000a5f4, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, - {0x0000a5f8, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, - {0x0000a5fc, 0x738e7e8c, 0x738e7e8c, 0x56801eec, 0x56801eec}, + {0x0000a588, 0x0a822220, 0x0a822220, 0x08800004, 0x08800004}, + {0x0000a58c, 0x0f822223, 0x0f822223, 0x0b800200, 0x0b800200}, + {0x0000a590, 0x14822620, 0x14822620, 0x0f800202, 0x0f800202}, + {0x0000a594, 0x18822622, 0x18822622, 0x11800400, 0x11800400}, + {0x0000a598, 0x1b822822, 0x1b822822, 0x15800402, 0x15800402}, + {0x0000a59c, 0x20822842, 0x20822842, 0x19800404, 0x19800404}, + {0x0000a5a0, 0x22822c41, 0x22822c41, 0x1b800603, 0x1b800603}, + {0x0000a5a4, 0x28823042, 0x28823042, 0x1f800a02, 0x1f800a02}, + {0x0000a5a8, 0x2c823044, 0x2c823044, 0x23800a04, 0x23800a04}, + {0x0000a5ac, 0x2f823644, 0x2f823644, 0x26800a20, 0x26800a20}, + {0x0000a5b0, 0x34843643, 0x34843643, 0x2a800e20, 0x2a800e20}, + {0x0000a5b4, 0x38843a44, 0x38843a44, 0x2e800e22, 0x2e800e22}, + {0x0000a5b8, 0x3b843e45, 0x3b843e45, 0x31800e24, 0x31800e24}, + {0x0000a5bc, 0x40863e46, 0x40863e46, 0x34801640, 0x34801640}, + {0x0000a5c0, 0x44883e46, 0x44883e46, 0x38801660, 0x38801660}, + {0x0000a5c4, 0x46883e66, 0x46883e66, 0x3b801861, 0x3b801861}, + {0x0000a5c8, 0x4b8a3e69, 0x4b8a3e69, 0x3e801a81, 0x3e801a81}, + {0x0000a5cc, 0x4f8a5e66, 0x4f8a5e66, 0x42801a83, 0x42801a83}, + {0x0000a5d0, 0x548a7e66, 0x548a7e66, 0x44801c84, 0x44801c84}, + {0x0000a5d4, 0x578a7e89, 0x578a7e89, 0x48801ce3, 0x48801ce3}, + {0x0000a5d8, 0x5c8e7e8a, 0x5c8e7e8a, 0x4c801ce5, 0x4c801ce5}, + {0x0000a5dc, 0x60927e8b, 0x60927e8b, 0x50801ce9, 0x50801ce9}, + {0x0000a5e0, 0x65927ecc, 0x65927ecc, 0x54801ceb, 0x54801ceb}, + {0x0000a5e4, 0x6b969ecd, 0x6b969ecd, 0x56801eec, 0x56801eec}, + {0x0000a5e8, 0x70969f0e, 0x70969f0e, 0x56801eec, 0x56801eec}, + {0x0000a5ec, 0x75969f4f, 0x75969f4f, 0x56801eec, 0x56801eec}, + {0x0000a5f0, 0x75969f4f, 0x75969f4f, 0x56801eec, 0x56801eec}, + {0x0000a5f4, 0x75969f4f, 0x75969f4f, 0x56801eec, 0x56801eec}, + {0x0000a5f8, 0x75969f4f, 0x75969f4f, 0x56801eec, 0x56801eec}, + {0x0000a5fc, 0x75969f4f, 0x75969f4f, 0x56801eec, 0x56801eec}, {0x00016044, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, {0x00016048, 0x8c001a61, 0x8c001a61, 0x8c001a61, 0x8c001a61}, {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, @@ -1251,7 +1251,7 @@ static const u32 ar9300Common_rx_gain_table_2p0[][2] = { static const u32 ar9300Modes_low_ob_db_tx_gain_table_2p0[][5] = { /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ - {0x0000a410, 0x000050da, 0x000050da, 0x000050da, 0x000050da}, + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004}, @@ -1760,31 +1760,22 @@ static const u32 ar9300_2p0_soc_preamble[][2] = { {0x00007038, 0x000004c2}, }; -/* - * PCIE-PHY programming array, to be used prior to entering - * full sleep (holding RTC in reset, PLL is ON in L1 mode) - */ static const u32 ar9300PciePhy_pll_on_clkreq_disable_L1_2p0[][2] = { + /* Addr allmodes */ {0x00004040, 0x08212e5e}, {0x00004040, 0x0008003b}, {0x00004044, 0x00000000}, }; -/* - * PCIE-PHY programming array, to be used when not in - * full sleep (holding RTC in reset) - */ static const u32 ar9300PciePhy_clkreq_enable_L1_2p0[][2] = { + /* Addr allmodes */ {0x00004040, 0x08253e5e}, {0x00004040, 0x0008003b}, {0x00004044, 0x00000000}, }; -/* - * PCIE-PHY programming array, to be used prior to entering - * full sleep (holding RTC in reset) - */ static const u32 ar9300PciePhy_clkreq_disable_L1_2p0[][2] = { + /* Addr allmodes */ {0x00004040, 0x08213e5e}, {0x00004040, 0x0008003b}, {0x00004044, 0x00000000}, -- 1.6.3.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 02/13] ath9k_hw: fix pll clock setting for 5ghz on AR9003 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 01/13] ath9k_hw: update initvals for AR9003 Luis R. Rodriguez @ 2010-04-26 19:04 ` Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 03/13] ath9k_hw: fix typo in the AR9003 EEPROM data structure definition Luis R. Rodriguez ` (10 subsequent siblings) 12 siblings, 0 replies; 15+ messages in thread From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw) To: linville; +Cc: linux-wireless, Felix Fietkau From: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Felix Fietkau <nbd@openwrt.org> --- drivers/net/wireless/ath/ath9k/ar9003_phy.c | 11 +---------- 1 files changed, 1 insertions(+), 10 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index 137543b..bf8ec68 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c @@ -375,16 +375,7 @@ static u32 ar9003_hw_compute_pll_control(struct ath_hw *ah, else if (chan && IS_CHAN_QUARTER_RATE(chan)) pll |= SM(0x2, AR_RTC_9300_PLL_CLKSEL); - if (chan && IS_CHAN_5GHZ(chan)) { - pll |= SM(0x28, AR_RTC_9300_PLL_DIV); - - /* - * When doing fast clock, set PLL to 0x142c - */ - if (IS_CHAN_A_5MHZ_SPACED(chan)) - pll = 0x142c; - } else - pll |= SM(0x2c, AR_RTC_9300_PLL_DIV); + pll |= SM(0x2c, AR_RTC_9300_PLL_DIV); return pll; } -- 1.6.3.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 03/13] ath9k_hw: fix typo in the AR9003 EEPROM data structure definition 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 01/13] ath9k_hw: update initvals for AR9003 Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 02/13] ath9k_hw: fix pll clock setting for 5ghz on AR9003 Luis R. Rodriguez @ 2010-04-26 19:04 ` Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 04/13] ath9k_hw: disable TX IQ calibration for AR9003 Luis R. Rodriguez ` (9 subsequent siblings) 12 siblings, 0 replies; 15+ messages in thread From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw) To: linville; +Cc: linux-wireless, Felix Fietkau From: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Felix Fietkau <nbd@openwrt.org> --- drivers/net/wireless/ath/ath9k/ar9003_eeprom.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h index 5fe335e..d8c0318 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h @@ -265,7 +265,7 @@ struct cal_ctl_edge_pwr { } __packed; struct cal_ctl_data_2g { - struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_5G]; + struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_2G]; } __packed; struct cal_ctl_data_5g { -- 1.6.3.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 04/13] ath9k_hw: disable TX IQ calibration for AR9003 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez ` (2 preceding siblings ...) 2010-04-26 19:04 ` [PATCH 03/13] ath9k_hw: fix typo in the AR9003 EEPROM data structure definition Luis R. Rodriguez @ 2010-04-26 19:04 ` Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 05/13] ath9k_hw: Fix usec to hw clock conversion in 5Ghz for ar9003 Luis R. Rodriguez ` (8 subsequent siblings) 12 siblings, 0 replies; 15+ messages in thread From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw) To: linville; +Cc: linux-wireless, Luis R. Rodriguez, Paul Shaw, Thomas Hammel Disable TX IQ calibration, it was prematurely enabled in previous versions. Cc: Paul Shaw <Paul.Shaw@Atheros.com> Cc: Thomas Hammel <Thomas.Hammel@atheros.com> Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> --- drivers/net/wireless/ath/ath9k/ar9003_calib.c | 3 ++- drivers/net/wireless/ath/ath9k/hw.c | 6 ++++++ drivers/net/wireless/ath/ath9k/hw.h | 1 + 3 files changed, 9 insertions(+), 1 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c index 5e20b48..5fcafb4 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c @@ -755,7 +755,8 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah, } /* Do Tx IQ Calibration */ - ar9003_hw_tx_iq_cal(ah); + if (ah->config.tx_iq_calibration) + ar9003_hw_tx_iq_cal(ah); /* Revert chainmasks to their original values before NF cal */ ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 5a29048..9af83e5 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c @@ -387,6 +387,12 @@ static void ath9k_hw_init_config(struct ath_hw *ah) ah->config.rx_intr_mitigation = true; /* + * Tx IQ Calibration (ah->config.tx_iq_calibration) is only + * used by AR9003, but it is showing reliability issues. + * It will take a while to fix so this is currently disabled. + */ + + /* * We need this for PCI devices only (Cardbus, PCI, miniPCI) * _and_ if on non-uniprocessor systems (Multiprocessor/HT). * This means we use it for all AR5416 devices, and the few diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index a78e09b..6c84d31 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h @@ -261,6 +261,7 @@ struct ath9k_ops_config { #define AR_BASE_FREQ_5GHZ 4900 #define AR_SPUR_FEEQ_BOUND_HT40 19 #define AR_SPUR_FEEQ_BOUND_HT20 10 + bool tx_iq_calibration; /* Only available for >= AR9003 */ int spurmode; u16 spurchans[AR_EEPROM_MODAL_SPURS][2]; u8 max_txtrig_level; -- 1.6.3.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 05/13] ath9k_hw: Fix usec to hw clock conversion in 5Ghz for ar9003 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez ` (3 preceding siblings ...) 2010-04-26 19:04 ` [PATCH 04/13] ath9k_hw: disable TX IQ calibration for AR9003 Luis R. Rodriguez @ 2010-04-26 19:04 ` Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 06/13] ath9k_hw: update EEPROM data structure for AR9280 Luis R. Rodriguez ` (7 subsequent siblings) 12 siblings, 0 replies; 15+ messages in thread From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw) To: linville; +Cc: linux-wireless, Vasanthakumar Thiagarajan From: Vasanthakumar Thiagarajan <vasanth@atheros.com> Fast clock operation (44Mhz) is enabled for 5Ghz in ar9003, so take care of the conversion from usec to hw clock. Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> --- drivers/net/wireless/ath/ath9k/hw.c | 10 ++++++++-- drivers/net/wireless/ath/ath9k/hw.h | 1 + 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 9af83e5..ca676cd 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c @@ -26,6 +26,7 @@ #define ATH9K_CLOCK_RATE_CCK 22 #define ATH9K_CLOCK_RATE_5GHZ_OFDM 40 #define ATH9K_CLOCK_RATE_2GHZ_OFDM 44 +#define ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM 44 static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type); @@ -91,7 +92,11 @@ static u32 ath9k_hw_mac_clks(struct ath_hw *ah, u32 usecs) return usecs *ATH9K_CLOCK_RATE_CCK; if (conf->channel->band == IEEE80211_BAND_2GHZ) return usecs *ATH9K_CLOCK_RATE_2GHZ_OFDM; - return usecs *ATH9K_CLOCK_RATE_5GHZ_OFDM; + + if (ah->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK) + return usecs * ATH9K_CLOCK_FAST_RATE_5GHZ_OFDM; + else + return usecs * ATH9K_CLOCK_RATE_5GHZ_OFDM; } static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs) @@ -2192,7 +2197,8 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) } if (AR_SREV_9300_20_OR_LATER(ah)) { - pCap->hw_caps |= ATH9K_HW_CAP_EDMA | ATH9K_HW_CAP_LDPC; + pCap->hw_caps |= ATH9K_HW_CAP_EDMA | ATH9K_HW_CAP_LDPC | + ATH9K_HW_CAP_FASTCLOCK; pCap->rx_hp_qdepth = ATH9K_HW_RX_HP_QDEPTH; pCap->rx_lp_qdepth = ATH9K_HW_RX_LP_QDEPTH; pCap->rx_status_len = sizeof(struct ar9003_rxs); diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index 6c84d31..7a1347b 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h @@ -198,6 +198,7 @@ enum ath9k_hw_caps { ATH9K_HW_CAP_EDMA = BIT(17), ATH9K_HW_CAP_RAC_SUPPORTED = BIT(18), ATH9K_HW_CAP_LDPC = BIT(19), + ATH9K_HW_CAP_FASTCLOCK = BIT(20), }; enum ath9k_capability_type { -- 1.6.3.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 06/13] ath9k_hw: update EEPROM data structure for AR9280 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez ` (4 preceding siblings ...) 2010-04-26 19:04 ` [PATCH 05/13] ath9k_hw: Fix usec to hw clock conversion in 5Ghz for ar9003 Luis R. Rodriguez @ 2010-04-26 19:04 ` Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 07/13] ath9k_hw: fix fast clock handling for 5GHz channels Luis R. Rodriguez ` (6 subsequent siblings) 12 siblings, 0 replies; 15+ messages in thread From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw) To: linville; +Cc: linux-wireless, Felix Fietkau From: Felix Fietkau <nbd@openwrt.org> Adds read access for the 5 GHz fast clock flag Signed-off-by: Felix Fietkau <nbd@openwrt.org> --- drivers/net/wireless/ath/ath9k/eeprom.h | 3 ++- drivers/net/wireless/ath/ath9k/eeprom_def.c | 2 ++ 2 files changed, 4 insertions(+), 1 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/eeprom.h b/drivers/net/wireless/ath/ath9k/eeprom.h index fb9c8c9..21354c1 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom.h +++ b/drivers/net/wireless/ath/ath9k/eeprom.h @@ -300,7 +300,8 @@ struct base_eep_header { u32 binBuildNumber; u8 deviceType; u8 pwdclkind; - u8 futureBase_1[2]; + u8 fastClk5g; + u8 divChain; u8 rxGainType; u8 dacHiPwrMode_5G; u8 openLoopPwrCntl; diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c index cf59799..e591ad6 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_def.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c @@ -274,6 +274,8 @@ static u32 ath9k_hw_def_get_eeprom(struct ath_hw *ah, return pBase->txMask; case EEP_RX_MASK: return pBase->rxMask; + case EEP_FSTCLK_5G: + return pBase->fastClk5g; case EEP_RXGAIN_TYPE: return pBase->rxGainType; case EEP_TXGAIN_TYPE: -- 1.6.3.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 07/13] ath9k_hw: fix fast clock handling for 5GHz channels 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez ` (5 preceding siblings ...) 2010-04-26 19:04 ` [PATCH 06/13] ath9k_hw: update EEPROM data structure for AR9280 Luis R. Rodriguez @ 2010-04-26 19:04 ` Luis R. Rodriguez 2011-02-08 12:46 ` Jorge Boncompte [DTI2] 2010-04-26 19:04 ` [PATCH 08/13] ath9k: wake queue after processing edma rx frames Luis R. Rodriguez ` (5 subsequent siblings) 12 siblings, 1 reply; 15+ messages in thread From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw) To: linville; +Cc: linux-wireless, Felix Fietkau From: Felix Fietkau <nbd@openwrt.org> Combine multiple checks that were supposed to check for the same conditions, but didn't. Always enable fast PLL clock on AR9280 2.0 Signed-off-by: Felix Fietkau <nbd@openwrt.org> --- drivers/net/wireless/ath/ath9k/ar5008_phy.c | 5 ++--- drivers/net/wireless/ath/ath9k/ar9002_phy.c | 16 ++++++---------- drivers/net/wireless/ath/ath9k/ar9003_phy.c | 4 ++-- drivers/net/wireless/ath/ath9k/hw.c | 8 ++++++-- drivers/net/wireless/ath/ath9k/hw.h | 5 ++--- 5 files changed, 18 insertions(+), 20 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c index 3395ac4..c594814 100644 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c @@ -852,7 +852,7 @@ static int ar5008_hw_process_ini(struct ath_hw *ah, REG_WRITE_ARRAY(&ah->iniBB_RfGain, freqIndex, regWrites); - if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan)) { + if (IS_CHAN_A_FAST_CLOCK(ah, chan)) { REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex, regWrites); } @@ -894,8 +894,7 @@ static void ar5008_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) rfMode |= (IS_CHAN_5GHZ(chan)) ? AR_PHY_MODE_RF5GHZ : AR_PHY_MODE_RF2GHZ; - if ((AR_SREV_9280_20(ah) || AR_SREV_9300_20_OR_LATER(ah)) - && IS_CHAN_A_5MHZ_SPACED(chan)) + if (IS_CHAN_A_FAST_CLOCK(ah, chan)) rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE); REG_WRITE(ah, AR_PHY_MODE, rfMode); diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.c b/drivers/net/wireless/ath/ath9k/ar9002_phy.c index 18cfe1a..ed314e8 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c @@ -455,16 +455,12 @@ static u32 ar9002_hw_compute_pll_control(struct ath_hw *ah, pll |= SM(0x2, AR_RTC_9160_PLL_CLKSEL); if (chan && IS_CHAN_5GHZ(chan)) { - pll |= SM(0x28, AR_RTC_9160_PLL_DIV); - - - if (AR_SREV_9280_20(ah)) { - if (((chan->channel % 20) == 0) - || ((chan->channel % 10) == 0)) - pll = 0x2850; - else - pll = 0x142c; - } + if (IS_CHAN_A_FAST_CLOCK(ah, chan)) + pll = 0x142c; + else if (AR_SREV_9280_20(ah)) + pll = 0x2850; + else + pll |= SM(0x28, AR_RTC_9160_PLL_DIV); } else { pll |= SM(0x2c, AR_RTC_9160_PLL_DIV); } diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index bf8ec68..806f4a5 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c @@ -583,7 +583,7 @@ static int ar9003_hw_process_ini(struct ath_hw *ah, * For 5GHz channels requiring Fast Clock, apply * different modal values. */ - if (IS_CHAN_A_5MHZ_SPACED(chan)) + if (IS_CHAN_A_FAST_CLOCK(ah, chan)) REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex, regWrites); @@ -613,7 +613,7 @@ static void ar9003_hw_set_rfmode(struct ath_hw *ah, rfMode |= (IS_CHAN_B(chan) || IS_CHAN_G(chan)) ? AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM; - if (IS_CHAN_A_5MHZ_SPACED(chan)) + if (IS_CHAN_A_FAST_CLOCK(ah, chan)) rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE); REG_WRITE(ah, AR_PHY_MODE, rfMode); diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index ca676cd..2db3ecd 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c @@ -1232,8 +1232,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, (chan->channel != ah->curchan->channel) && ((chan->channelFlags & CHANNEL_ALL) == (ah->curchan->channelFlags & CHANNEL_ALL)) && - !(AR_SREV_9280(ah) || IS_CHAN_A_5MHZ_SPACED(chan) || - IS_CHAN_A_5MHZ_SPACED(ah->curchan))) { + !AR_SREV_9280(ah)) { if (ath9k_hw_channel_change(ah, chan)) { ath9k_hw_loadnf(ah, ah->curchan); @@ -2206,6 +2205,11 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) pCap->txs_len = sizeof(struct ar9003_txs); } else { pCap->tx_desc_len = sizeof(struct ath_desc); + if (AR_SREV_9280_20(ah) && + ((ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV) <= + AR5416_EEP_MINOR_VER_16) || + ah->eep_ops->get_eeprom(ah, EEP_FSTCLK_5G))) + pCap->hw_caps |= ATH9K_HW_CAP_FASTCLOCK; } if (AR_SREV_9300_20_OR_LATER(ah)) diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index 7a1347b..bc682da 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h @@ -369,10 +369,9 @@ struct ath9k_channel { #define IS_CHAN_2GHZ(_c) (((_c)->channelFlags & CHANNEL_2GHZ) != 0) #define IS_CHAN_HALF_RATE(_c) (((_c)->channelFlags & CHANNEL_HALF) != 0) #define IS_CHAN_QUARTER_RATE(_c) (((_c)->channelFlags & CHANNEL_QUARTER) != 0) -#define IS_CHAN_A_5MHZ_SPACED(_c) \ +#define IS_CHAN_A_FAST_CLOCK(_ah, _c) \ ((((_c)->channelFlags & CHANNEL_5GHZ) != 0) && \ - (((_c)->channel % 20) != 0) && \ - (((_c)->channel % 10) != 0)) + ((_ah)->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)) /* These macros check chanmode and not channelFlags */ #define IS_CHAN_B(_c) ((_c)->chanmode == CHANNEL_B) -- 1.6.3.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 07/13] ath9k_hw: fix fast clock handling for 5GHz channels 2010-04-26 19:04 ` [PATCH 07/13] ath9k_hw: fix fast clock handling for 5GHz channels Luis R. Rodriguez @ 2011-02-08 12:46 ` Jorge Boncompte [DTI2] 0 siblings, 0 replies; 15+ messages in thread From: Jorge Boncompte [DTI2] @ 2011-02-08 12:46 UTC (permalink / raw) To: lrodriguez; +Cc: linux-wireless, Felix Fietkau El 26/04/2010 21:04, Luis R. Rodriguez escribió: > From: Felix Fietkau <nbd@openwrt.org> > > Combine multiple checks that were supposed to check for the same > conditions, but didn't. Always enable fast PLL clock on AR9280 2.0 > > Signed-off-by: Felix Fietkau <nbd@openwrt.org> > --- > drivers/net/wireless/ath/ath9k/ar5008_phy.c | 5 ++--- > drivers/net/wireless/ath/ath9k/ar9002_phy.c | 16 ++++++---------- > drivers/net/wireless/ath/ath9k/ar9003_phy.c | 4 ++-- > drivers/net/wireless/ath/ath9k/hw.c | 8 ++++++-- > drivers/net/wireless/ath/ath9k/hw.h | 5 ++--- > 5 files changed, 18 insertions(+), 20 deletions(-) > > diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c > index 3395ac4..c594814 100644 > --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c > +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c > @@ -852,7 +852,7 @@ static int ar5008_hw_process_ini(struct ath_hw *ah, > > REG_WRITE_ARRAY(&ah->iniBB_RfGain, freqIndex, regWrites); > > - if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan)) { > + if (IS_CHAN_A_FAST_CLOCK(ah, chan)) { > REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex, > regWrites); > } > @@ -894,8 +894,7 @@ static void ar5008_hw_set_rfmode(struct ath_hw *ah, struct ath9k_channel *chan) > rfMode |= (IS_CHAN_5GHZ(chan)) ? > AR_PHY_MODE_RF5GHZ : AR_PHY_MODE_RF2GHZ; > > - if ((AR_SREV_9280_20(ah) || AR_SREV_9300_20_OR_LATER(ah)) > - && IS_CHAN_A_5MHZ_SPACED(chan)) > + if (IS_CHAN_A_FAST_CLOCK(ah, chan)) > rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE); > > REG_WRITE(ah, AR_PHY_MODE, rfMode); > diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.c b/drivers/net/wireless/ath/ath9k/ar9002_phy.c > index 18cfe1a..ed314e8 100644 > --- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c > +++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c > @@ -455,16 +455,12 @@ static u32 ar9002_hw_compute_pll_control(struct ath_hw *ah, > pll |= SM(0x2, AR_RTC_9160_PLL_CLKSEL); > > if (chan && IS_CHAN_5GHZ(chan)) { > - pll |= SM(0x28, AR_RTC_9160_PLL_DIV); > - > - > - if (AR_SREV_9280_20(ah)) { > - if (((chan->channel % 20) == 0) > - || ((chan->channel % 10) == 0)) > - pll = 0x2850; > - else > - pll = 0x142c; > - } > + if (IS_CHAN_A_FAST_CLOCK(ah, chan)) > + pll = 0x142c; > + else if (AR_SREV_9280_20(ah)) > + pll = 0x2850; > + else > + pll |= SM(0x28, AR_RTC_9160_PLL_DIV); > } else { > pll |= SM(0x2c, AR_RTC_9160_PLL_DIV); > } > diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c > index bf8ec68..806f4a5 100644 > --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c > +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c > @@ -583,7 +583,7 @@ static int ar9003_hw_process_ini(struct ath_hw *ah, > * For 5GHz channels requiring Fast Clock, apply > * different modal values. > */ > - if (IS_CHAN_A_5MHZ_SPACED(chan)) > + if (IS_CHAN_A_FAST_CLOCK(ah, chan)) > REG_WRITE_ARRAY(&ah->iniModesAdditional, > modesIndex, regWrites); > > @@ -613,7 +613,7 @@ static void ar9003_hw_set_rfmode(struct ath_hw *ah, > rfMode |= (IS_CHAN_B(chan) || IS_CHAN_G(chan)) > ? AR_PHY_MODE_DYNAMIC : AR_PHY_MODE_OFDM; > > - if (IS_CHAN_A_5MHZ_SPACED(chan)) > + if (IS_CHAN_A_FAST_CLOCK(ah, chan)) > rfMode |= (AR_PHY_MODE_DYNAMIC | AR_PHY_MODE_DYN_CCK_DISABLE); > > REG_WRITE(ah, AR_PHY_MODE, rfMode); > diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c > index ca676cd..2db3ecd 100644 > --- a/drivers/net/wireless/ath/ath9k/hw.c > +++ b/drivers/net/wireless/ath/ath9k/hw.c > @@ -1232,8 +1232,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, > (chan->channel != ah->curchan->channel) && > ((chan->channelFlags & CHANNEL_ALL) == > (ah->curchan->channelFlags & CHANNEL_ALL)) && > - !(AR_SREV_9280(ah) || IS_CHAN_A_5MHZ_SPACED(chan) || > - IS_CHAN_A_5MHZ_SPACED(ah->curchan))) { > + !AR_SREV_9280(ah)) { > > if (ath9k_hw_channel_change(ah, chan)) { > ath9k_hw_loadnf(ah, ah->curchan); > @@ -2206,6 +2205,11 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah) > pCap->txs_len = sizeof(struct ar9003_txs); > } else { > pCap->tx_desc_len = sizeof(struct ath_desc); > + if (AR_SREV_9280_20(ah) && > + ((ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV) <= > + AR5416_EEP_MINOR_VER_16) || > + ah->eep_ops->get_eeprom(ah, EEP_FSTCLK_5G))) > + pCap->hw_caps |= ATH9K_HW_CAP_FASTCLOCK; > } > > if (AR_SREV_9300_20_OR_LATER(ah)) > diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h > index 7a1347b..bc682da 100644 > --- a/drivers/net/wireless/ath/ath9k/hw.h > +++ b/drivers/net/wireless/ath/ath9k/hw.h > @@ -369,10 +369,9 @@ struct ath9k_channel { > #define IS_CHAN_2GHZ(_c) (((_c)->channelFlags & CHANNEL_2GHZ) != 0) > #define IS_CHAN_HALF_RATE(_c) (((_c)->channelFlags & CHANNEL_HALF) != 0) > #define IS_CHAN_QUARTER_RATE(_c) (((_c)->channelFlags & CHANNEL_QUARTER) != 0) > -#define IS_CHAN_A_5MHZ_SPACED(_c) \ > +#define IS_CHAN_A_FAST_CLOCK(_ah, _c) \ > ((((_c)->channelFlags & CHANNEL_5GHZ) != 0) && \ > - (((_c)->channel % 20) != 0) && \ > - (((_c)->channel % 10) != 0)) > + ((_ah)->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)) > > /* These macros check chanmode and not channelFlags */ > #define IS_CHAN_B(_c) ((_c)->chanmode == CHANNEL_B) I have noticed recently that my Ubiquity SR71-15 (AR9220) do not complete either of the AGC calibrations after this patch. It keeps trying the AGC Gain calibration forever. If I skip it in the code it does the same with the ADC DC calibration. Disabling both it does the IQ calibration without problems. Reverting this patch, makes all calibrations finish without problems. Could you take a look at it, I can test whatever patch you come up with? Regards, Jorge -- ============================================================== Jorge Boncompte - Ingenieria y Gestion de RED DTI2 - Desarrollo de la Tecnologia de las Comunicaciones -------------------------------------------------------------- C/ Abogado Enriquez Barrios, 5 14004 CORDOBA (SPAIN) Tlf: +34 957 761395 / FAX: +34 957 450380 ============================================================== - There is only so much duct tape you can put on something before it just becomes a giant ball of duct tape. ============================================================== ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 08/13] ath9k: wake queue after processing edma rx frames 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez ` (6 preceding siblings ...) 2010-04-26 19:04 ` [PATCH 07/13] ath9k_hw: fix fast clock handling for 5GHz channels Luis R. Rodriguez @ 2010-04-26 19:04 ` Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 09/13] ath9k_hw: use the configured power limit for AR9003 Luis R. Rodriguez ` (4 subsequent siblings) 12 siblings, 0 replies; 15+ messages in thread From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw) To: linville; +Cc: linux-wireless, Felix Fietkau From: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Felix Fietkau <nbd@openwrt.org> --- drivers/net/wireless/ath/ath9k/xmit.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c index b0d345a..3db1917 100644 --- a/drivers/net/wireless/ath/ath9k/xmit.c +++ b/drivers/net/wireless/ath/ath9k/xmit.c @@ -2290,6 +2290,8 @@ void ath_tx_edma_tasklet(struct ath_softc *sc) ath_tx_complete_buf(sc, bf, txq, &bf_head, &txs, txok, 0); + ath_wake_mac80211_queue(sc, txq); + spin_lock_bh(&txq->axq_lock); if (!list_empty(&txq->txq_fifo_pending)) { INIT_LIST_HEAD(&bf_head); -- 1.6.3.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 09/13] ath9k_hw: use the configured power limit for AR9003 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez ` (7 preceding siblings ...) 2010-04-26 19:04 ` [PATCH 08/13] ath9k: wake queue after processing edma rx frames Luis R. Rodriguez @ 2010-04-26 19:04 ` Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 10/13] ath9k_hw: Fix typos in tx rate power level parsing " Luis R. Rodriguez ` (3 subsequent siblings) 12 siblings, 0 replies; 15+ messages in thread From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw) To: linville; +Cc: linux-wireless, Felix Fietkau From: Felix Fietkau <nbd@openwrt.org> Since the new AR9003 EEPROM code does tune the card for the configured tx power level, we need to fill in the correct power limits in the TPC part of the DMA descriptor. Signed-off-by: Felix Fietkau <nbd@openwrt.org> --- drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 1 + drivers/net/wireless/ath/ath9k/ar9003_mac.c | 3 +++ drivers/net/wireless/ath/ath9k/hw.h | 1 + 3 files changed, 5 insertions(+), 0 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c index 5d92be4..79b0e28 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c @@ -1817,6 +1817,7 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah, u8 twiceMaxRegulatoryPower, u8 powerLimit) { + ah->txpower_limit = powerLimit; ar9003_hw_set_target_power_eeprom(ah, chan->channel); ar9003_hw_calibration_apply(ah, chan->channel); } diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mac.c b/drivers/net/wireless/ath/ath9k/ar9003_mac.c index 7d111fb..37ba374 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c @@ -311,6 +311,9 @@ static void ar9003_hw_set11n_txdesc(struct ath_hw *ah, void *ds, { struct ar9003_txc *ads = (struct ar9003_txc *) ds; + if (txpower > ah->txpower_limit) + txpower = ah->txpower_limit; + txpower += ah->txpower_indexoffset; if (txpower > 63) txpower = 63; diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index bc682da..77245df 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h @@ -719,6 +719,7 @@ struct ath_hw { u32 *addac5416_21; u32 *bank6Temp; + u8 txpower_limit; int16_t txpower_indexoffset; int coverage_class; u32 beacon_interval; -- 1.6.3.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 10/13] ath9k_hw: Fix typos in tx rate power level parsing for AR9003 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez ` (8 preceding siblings ...) 2010-04-26 19:04 ` [PATCH 09/13] ath9k_hw: use the configured power limit for AR9003 Luis R. Rodriguez @ 2010-04-26 19:04 ` Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 11/13] ath9k_hw: Fix endian bug in an AR9003 EEPROM field Luis R. Rodriguez ` (2 subsequent siblings) 12 siblings, 0 replies; 15+ messages in thread From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw) To: linville; +Cc: linux-wireless, Felix Fietkau From: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Felix Fietkau <nbd@openwrt.org> --- drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c index 79b0e28..25dd44d 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c @@ -1200,7 +1200,7 @@ static u8 ar9003_hw_eeprom_get_tgt_pwr(struct ath_hw *ah, u8 *pFreqBin; if (is2GHz) { - numPiers = AR9300_NUM_5G_20_TARGET_POWERS; + numPiers = AR9300_NUM_2G_20_TARGET_POWERS; pEepromTargetPwr = eep->calTargetPower2G; pFreqBin = eep->calTarget_freqbin_2G; } else { @@ -1236,7 +1236,7 @@ static u8 ar9003_hw_eeprom_get_ht20_tgt_pwr(struct ath_hw *ah, u8 *pFreqBin; if (is2GHz) { - numPiers = AR9300_NUM_5G_20_TARGET_POWERS; + numPiers = AR9300_NUM_2G_20_TARGET_POWERS; pEepromTargetPwr = eep->calTargetPower2GHT20; pFreqBin = eep->calTarget_freqbin_2GHT20; } else { -- 1.6.3.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 11/13] ath9k_hw: Fix endian bug in an AR9003 EEPROM field 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez ` (9 preceding siblings ...) 2010-04-26 19:04 ` [PATCH 10/13] ath9k_hw: Fix typos in tx rate power level parsing " Luis R. Rodriguez @ 2010-04-26 19:04 ` Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 12/13] ath9k_hw: fix noisefloor timeout handling on AR9003 Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 13/13] ath9k_hw: Fix TX interrupt mitigation settings Luis R. Rodriguez 12 siblings, 0 replies; 15+ messages in thread From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw) To: linville; +Cc: linux-wireless, Felix Fietkau From: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Felix Fietkau <nbd@openwrt.org> --- drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c index 25dd44d..8a79550 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c @@ -659,6 +659,9 @@ static void ar9300_swap_eeprom(struct ar9300_eeprom *eep) word = swab16(eep->baseEepHeader.regDmn[1]); eep->baseEepHeader.regDmn[1] = word; + dword = swab32(eep->baseEepHeader.swreg); + eep->baseEepHeader.swreg = dword; + dword = swab32(eep->modalHeader2G.antCtrlCommon); eep->modalHeader2G.antCtrlCommon = dword; -- 1.6.3.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 12/13] ath9k_hw: fix noisefloor timeout handling on AR9003 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez ` (10 preceding siblings ...) 2010-04-26 19:04 ` [PATCH 11/13] ath9k_hw: Fix endian bug in an AR9003 EEPROM field Luis R. Rodriguez @ 2010-04-26 19:04 ` Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 13/13] ath9k_hw: Fix TX interrupt mitigation settings Luis R. Rodriguez 12 siblings, 0 replies; 15+ messages in thread From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw) To: linville; +Cc: linux-wireless, Felix Fietkau From: Felix Fietkau <nbd@openwrt.org> When the noisefloor calibration times out, do not load -50 into the registers, since this might cause rx issues. Instead, leave enough time for the noise floor calibration to complete until the next check. Signed-off-by: Felix Fietkau <nbd@openwrt.org> --- drivers/net/wireless/ath/ath9k/ar9003_phy.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index 806f4a5..80431a2 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c @@ -1093,6 +1093,7 @@ static void ar9003_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan) ath_print(common, ATH_DBG_ANY, "Timeout while waiting for nf " "to load: AR_PHY_AGC_CONTROL=0x%x\n", REG_READ(ah, AR_PHY_AGC_CONTROL)); + return; } /* -- 1.6.3.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 13/13] ath9k_hw: Fix TX interrupt mitigation settings 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez ` (11 preceding siblings ...) 2010-04-26 19:04 ` [PATCH 12/13] ath9k_hw: fix noisefloor timeout handling on AR9003 Luis R. Rodriguez @ 2010-04-26 19:04 ` Luis R. Rodriguez 12 siblings, 0 replies; 15+ messages in thread From: Luis R. Rodriguez @ 2010-04-26 19:04 UTC (permalink / raw) To: linville; +Cc: linux-wireless, Luis R. Rodriguez TX interrupt mitigation reduces the number of interrupts by addressing several interrupt actions (AR_IMR_TXOK, AR_IMR_TXDESC) all in one interrupt so when enabling it discard setting the other interrupts. Without this TX interrupt mitigation would actually increase the number of interrupts two-fold. We still leave TX interrupt mitigation disabled as it is still being tested. Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> --- drivers/net/wireless/ath/ath9k/mac.c | 10 ++++++---- 1 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c index 7bbf502..0e425cb 100644 --- a/drivers/net/wireless/ath/ath9k/mac.c +++ b/drivers/net/wireless/ath/ath9k/mac.c @@ -878,10 +878,12 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, if (ints & ATH9K_INT_TX) { if (ah->config.tx_intr_mitigation) mask |= AR_IMR_TXMINTR | AR_IMR_TXINTM; - if (ah->txok_interrupt_mask) - mask |= AR_IMR_TXOK; - if (ah->txdesc_interrupt_mask) - mask |= AR_IMR_TXDESC; + else { + if (ah->txok_interrupt_mask) + mask |= AR_IMR_TXOK; + if (ah->txdesc_interrupt_mask) + mask |= AR_IMR_TXDESC; + } if (ah->txerr_interrupt_mask) mask |= AR_IMR_TXERR; if (ah->txeol_interrupt_mask) -- 1.6.3.3 ^ permalink raw reply related [flat|nested] 15+ messages in thread
end of thread, other threads:[~2011-02-08 12:51 UTC | newest] Thread overview: 15+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2010-04-26 19:04 [PATCH 00/13] ath9k/ath9k_hw: AR9003 fixes for April Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 01/13] ath9k_hw: update initvals for AR9003 Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 02/13] ath9k_hw: fix pll clock setting for 5ghz on AR9003 Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 03/13] ath9k_hw: fix typo in the AR9003 EEPROM data structure definition Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 04/13] ath9k_hw: disable TX IQ calibration for AR9003 Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 05/13] ath9k_hw: Fix usec to hw clock conversion in 5Ghz for ar9003 Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 06/13] ath9k_hw: update EEPROM data structure for AR9280 Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 07/13] ath9k_hw: fix fast clock handling for 5GHz channels Luis R. Rodriguez 2011-02-08 12:46 ` Jorge Boncompte [DTI2] 2010-04-26 19:04 ` [PATCH 08/13] ath9k: wake queue after processing edma rx frames Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 09/13] ath9k_hw: use the configured power limit for AR9003 Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 10/13] ath9k_hw: Fix typos in tx rate power level parsing " Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 11/13] ath9k_hw: Fix endian bug in an AR9003 EEPROM field Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 12/13] ath9k_hw: fix noisefloor timeout handling on AR9003 Luis R. Rodriguez 2010-04-26 19:04 ` [PATCH 13/13] ath9k_hw: Fix TX interrupt mitigation settings Luis R. Rodriguez
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