[PATCH 1/5][RFC] lwp: adding support for AMD lightweight profiling

[PATCH 1/5][RFC] lwp: adding support for AMD lightweight profiling

[Wei Huang]

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Extend CPUID leaf to cover LWP related leaves.

This patch extends the maximum CPUID leaf from 0x80000008 to 0x8000001c 
to cover LWP. This patch was adpated from Chrsitoph Egger's nested 
virtualization tools patch.

Signed-off-by: Wei Huang <wei.huang2@amd.com>



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exporting patch:
# HG changeset patch
# User Wei Huang <wei.huang2@amd.com>
# Date 1297375234 21600
# Node ID b57ee5edd2924179b21fa19d35b0e2754c4caeff
# Parent  c64dcc4d2eca7db3c6ab3adcbdc28454301f3c68
Extend CPUID leaf to cover LWP related leaves.

This patch extends the maximum CPUID leaf from 0x80000008 to 0x8000001c to cover LWP. This patch was adpated from Chrsitoph Egger's nested virtualization tool patch.

diff -r c64dcc4d2eca -r b57ee5edd292 tools/libxc/xc_cpuid_x86.c
--- a/tools/libxc/xc_cpuid_x86.c	Thu Feb 10 17:24:41 2011 +0000
+++ b/tools/libxc/xc_cpuid_x86.c	Thu Feb 10 16:00:34 2011 -0600
@@ -30,7 +30,8 @@
 #define set_bit(idx, dst)   ((dst) |= (1u << ((idx) & 31)))
 
 #define DEF_MAX_BASE 0x0000000du
-#define DEF_MAX_EXT  0x80000008u
+#define DEF_MAX_INTELEXT  0x80000008u
+#define DEF_MAX_AMDEXT    0x8000001cu
 
 static int hypervisor_is_64bit(xc_interface *xch)
 {
@@ -87,6 +88,11 @@
         regs[0] = regs[1] = regs[2] = 0;
         break;
 
+    case 0x80000000:
+        if ( regs[0] > DEF_MAX_AMDEXT )
+            regs[0] = DEF_MAX_AMDEXT;
+        break;
+
     case 0x80000001: {
         int is_64bit = hypervisor_is_64bit(xch) && is_pae;
 
@@ -104,7 +110,8 @@
                     bitmaskof(X86_FEATURE_3DNOWPREFETCH) |
                     bitmaskof(X86_FEATURE_XOP) |
                     bitmaskof(X86_FEATURE_FMA4) |
-                    bitmaskof(X86_FEATURE_TBM));
+                    bitmaskof(X86_FEATURE_TBM) |
+                    bitmaskof(X86_FEATURE_LWP));
         regs[3] &= (0x0183f3ff | /* features shared with 0x00000001:EDX */
                     (is_pae ? bitmaskof(X86_FEATURE_NX) : 0) |
                     (is_64bit ? bitmaskof(X86_FEATURE_LM) : 0) |
@@ -144,6 +151,11 @@
         regs[3] &= 0x3ffu;
         break;
 
+    case 0x80000000:
+        if ( regs[0] > DEF_MAX_INTELEXT )
+            regs[0] = DEF_MAX_INTELEXT;
+        break;
+
     case 0x80000001: {
         int is_64bit = hypervisor_is_64bit(xch) && is_pae;
 
@@ -305,8 +317,7 @@
         break;
 
     case 0x80000000:
-        if ( regs[0] > DEF_MAX_EXT )
-            regs[0] = DEF_MAX_EXT;
+        /* Passthrough to cpu vendor specific functions */
         break;
 
     case 0x80000001:
@@ -335,6 +346,7 @@
     case 0x80000004: /* ... continued         */
     case 0x80000005: /* AMD L1 cache/TLB info (dumped by Intel policy) */
     case 0x80000006: /* AMD L2/3 cache/TLB info ; Intel L2 cache features */
+    case 0x8000001c: /* AMD lightweight profiling */
         break;
 
     default:
@@ -507,13 +519,19 @@
 {
     unsigned int input[2] = { 0, 0 }, regs[4];
     unsigned int base_max, ext_max;
+    char brand[13];
     int rc;
 
     cpuid(input, regs);
     base_max = (regs[0] <= DEF_MAX_BASE) ? regs[0] : DEF_MAX_BASE;
     input[0] = 0x80000000;
     cpuid(input, regs);
-    ext_max = (regs[0] <= DEF_MAX_EXT) ? regs[0] : DEF_MAX_EXT;
+
+    xc_cpuid_brand_get(brand);
+    if ( strstr(brand, "AMD") )
+        ext_max = (regs[0] <= DEF_MAX_AMDEXT) ? regs[0] : DEF_MAX_AMDEXT;
+    else
+        ext_max = (regs[0] <= DEF_MAX_INTELEXT) ? regs[0] : DEF_MAX_INTELEXT;
 
     input[0] = 0;
     input[1] = XEN_CPUID_INPUT_UNUSED;

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