* [PATCH] Check AMD SYSCFG DramModEn bit for MTRR configuration
@ 2011-03-01 21:11 Wei Huang
2011-03-02 0:52 ` Huang2, Wei
2011-03-02 7:01 ` Keir Fraser
0 siblings, 2 replies; 5+ messages in thread
From: Wei Huang @ 2011-03-01 21:11 UTC (permalink / raw)
To: 'xen-devel@lists.xensource.com'
[-- Attachment #1: Type: text/plain, Size: 355 bytes --]
This patch checks whether SYSCFG DramModEn bit is clear by BIOS. Some
buggy BIOS might set this bit to 1, which causes unexpected behavior on
AMD platforms. This patch also increase family check for AMD CPUs when
setting fixed MTRR ranges.
Signed-off-by: Wei Huang <wei.huang2@amd.com>
PS: If OK, please apply it to both xen-4.1 and xen-4.0 trees.
[-- Attachment #2: check_amd_syscfg_moden_bit.txt --]
[-- Type: text/plain, Size: 1472 bytes --]
diff -r cb4d42aaf673 xen/arch/x86/cpu/mtrr/generic.c
--- a/xen/arch/x86/cpu/mtrr/generic.c Tue Mar 01 14:03:16 2011 -0600
+++ b/xen/arch/x86/cpu/mtrr/generic.c Tue Mar 01 15:31:36 2011 -0600
@@ -34,12 +34,38 @@
rdmsrl(MTRRphysMask_MSR(index), vr->mask);
}
+
+/*
+ * BIOS is expected to clear MtrrFixDramModEn bit. According to AMD BKDG :
+ * "The MtrrFixDramModEn bit should be set to 1 during BIOS initalization of
+ * the fixed MTRRs, then cleared to 0 for operation."
+ */
+static inline void amd_check_syscfg_dram_mod_en(void)
+{
+ uint64_t syscfg;
+
+ if (!((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) &&
+ (boot_cpu_data.x86 >= 0x0f)))
+ return;
+
+ rdmsrl(MSR_K8_SYSCFG, syscfg);
+ if (syscfg & K8_MTRRFIXRANGE_DRAM_MODIFY) {
+ printk(KERN_ERR "MTRR: CPU %u: SYSCFG[MtrrFixDramModEn]"
+ " not cleared by BIOS, clearing this bit\n",
+ smp_processor_id());
+ syscfg &= ~K8_MTRRFIXRANGE_DRAM_MODIFY;
+ wrmsr_safe(MSR_K8_SYSCFG, syscfg);
+ }
+}
+
static void
get_fixed_ranges(mtrr_type * frs)
{
uint64_t *p = (uint64_t *) frs;
int i;
+ amd_check_syscfg_dram_mod_en();
+
rdmsrl(MTRRfix64K_00000_MSR, p[0]);
for (i = 0; i < 2; i++)
@@ -146,7 +172,7 @@
if (msr_content != val) {
if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
- boot_cpu_data.x86 == 15 &&
+ boot_cpu_data.x86 >= 0xf &&
((msrwords[0] | msrwords[1]) & K8_MTRR_RDMEM_WRMEM_MASK))
k8_enable_fixed_iorrs();
mtrr_wrmsr(msr, val);
[-- Attachment #3: Type: text/plain, Size: 138 bytes --]
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^ permalink raw reply [flat|nested] 5+ messages in thread* RE: [PATCH] Check AMD SYSCFG DramModEn bit for MTRR configuration
2011-03-01 21:11 [PATCH] Check AMD SYSCFG DramModEn bit for MTRR configuration Wei Huang
@ 2011-03-02 0:52 ` Huang2, Wei
2011-03-02 7:01 ` Keir Fraser
1 sibling, 0 replies; 5+ messages in thread
From: Huang2, Wei @ 2011-03-02 0:52 UTC (permalink / raw)
To: Huang2, Wei, 'xen-devel@lists.xensource.com'
This patch has some problem on SMP system. I am creating another one. Sorry...
-Wei
-----Original Message-----
From: xen-devel-bounces@lists.xensource.com [mailto:xen-devel-bounces@lists.xensource.com] On Behalf Of Wei Huang
Sent: Tuesday, March 01, 2011 3:12 PM
To: 'xen-devel@lists.xensource.com'
Subject: [Xen-devel] [PATCH] Check AMD SYSCFG DramModEn bit for MTRR configuration
This patch checks whether SYSCFG DramModEn bit is clear by BIOS. Some buggy BIOS might set this bit to 1, which causes unexpected behavior on AMD platforms. This patch also increase family check for AMD CPUs when setting fixed MTRR ranges.
Signed-off-by: Wei Huang <wei.huang2@amd.com>
PS: If OK, please apply it to both xen-4.1 and xen-4.0 trees.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] Check AMD SYSCFG DramModEn bit for MTRR configuration
2011-03-01 21:11 [PATCH] Check AMD SYSCFG DramModEn bit for MTRR configuration Wei Huang
2011-03-02 0:52 ` Huang2, Wei
@ 2011-03-02 7:01 ` Keir Fraser
2011-03-02 15:20 ` Anish Patel
1 sibling, 1 reply; 5+ messages in thread
From: Keir Fraser @ 2011-03-02 7:01 UTC (permalink / raw)
To: Wei Huang, 'xen-devel@lists.xensource.com'
On 01/03/2011 21:11, "Wei Huang" <wei.huang2@amd.com> wrote:
> This patch checks whether SYSCFG DramModEn bit is clear by BIOS. Some
> buggy BIOS might set this bit to 1, which causes unexpected behavior on
> AMD platforms. This patch also increase family check for AMD CPUs when
> setting fixed MTRR ranges.
How common are these buggy BIOSes? Can't we just get users to update their
BIOS?
-- Keir
> Signed-off-by: Wei Huang <wei.huang2@amd.com>
>
>
> PS: If OK, please apply it to both xen-4.1 and xen-4.0 trees.
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xensource.com
> http://lists.xensource.com/xen-devel
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] Check AMD SYSCFG DramModEn bit for MTRR configuration
2011-03-02 7:01 ` Keir Fraser
@ 2011-03-02 15:20 ` Anish Patel
2011-03-02 17:25 ` Wei Huang
0 siblings, 1 reply; 5+ messages in thread
From: Anish Patel @ 2011-03-02 15:20 UTC (permalink / raw)
To: Keir Fraser; +Cc: Wei Huang, 'xen-devel@lists.xensource.com'
Buggy BIOSes are more common than you think. especially from small
shops, and some times they don't tend to release BIOS updates for their
platforms.
On 03/02/11 02:01, Keir Fraser wrote:
> On 01/03/2011 21:11, "Wei Huang"<wei.huang2@amd.com> wrote:
>
>> This patch checks whether SYSCFG DramModEn bit is clear by BIOS. Some
>> buggy BIOS might set this bit to 1, which causes unexpected behavior on
>> AMD platforms. This patch also increase family check for AMD CPUs when
>> setting fixed MTRR ranges.
> How common are these buggy BIOSes? Can't we just get users to update their
> BIOS?
>
> -- Keir
>
>> Signed-off-by: Wei Huang<wei.huang2@amd.com>
>>
>>
>> PS: If OK, please apply it to both xen-4.1 and xen-4.0 trees.
>>
>> _______________________________________________
>> Xen-devel mailing list
>> Xen-devel@lists.xensource.com
>> http://lists.xensource.com/xen-devel
>
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xensource.com
> http://lists.xensource.com/xen-devel
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] Check AMD SYSCFG DramModEn bit for MTRR configuration
2011-03-02 15:20 ` Anish Patel
@ 2011-03-02 17:25 ` Wei Huang
0 siblings, 0 replies; 5+ messages in thread
From: Wei Huang @ 2011-03-02 17:25 UTC (permalink / raw)
To: Anish Patel; +Cc: Keir Fraser, 'xen-devel@lists.xensource.com'
It is indeed very rare. But such bug, whenever it happens, is very hard
to spot. Linux kernel forces this bit to clear when read fixed MTRR. I
think we should at least print out a warning message.
-Wei
On Wed, 2011-03-02 at 09:20 -0600, Anish Patel wrote:
> Buggy BIOSes are more common than you think. especially from small
> shops, and some times they don't tend to release BIOS updates for their
> platforms.
>
>
>
> On 03/02/11 02:01, Keir Fraser wrote:
> > On 01/03/2011 21:11, "Wei Huang"<wei.huang2@amd.com> wrote:
> >
> >> This patch checks whether SYSCFG DramModEn bit is clear by BIOS. Some
> >> buggy BIOS might set this bit to 1, which causes unexpected behavior on
> >> AMD platforms. This patch also increase family check for AMD CPUs when
> >> setting fixed MTRR ranges.
> > How common are these buggy BIOSes? Can't we just get users to update their
> > BIOS?
> >
> > -- Keir
> >
> >> Signed-off-by: Wei Huang<wei.huang2@amd.com>
> >>
> >>
> >> PS: If OK, please apply it to both xen-4.1 and xen-4.0 trees.
> >>
> >> _______________________________________________
> >> Xen-devel mailing list
> >> Xen-devel@lists.xensource.com
> >> http://lists.xensource.com/xen-devel
> >
> >
> > _______________________________________________
> > Xen-devel mailing list
> > Xen-devel@lists.xensource.com
> > http://lists.xensource.com/xen-devel
> >
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2011-03-02 17:25 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2011-03-01 21:11 [PATCH] Check AMD SYSCFG DramModEn bit for MTRR configuration Wei Huang
2011-03-02 0:52 ` Huang2, Wei
2011-03-02 7:01 ` Keir Fraser
2011-03-02 15:20 ` Anish Patel
2011-03-02 17:25 ` Wei Huang
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