[RFC PATCH 3/3] AMD IOMMU: Enable p2m sharing

[RFC PATCH 3/3] AMD IOMMU: Enable p2m sharing

[Wei Wang]

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--
Advanced Micro Devices GmbH
Sitz: Dornach, Gemeinde Aschheim,
Landkreis München Registergericht München,
HRB Nr. 43632
WEEE-Reg-Nr: DE 12919551
Geschäftsführer:
Alberto Bozzo, Andrew Bowd


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# HG changeset patch
# User Wei Wang <wei.wang2@amd.com>
# Date 1300981300 -3600
# Node ID 7be7906a406ed176ca6cc4e074a46cdc827d3764
# Parent  48052c25abfd39b5c1b96481bb908bcedf1af7d5
Introduce a new parameter (iommu=sharept) for both vtd and amd-vi 
to enable p2m-iommu page table sharing.

Signed-off-by: Wei Wang <wei.wang2@amd.com>

diff -r 48052c25abfd -r 7be7906a406e xen/arch/x86/mm/p2m.c
--- a/xen/arch/x86/mm/p2m.c	Thu Mar 24 16:34:29 2011 +0100
+++ b/xen/arch/x86/mm/p2m.c	Thu Mar 24 16:41:40 2011 +0100
@@ -1921,8 +1921,7 @@
 
     p2m->phys_table = pagetable_from_mfn(page_to_mfn(p2m_top));
 
-    if ( hap_enabled(d) && (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) )
-        iommu_set_pgd(d);
+    iommu_share_p2m_table(d);
 
     P2M_PRINTK("populating p2m table\n");
 
diff -r 48052c25abfd -r 7be7906a406e xen/drivers/passthrough/amd/iommu_map.c
--- a/xen/drivers/passthrough/amd/iommu_map.c	Thu Mar 24 16:34:29 2011 +0100
+++ b/xen/drivers/passthrough/amd/iommu_map.c	Thu Mar 24 16:41:40 2011 +0100
@@ -723,13 +723,22 @@
     mfn_t pgd_mfn;
 
     ASSERT( is_hvm_domain(d) && d->arch.hvm_domain.hap_enabled );
+    
+    if ( !iommu_sharept )
+    {
+        iommu_hap_pt_share = 0;
+        return;
+    }
 
     if ( hd->root_table != NULL )
         free_amd_iommu_pgtable(hd->root_table);
 
     pgd_mfn = pagetable_get_mfn(p2m_get_pagetable(p2m_get_hostp2m(d)));
     hd->root_table = mfn_to_page(mfn_x(pgd_mfn));
-
+    
+    /* To use p2m table, force paging mode = 4 */
+    hd->paging_mode = IOMMU_PAGING_MODE_LEVEL_4;
+    
     iommu_hap_pt_share = 1;
     AMD_IOMMU_DEBUG("Share p2m table with iommu: p2m table = 0x%lx\n",
                     mfn_x(pgd_mfn));
diff -r 48052c25abfd -r 7be7906a406e xen/drivers/passthrough/amd/pci_amd_iommu.c
--- a/xen/drivers/passthrough/amd/pci_amd_iommu.c	Thu Mar 24 16:34:29 2011 +0100
+++ b/xen/drivers/passthrough/amd/pci_amd_iommu.c	Thu Mar 24 16:41:40 2011 +0100
@@ -458,4 +458,5 @@
     .read_msi_from_ire = amd_iommu_read_msi_from_ire,
     .suspend = amd_iommu_suspend,
     .resume = amd_iommu_resume,
+    .share_p2m = amd_iommu_set_p2m_table,
 };
diff -r 48052c25abfd -r 7be7906a406e xen/drivers/passthrough/iommu.c
--- a/xen/drivers/passthrough/iommu.c	Thu Mar 24 16:34:29 2011 +0100
+++ b/xen/drivers/passthrough/iommu.c	Thu Mar 24 16:41:40 2011 +0100
@@ -50,6 +50,7 @@
 bool_t __read_mostly iommu_hap_pt_share;
 bool_t __read_mostly amd_iommu_debug;
 bool_t __read_mostly amd_iommu_perdev_intremap;
+bool_t __read_mostly iommu_sharept;
 
 static void __init parse_iommu_param(char *s)
 {
@@ -82,6 +83,8 @@
             iommu_passthrough = 1;
         else if ( !strcmp(s, "dom0-strict") )
             iommu_dom0_strict = 1;
+        else if ( !strcmp(s, "sharept") )
+            iommu_sharept = 1;
 
         s = ss + 1;
     } while ( ss );
@@ -419,6 +422,14 @@
         ops->suspend();
 }
 
+void iommu_share_p2m_table(struct domain* d)
+{
+    const struct iommu_ops *ops = iommu_get_ops();
+
+    if ( hap_enabled(d) && iommu_enabled && is_hvm_domain(d) )
+        ops->share_p2m(d);        
+}
+
 /*
  * Local variables:
  * mode: C
diff -r 48052c25abfd -r 7be7906a406e xen/drivers/passthrough/vtd/iommu.c
--- a/xen/drivers/passthrough/vtd/iommu.c	Thu Mar 24 16:34:29 2011 +0100
+++ b/xen/drivers/passthrough/vtd/iommu.c	Thu Mar 24 16:41:40 2011 +0100
@@ -45,9 +45,6 @@
 #define nr_ioapics              iosapic_get_nr_iosapics()
 #endif
 
-static int sharept = 0;
-boolean_param("sharept", sharept);
-
 int nr_iommus;
 
 static void setup_dom0_devices(struct domain *d);
@@ -1747,7 +1744,7 @@
     bool_t share = TRUE;
 
     /* sharept defaults to 0 for now, default to 1 when feature matures */
-    if ( !sharept )
+    if ( !iommu_sharept )
         share = FALSE;
 
     /*
@@ -2300,6 +2297,7 @@
     .read_msi_from_ire = msi_msg_read_remap_rte,
     .suspend = vtd_suspend,
     .resume = vtd_resume,
+    .share_p2m = iommu_set_pgd,
 };
 
 /*
diff -r 48052c25abfd -r 7be7906a406e xen/include/xen/iommu.h
--- a/xen/include/xen/iommu.h	Thu Mar 24 16:34:29 2011 +0100
+++ b/xen/include/xen/iommu.h	Thu Mar 24 16:41:40 2011 +0100
@@ -33,6 +33,7 @@
 extern bool_t iommu_hap_pt_share;
 extern bool_t amd_iommu_debug;
 extern bool_t amd_iommu_perdev_intremap;
+extern bool_t iommu_sharept;
 
 extern struct rangeset *mmio_ro_ranges;
 
@@ -133,6 +134,7 @@
     unsigned int (*read_apic_from_ire)(unsigned int apic, unsigned int reg);
     void (*suspend)(void);
     void (*resume)(void);
+    void (*share_p2m)(struct domain *d);
 };
 
 void iommu_update_ire_from_apic(unsigned int apic, unsigned int reg, unsigned int value);
@@ -144,5 +146,6 @@
 void iommu_resume(void);
 
 void iommu_set_dom0_mapping(struct domain *d);
+void iommu_share_p2m_table(struct domain *d);
 
 #endif /* _IOMMU_H_ */

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