2.6.38.2 breaks suspend to disk

2.6.38.2 breaks suspend to disk

[Michael Leun]

Hi,

suspend to disk works with 2.6.38.1 but does not with 2.6.38.2 on my
acer 1825ptz. Machine freezes after resume.

git bisect yields:

ml@jill:/usr/src/kernel/b/linux-2.6.38.y> git bisect bad
ff518ea26654e05d325d996f6e3a7f5f569cc2d5 is the first bad commit
commit ff518ea26654e05d325d996f6e3a7f5f569cc2d5
Author: Yinghai Lu <yinghai@kernel.org>
Date:   Fri Feb 18 11:30:30 2011 +0000

    x86: Cleanup highmap after brk is concluded
    
    commit e5f15b45ddf3afa2bbbb10c7ea34fb32b6de0a0e upstream.
    
    Now cleanup_highmap actually is in two steps: one is early in head64.c
    and only clears above _end; a second one is in init_memory_mapping() and
    tries to clean from _brk_end to _end.
    It should check if those boundaries are PMD_SIZE aligned but currently
    does not.
    Also init_memory_mapping() is called several times for numa or memory
    hotplug, so we really should not handle initial kernel mappings there.
    
    This patch moves cleanup_highmap() down after _brk_end is settled so
    we can do everything in one step.
    Also we honor max_pfn_mapped in the implementation of cleanup_highmap.
    
    Signed-off-by: Yinghai Lu <yinghai@kernel.org>
    Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
    LKML-Reference: <alpine.DEB.2.00.1103171739050.3382@kaball-desktop>
    Signed-off-by: H. Peter Anvin <hpa@zytor.com>
    Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>                                                                                                                                          
                                                                                                                                                                                                
:040000 040000 b5ed0c2971ba1162c7cd289dd351d1700eb52fbc 8f830fdb43fa30ddebb485e6f6455d669300874b M      arch

jill:/home/ml # lspci -vvv
00:00.0 Host bridge: Intel Corporation Mobile 4 Series Chipset Memory Controller Hub (rev 07)                                                                                                   
        Subsystem: Acer Incorporated [ALI] Device 0300                                                                                                                                          
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-                                                                                   
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx-                                                                                    
        Latency: 0                                                                                                                                                                              
        Capabilities: [e0] Vendor Specific Information: Len=0a <?>                                                                                                                              
        Kernel driver in use: agpgart-intel                                                                                                                                                     
                                                                                                                                                                                                
00:02.0 VGA compatible controller: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller (rev 07) (prog-if 00 [VGA controller])                                              
        Subsystem: Acer Incorporated [ALI] Device 0300                                                                                                                                          
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+                                                                                   
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-                                                                                    
        Latency: 0                                                                                                                                                                              
        Interrupt: pin A routed to IRQ 43                                                                                                                                                       
        Region 0: Memory at d0000000 (64-bit, non-prefetchable) [size=4M]                                                                                                                       
        Region 2: Memory at c0000000 (64-bit, prefetchable) [size=256M]                                                                                                                         
        Region 4: I/O ports at 30f0 [size=8]                                                                                                                                                    
        Expansion ROM at <unassigned> [disabled]                                                                                                                                                
        Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit-                                                                                                                              
                Address: fee0300c  Data: 4181                                                                                                                                                   
        Capabilities: [d0] Power Management version 3                                                                                                                                           
                Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)                                                                                                      
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        Kernel driver in use: i915

00:02.1 Display controller: Intel Corporation Mobile 4 Series Chipset Integrated Graphics Controller (rev 07)
        Subsystem: Acer Incorporated [ALI] Device 0300
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Region 0: Memory at d2400000 (64-bit, non-prefetchable) [size=1M]
        Capabilities: [d0] Power Management version 3
                Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-

00:1a.0 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #4 (rev 03) (prog-if 00 [UHCI])
        Subsystem: Acer Incorporated [ALI] Device 0300
        Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin A routed to IRQ 16
        Region 4: I/O ports at 30c0 [size=32]
        Capabilities: [50] PCI Advanced Features
                AFCap: TP+ FLR+
                AFCtrl: FLR-
                AFStatus: TP-
        Kernel driver in use: uhci_hcd

00:1a.1 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #5 (rev 03) (prog-if 00 [UHCI])
        Subsystem: Acer Incorporated [ALI] Device 0300
        Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin B routed to IRQ 21
        Region 4: I/O ports at 30a0 [size=32]
        Capabilities: [50] PCI Advanced Features
                AFCap: TP+ FLR+
                AFCtrl: FLR-
                AFStatus: TP-
        Kernel driver in use: uhci_hcd

00:1a.7 USB Controller: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #2 (rev 03) (prog-if 20 [EHCI])
        Subsystem: Acer Incorporated [ALI] Device 0300
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin D routed to IRQ 19
        Region 0: Memory at d4504c00 (32-bit, non-prefetchable) [size=1K]
        Capabilities: [50] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [58] Debug port: BAR=1 offset=00a0
        Capabilities: [98] PCI Advanced Features
                AFCap: TP+ FLR+
                AFCtrl: FLR-
                AFStatus: TP-
        Kernel driver in use: ehci_hcd

00:1b.0 Audio device: Intel Corporation 82801I (ICH9 Family) HD Audio Controller (rev 03)
        Subsystem: Acer Incorporated [ALI] Device 0300
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 64 bytes
        Interrupt: pin A routed to IRQ 44
        Region 0: Memory at d4500000 (64-bit, non-prefetchable) [size=16K]
        Capabilities: [50] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+
                Address: 00000000fee0300c  Data: 4199
        Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, MSI 00
                DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
                        ExtTag- RBE- FLReset+
                DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
                        RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
                        MaxPayload 128 bytes, MaxReadReq 128 bytes
                DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
                LnkCap: Port #0, Speed unknown, Width x0, ASPM unknown, Latency L0 <64ns, L1 <1us
                        ClockPM- Surprise- LLActRep- BwNot-
                LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk-
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed unknown, Width x0, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
        Capabilities: [100 v1] Virtual Channel
                Caps:   LPEVC=0 RefClk=100ns PATEntryBits=1
                Arb:    Fixed- WRR32- WRR64- WRR128-
                Ctrl:   ArbSelect=Fixed
                Status: InProgress-
                VC0:    Caps:   PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
                        Arb:    Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
                        Ctrl:   Enable+ ID=0 ArbSelect=Fixed TC/VC=7f
                        Status: NegoPending- InProgress-
                VC1:    Caps:   PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
                        Arb:    Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
                        Ctrl:   Enable+ ID=1 ArbSelect=Fixed TC/VC=80
                        Status: NegoPending- InProgress-
        Capabilities: [130 v1] Root Complex Link
                Desc:   PortNumber=0f ComponentID=02 EltType=Config
                Link0:  Desc:   TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+
                        Addr:   00000000fed1c000
        Kernel driver in use: HDA Intel

00:1c.0 PCI bridge: Intel Corporation 82801I (ICH9 Family) PCI Express Port 1 (rev 03) (prog-if 00 [Normal decode])
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 64 bytes
        Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
        I/O behind bridge: 00002000-00002fff
        Memory behind bridge: d3500000-d44fffff
        Prefetchable memory behind bridge: 00000000d0400000-00000000d13fffff
        Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
        BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
                PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
        Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
                DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
                        ExtTag- RBE+ FLReset-
                DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
                        RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
                        MaxPayload 128 bytes, MaxReadReq 128 bytes
                DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
                LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
                        ClockPM- Surprise- LLActRep+ BwNot-
                LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
                SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+
                        Slot #0, PowerLimit 6.500W; Interlock- NoCompl-
                SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
                        Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
                SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
                        Changed: MRL- PresDet+ LinkState+
                RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
                RootCap: CRSVisible-
                RootSta: PME ReqID 0000, PMEStatus- PMEPending-
        Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-
                Address: fee0300c  Data: 4151
        Capabilities: [90] Subsystem: Acer Incorporated [ALI] Device 0300
        Capabilities: [a0] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [100 v1] Virtual Channel
                Caps:   LPEVC=0 RefClk=100ns PATEntryBits=1
                Arb:    Fixed+ WRR32- WRR64- WRR128-
                Ctrl:   ArbSelect=Fixed
                Status: InProgress-
                VC0:    Caps:   PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
                        Arb:    Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
                        Ctrl:   Enable+ ID=0 ArbSelect=Fixed TC/VC=01
                        Status: NegoPending- InProgress-
        Capabilities: [180 v1] Root Complex Link
                Desc:   PortNumber=01 ComponentID=02 EltType=Config
                Link0:  Desc:   TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+
                        Addr:   00000000fed1c000
        Kernel driver in use: pcieport

00:1c.3 PCI bridge: Intel Corporation 82801I (ICH9 Family) PCI Express Port 4 (rev 03) (prog-if 00 [Normal decode])
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 64 bytes
        Bus: primary=00, secondary=02, subordinate=02, sec-latency=0
        I/O behind bridge: 00001000-00001fff
        Memory behind bridge: d2500000-d34fffff
        Prefetchable memory behind bridge: 00000000d1400000-00000000d23fffff
        Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
        BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
                PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
        Capabilities: [40] Express (v1) Root Port (Slot+), MSI 00
                DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
                        ExtTag- RBE+ FLReset-
                DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
                        RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
                        MaxPayload 128 bytes, MaxReadReq 128 bytes
                DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
                LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <256ns, L1 <4us
                        ClockPM- Surprise- LLActRep+ BwNot-
                LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
                SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ Surprise+
                        Slot #3, PowerLimit 6.500W; Interlock- NoCompl-
                SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- LinkChg-
                        Control: AttnInd Unknown, PwrInd Unknown, Power- Interlock-
                SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock-
                        Changed: MRL- PresDet+ LinkState+
                RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
                RootCap: CRSVisible-
                RootSta: PME ReqID 0000, PMEStatus- PMEPending-
        Capabilities: [80] MSI: Enable+ Count=1/1 Maskable- 64bit-
                Address: fee0300c  Data: 4159
        Capabilities: [90] Subsystem: Acer Incorporated [ALI] Device 0300
        Capabilities: [a0] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [100 v1] Virtual Channel
                Caps:   LPEVC=0 RefClk=100ns PATEntryBits=1
                Arb:    Fixed+ WRR32- WRR64- WRR128-
                Ctrl:   ArbSelect=Fixed
                Status: InProgress-
                VC0:    Caps:   PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
                        Arb:    Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
                        Ctrl:   Enable+ ID=0 ArbSelect=Fixed TC/VC=01
                        Status: NegoPending- InProgress-
        Capabilities: [180 v1] Root Complex Link
                Desc:   PortNumber=04 ComponentID=02 EltType=Config
                Link0:  Desc:   TargetPort=00 TargetComponent=02 AssocRCRB- LinkType=MemMapped LinkValid+
                        Addr:   00000000fed1c000
        Kernel driver in use: pcieport

00:1d.0 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #1 (rev 03) (prog-if 00 [UHCI])
        Subsystem: Acer Incorporated [ALI] Device 0300
        Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin A routed to IRQ 23
        Region 4: I/O ports at 3080 [size=32]
        Capabilities: [50] PCI Advanced Features
                AFCap: TP+ FLR+
                AFCtrl: FLR-
                AFStatus: TP-
        Kernel driver in use: uhci_hcd

00:1d.1 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #2 (rev 03) (prog-if 00 [UHCI])
        Subsystem: Acer Incorporated [ALI] Device 0300
        Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin B routed to IRQ 19
        Region 4: I/O ports at 3060 [size=32]
        Capabilities: [50] PCI Advanced Features
                AFCap: TP+ FLR+
                AFCtrl: FLR-
                AFStatus: TP-
        Kernel driver in use: uhci_hcd

00:1d.2 USB Controller: Intel Corporation 82801I (ICH9 Family) USB UHCI Controller #3 (rev 03) (prog-if 00 [UHCI])
        Subsystem: Acer Incorporated [ALI] Device 0300
        Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin D routed to IRQ 16
        Region 4: I/O ports at 3040 [size=32]
        Capabilities: [50] PCI Advanced Features
                AFCap: TP+ FLR+
                AFCtrl: FLR-
                AFStatus: TP-
        Kernel driver in use: uhci_hcd

00:1d.7 USB Controller: Intel Corporation 82801I (ICH9 Family) USB2 EHCI Controller #1 (rev 03) (prog-if 20 [EHCI])
        Subsystem: Acer Incorporated [ALI] Device 0300
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin A routed to IRQ 23
        Region 0: Memory at d4504800 (32-bit, non-prefetchable) [size=1K]
        Capabilities: [50] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [58] Debug port: BAR=1 offset=00a0
        Capabilities: [98] PCI Advanced Features
                AFCap: TP+ FLR+
                AFCtrl: FLR-
                AFStatus: TP-
        Kernel driver in use: ehci_hcd

00:1e.0 PCI bridge: Intel Corporation 82801 Mobile PCI Bridge (rev 93) (prog-if 01 [Subtractive decode])
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Bus: primary=00, secondary=03, subordinate=03, sec-latency=32
        I/O behind bridge: 0000f000-00000fff
        Memory behind bridge: fff00000-000fffff
        Prefetchable memory behind bridge: 00000000fff00000-00000000000fffff
        Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR-
        BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
                PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
        Capabilities: [50] Subsystem: Acer Incorporated [ALI] Device 0300

00:1f.0 ISA bridge: Intel Corporation ICH9M-E LPC Interface Controller (rev 03)
        Subsystem: Acer Incorporated [ALI] Device 0300
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Capabilities: [e0] Vendor Specific Information: Len=0c <?>

00:1f.2 SATA controller: Intel Corporation ICH9M/M-E SATA AHCI Controller (rev 03) (prog-if 01 [AHCI 1.0])
        Subsystem: Acer Incorporated [ALI] Device 0300
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin B routed to IRQ 42
        Region 0: I/O ports at 30e8 [size=8]
        Region 1: I/O ports at 30fc [size=4]
        Region 2: I/O ports at 30e0 [size=8]
        Region 3: I/O ports at 30f8 [size=4]
        Region 4: I/O ports at 3020 [size=32]
        Region 5: Memory at d4504000 (32-bit, non-prefetchable) [size=2K]
        Capabilities: [80] MSI: Enable+ Count=1/16 Maskable- 64bit-
                Address: fee0300c  Data: 4161
        Capabilities: [70] Power Management version 3
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [a8] SATA HBA v1.0 BAR4 Offset=00000004
        Capabilities: [b0] PCI Advanced Features
                AFCap: TP+ FLR+
                AFCtrl: FLR-
                AFStatus: TP-
        Kernel driver in use: ahci

00:1f.3 SMBus: Intel Corporation 82801I (ICH9 Family) SMBus Controller (rev 03)
        Subsystem: Acer Incorporated [ALI] Device 0300
        Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Interrupt: pin C routed to IRQ 18
        Region 0: Memory at d4505000 (64-bit, non-prefetchable) [size=256]
        Region 4: I/O ports at 3000 [size=32]
        Kernel driver in use: i801_smbus

01:00.0 Ethernet controller: Atheros Communications AR8131 Gigabit Ethernet (rev c0)
        Subsystem: Acer Incorporated [ALI] Device 0300
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 64 bytes
        Interrupt: pin A routed to IRQ 16
        Region 0: Memory at d3500000 (64-bit, non-prefetchable) [size=256K]
        Region 2: I/O ports at 2000 [size=128]
        Capabilities: [40] Power Management version 3
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [48] MSI: Enable- Count=1/1 Maskable- 64bit+
                Address: 0000000000000000  Data: 0000
        Capabilities: [58] Express (v1) Endpoint, MSI 00
                DevCap: MaxPayload 4096 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
                        ExtTag- AttnBtn+ AttnInd+ PwrInd+ RBE+ FLReset-
                DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
                        RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
                        MaxPayload 128 bytes, MaxReadReq 512 bytes
                DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr+ TransPend-
                LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 unlimited, L1 unlimited
                        ClockPM+ Surprise- LLActRep- BwNot-
                LnkCtl: ASPM L1 Enabled; RCB 64 bytes Disabled- Retrain- CommClk+
                        ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
        Capabilities: [6c] Vital Product Data
pcilib: sysfs_read_vpd: read failed: Connection timed out
                Not readable
        Capabilities: [100 v1] Advanced Error Reporting
                UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol-
                UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
                UESvrt: DLP- SDES+ TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
                CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
                CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
                AERCap: First Error Pointer: 14, GenCap+ CGenEn- ChkCap+ ChkEn-
        Capabilities: [180 v1] Device Serial Number ff-6b-f6-f6-c8-0a-a9-ff
        Kernel driver in use: atl1c

02:00.0 Network controller: Intel Corporation Centrino Wireless-N 1000
        Subsystem: Intel Corporation Centrino Wireless-N 1000 BGN
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 64 bytes
        Interrupt: pin A routed to IRQ 45
        Region 0: Memory at d2500000 (64-bit, non-prefetchable) [size=8K]
        Capabilities: [c8] Power Management version 3
                Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+
                Address: 00000000fee0100c  Data: 41a1
        Capabilities: [e0] Express (v1) Endpoint, MSI 00
                DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 unlimited
                        ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset+
                DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
                        RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ FLReset-
                        MaxPayload 128 bytes, MaxReadReq 128 bytes
                DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr+ TransPend-
                LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <128ns, L1 <32us
                        ClockPM+ Surprise- LLActRep- BwNot-
                LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
        Capabilities: [100 v1] Advanced Error Reporting
                UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
                UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
                UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
                CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
                CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
                AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
        Capabilities: [140 v1] Device Serial Number 00-1e-64-ff-ff-5b-aa-08
        Kernel driver in use: iwlagn

jill:/home/ml #

-- 
MfG,

Michael Leun

Re: 2.6.38.2 breaks suspend to disk

[Yinghai Lu]

On 03/30/2011 11:32 AM, Michael Leun wrote:
> Hi,
>
> suspend to disk works with 2.6.38.1 but does not with 2.6.38.2 on my
> acer 1825ptz. Machine freezes after resume.
>
> git bisect yields:
>
> ml@jill:/usr/src/kernel/b/linux-2.6.38.y>  git bisect bad
> ff518ea26654e05d325d996f6e3a7f5f569cc2d5 is the first bad commit
> commit ff518ea26654e05d325d996f6e3a7f5f569cc2d5
> Author: Yinghai Lu<yinghai@kernel.org>
> Date:   Fri Feb 18 11:30:30 2011 +0000
>
>      x86: Cleanup highmap after brk is concluded
>
>      commit e5f15b45ddf3afa2bbbb10c7ea34fb32b6de0a0e upstream.
>
>      Now cleanup_highmap actually is in two steps: one is early in head64.c
>      and only clears above _end; a second one is in init_memory_mapping() and
>      tries to clean from _brk_end to _end.
>      It should check if those boundaries are PMD_SIZE aligned but currently
>      does not.
>      Also init_memory_mapping() is called several times for numa or memory
>      hotplug, so we really should not handle initial kernel mappings there.
>
>      This patch moves cleanup_highmap() down after _brk_end is settled so
>      we can do everything in one step.
>      Also we honor max_pfn_mapped in the implementation of cleanup_highmap.
>
>      Signed-off-by: Yinghai Lu<yinghai@kernel.org>
>      Signed-off-by: Stefano Stabellini<stefano.stabellini@eu.citrix.com>
>      LKML-Reference:<alpine.DEB.2.00.1103171739050.3382@kaball-desktop>
>      Signed-off-by: H. Peter Anvin<hpa@zytor.com>
>      Signed-off-by: Greg Kroah-Hartman<gregkh@suse.de>
>
> :040000 040000 b5ed0c2971ba1162c7cd289dd351d1700eb52fbc 8f830fdb43fa30ddebb485e6f6455d669300874b M      arch
>

can you please try following partial reverting patch?

diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 7942335..07688d1 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -302,11 +302,11 @@ void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
  void __init cleanup_highmap(void)
  {
  	unsigned long vaddr = __START_KERNEL_map;
-	unsigned long vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT);
  	unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
  	pmd_t *pmd = level2_kernel_pgt;
+	pmd_t *last_pmd = pmd + PTRS_PER_PMD;
  
-	for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) {
+	for (; pmd < last_pmd; pmd++, vaddr += PMD_SIZE) {
  		if (pmd_none(*pmd))
  			continue;
  		if (vaddr < (unsigned long) _text || vaddr > end)

Re: 2.6.38.2 breaks suspend to disk

[Michael Leun]

On Wed, 30 Mar 2011 22:14:56 -0700
Yinghai Lu <yinghai@kernel.org> wrote:

> On 03/30/2011 11:32 AM, Michael Leun wrote:
> > Hi,
> >
> > suspend to disk works with 2.6.38.1 but does not with 2.6.38.2 on my
> > acer 1825ptz. Machine freezes after resume.
> >
> > git bisect yields:
> >
> > ml@jill:/usr/src/kernel/b/linux-2.6.38.y>  git bisect bad
> > ff518ea26654e05d325d996f6e3a7f5f569cc2d5 is the first bad commit
> > commit ff518ea26654e05d325d996f6e3a7f5f569cc2d5
> > Author: Yinghai Lu<yinghai@kernel.org>
> > Date:   Fri Feb 18 11:30:30 2011 +0000
> >
> >      x86: Cleanup highmap after brk is concluded
> >
> >      commit e5f15b45ddf3afa2bbbb10c7ea34fb32b6de0a0e upstream.
> >
> >      Now cleanup_highmap actually is in two steps: one is early in
> > head64.c and only clears above _end; a second one is in
> > init_memory_mapping() and tries to clean from _brk_end to _end.
> >      It should check if those boundaries are PMD_SIZE aligned but
> > currently does not.
> >      Also init_memory_mapping() is called several times for numa or
> > memory hotplug, so we really should not handle initial kernel
> > mappings there.
> >
> >      This patch moves cleanup_highmap() down after _brk_end is
> > settled so we can do everything in one step.
> >      Also we honor max_pfn_mapped in the implementation of
> > cleanup_highmap.
> >
> >      Signed-off-by: Yinghai Lu<yinghai@kernel.org>
> >      Signed-off-by: Stefano
> > Stabellini<stefano.stabellini@eu.citrix.com>
> > LKML-Reference:<alpine.DEB.2.00.1103171739050.3382@kaball-desktop>
> > Signed-off-by: H. Peter Anvin<hpa@zytor.com> Signed-off-by: Greg
> > Kroah-Hartman<gregkh@suse.de>
> >
> > :040000 040000 b5ed0c2971ba1162c7cd289dd351d1700eb52fbc
> > 8f830fdb43fa30ddebb485e6f6455d669300874b M      arch
> >
> 
> can you please try following partial reverting patch?
> 
> diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
> index 7942335..07688d1 100644
> --- a/arch/x86/mm/init_64.c
> +++ b/arch/x86/mm/init_64.c
> @@ -302,11 +302,11 @@ void __init init_extra_mapping_uc(unsigned long
> phys, unsigned long size) void __init cleanup_highmap(void)
>   {
>   	unsigned long vaddr = __START_KERNEL_map;
> -	unsigned long vaddr_end = __START_KERNEL_map +
> (max_pfn_mapped << PAGE_SHIFT); unsigned long end = roundup((unsigned
> long)_brk_end, PMD_SIZE) - 1; pmd_t *pmd = level2_kernel_pgt;
> +	pmd_t *last_pmd = pmd + PTRS_PER_PMD;
>   
> -	for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr +=
> PMD_SIZE) {
> +	for (; pmd < last_pmd; pmd++, vaddr += PMD_SIZE) {
>   		if (pmd_none(*pmd))
>   			continue;
>   		if (vaddr < (unsigned long) _text || vaddr > end)
> 

Nope, unfortunately this does not change anything (neither when
applying ontop of the tree resulting from bisecting, nor ontop
2.6.38.2).

Just to make shure there was no mistake when bisecting I did

patch -R -p1 <~/linux-2.6.38.y.git-ff518ea26654e05d325d996f6e3a7f5f569cc2d5.txt

and then indeed it worked again.

-- 
MfG,

Michael Leun

Re: 2.6.38.2 breaks suspend to disk

[Stefano Stabellini]

On Thu, 31 Mar 2011, Michael Leun wrote:
> Nope, unfortunately this does not change anything (neither when
> applying ontop of the tree resulting from bisecting, nor ontop
> 2.6.38.2).
> 
> Just to make shure there was no mistake when bisecting I did
> 
> patch -R -p1 <~/linux-2.6.38.y.git-ff518ea26654e05d325d996f6e3a7f5f569cc2d5.txt
> 
> and then indeed it worked again.

This patch fixes it for me.


---

save cr4 to mmu_cr4_features at boot time

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 5a0484a..0943eb2 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -891,6 +891,7 @@ void __init setup_arch(char **cmdline_p)
 		max_low_pfn = max_pfn;
 
 	high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
+	mmu_cr4_features = read_cr4();
 #endif
 
 	/*

Re: 2.6.38.2 breaks suspend to disk

[Michael Leun]

On Thu, 31 Mar 2011 15:48:44 +0100
Stefano Stabellini <stefano.stabellini@eu.citrix.com> wrote:

> On Thu, 31 Mar 2011, Michael Leun wrote:
> > Nope, unfortunately this does not change anything (neither when
> > applying ontop of the tree resulting from bisecting, nor ontop
> > 2.6.38.2).
> > 
> > Just to make shure there was no mistake when bisecting I did
> > 
> > patch -R -p1
> > <~/linux-2.6.38.y.git-ff518ea26654e05d325d996f6e3a7f5f569cc2d5.txt
> > 
> > and then indeed it worked again.
> 
> This patch fixes it for me.
> 
> 
> ---
> 
> save cr4 to mmu_cr4_features at boot time
> 
> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
> 
> diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
> index 5a0484a..0943eb2 100644
> --- a/arch/x86/kernel/setup.c
> +++ b/arch/x86/kernel/setup.c
> @@ -891,6 +891,7 @@ void __init setup_arch(char **cmdline_p)
>  		max_low_pfn = max_pfn;
>  
>  	high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
> +	mmu_cr4_features = read_cr4();
>  #endif
>  
>  	/*
> 

Confirmed - fixes it for me too. Thanks.

-- 
MfG,

Michael Leun

Re: 2.6.38.2 breaks suspend to disk

[Rafael J. Wysocki]

On Thursday, March 31, 2011, Stefano Stabellini wrote:
> On Thu, 31 Mar 2011, Michael Leun wrote:
> > Nope, unfortunately this does not change anything (neither when
> > applying ontop of the tree resulting from bisecting, nor ontop
> > 2.6.38.2).
> > 
> > Just to make shure there was no mistake when bisecting I did
> > 
> > patch -R -p1 <~/linux-2.6.38.y.git-ff518ea26654e05d325d996f6e3a7f5f569cc2d5.txt
> > 
> > and then indeed it worked again.
> 
> This patch fixes it for me.
> 
> 
> ---
> 
> save cr4 to mmu_cr4_features at boot time
> 
> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>

Acked-by: Rafael J. Wysocki <rjw@sisk.pl>

Peter, Ingo, please regard this as urgent, it breaks -stable.

Thanks,
Rafael


> diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
> index 5a0484a..0943eb2 100644
> --- a/arch/x86/kernel/setup.c
> +++ b/arch/x86/kernel/setup.c
> @@ -891,6 +891,7 @@ void __init setup_arch(char **cmdline_p)
>  		max_low_pfn = max_pfn;
>  
>  	high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
> +	mmu_cr4_features = read_cr4();
>  #endif
>  
>  	/*
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at  http://www.tux.org/lkml/
> 
> 

Re: 2.6.38.2 breaks suspend to disk

[Yinghai Lu]

On 03/31/2011 02:48 PM, Rafael J. Wysocki wrote:
> On Thursday, March 31, 2011, Stefano Stabellini wrote:
>> On Thu, 31 Mar 2011, Michael Leun wrote:
>>> Nope, unfortunately this does not change anything (neither when
>>> applying ontop of the tree resulting from bisecting, nor ontop
>>> 2.6.38.2).
>>>
>>> Just to make shure there was no mistake when bisecting I did
>>>
>>> patch -R -p1<~/linux-2.6.38.y.git-ff518ea26654e05d325d996f6e3a7f5f569cc2d5.txt
>>>
>>> and then indeed it worked again.
>>
>> This patch fixes it for me.
>>
>>
>> ---
>>
>> save cr4 to mmu_cr4_features at boot time
>>
>> Signed-off-by: Stefano Stabellini<stefano.stabellini@eu.citrix.com>
>
> Acked-by: Rafael J. Wysocki<rjw@sisk.pl>
>
> Peter, Ingo, please regard this as urgent, it breaks -stable.
>
> Thanks,
> Rafael
>
>
>> diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
>> index 5a0484a..0943eb2 100644
>> --- a/arch/x86/kernel/setup.c
>> +++ b/arch/x86/kernel/setup.c
>> @@ -891,6 +891,7 @@ void __init setup_arch(char **cmdline_p)
>>   		max_low_pfn = max_pfn;
>>
>>   	high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
>> +	mmu_cr4_features = read_cr4();
>>   #endif
>>
>>   	/*

Stefano, can you explain why it fixes the problem?

or original patch uncover the bug?

Thanks

Yinghai

Re: 2.6.38.2 breaks suspend to disk

[Stefano Stabellini]

On Thu, 31 Mar 2011, Yinghai Lu wrote:
> Stefano, can you explain why it fixes the problem?
> 
> or original patch uncover the bug?

as I wrote in the other email, e5f15b45ddf3afa2bbbb10c7ea34fb32b6de0a0e
removes cleanup_highmap_brk_end but this function was not only dealing
with mappings but it was also setting mmu_cr4_features, therefore the
setting of mmu_cr4_features was lost.

I think the real bug is that mmu_cr4_features ended up in
cleanup_highmap_brk_end by mistake.

Re: 2.6.38.2 breaks suspend to disk

[Yinghai Lu]

On 04/01/2011 04:32 AM, Stefano Stabellini wrote:
> On Thu, 31 Mar 2011, Yinghai Lu wrote:
>> Stefano, can you explain why it fixes the problem?
>>
>> or original patch uncover the bug?
>
> as I wrote in the other email, e5f15b45ddf3afa2bbbb10c7ea34fb32b6de0a0e
> removes cleanup_highmap_brk_end but this function was not only dealing
> with mappings but it was also setting mmu_cr4_features, therefore the
> setting of mmu_cr4_features was lost.
>
> I think the real bug is that mmu_cr4_features ended up in
> cleanup_highmap_brk_end by mistake.


originally mmu_cr4 is saved in init_memory_mapping.

and init_memory_mapping will update cr4.

so please use this version instead.


From: Stefano Stabellini <stefano.stabellini@eu.citrix.com>

[PATCH -v2] x86: Save cr4 to mmu_cr4_features at boot time

Save cr4 to mmu_cr4_features at boot time

Michael reported 2.6.38.2 hibernation is broken by one backported patch.
it cause a freeze when resuming from hibernation

| "x86: Cleanup highmap after brk is concluded"
| commit id e5f15b45ddf3afa2bbbb10c7ea34fb32b6de0a0e.

it turns out the mmu_cr4 save it lost somehow.

-v2: need to save mmu_cr4 after init_memory_mapping(), because it updates mmu_cr4
      and originally that storing action is after updating.  -- by Yinghai

Bisected-and-tested-by: Michael Leun <lkml20101129@newton.leun.net>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
  arch/x86/kernel/setup.c |    9 +++++++++
  1 file changed, 9 insertions(+)

Index: linux-2.6/arch/x86/kernel/setup.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/setup.c
+++ linux-2.6/arch/x86/kernel/setup.c
@@ -294,10 +294,17 @@ static void __init init_gbpages(void)
  	else
  		direct_gbpages = 0;
  }
+static void __init store_mmu_cr4(void)
+{
+	mmu_cr4_features = read_cr4();
+}
  #else
  static inline void init_gbpages(void)
  {
  }
+static void __init store_mmu_cr4(void)
+{
+}
  static void __init cleanup_highmap(void)
  {
  }
@@ -929,6 +936,8 @@ void __init setup_arch(char **cmdline_p)
  	/* max_pfn_mapped is updated here */
  	max_low_pfn_mapped = init_memory_mapping(0, max_low_pfn<<PAGE_SHIFT);
  	max_pfn_mapped = max_low_pfn_mapped;
+	/* after init_memory_mapping updating cr4*/
+	store_mmu_cr4();
  
  #ifdef CONFIG_X86_64
  	if (max_pfn > max_low_pfn) {

Re: 2.6.38.2 breaks suspend to disk

[H. Peter Anvin]

On 04/01/2011 09:06 AM, Yinghai Lu wrote:
> Index: linux-2.6/arch/x86/kernel/setup.c
> ===================================================================
> --- linux-2.6.orig/arch/x86/kernel/setup.c
> +++ linux-2.6/arch/x86/kernel/setup.c
> @@ -294,10 +294,17 @@ static void __init init_gbpages(void)
>      else
>          direct_gbpages = 0;
>  }
> +static void __init store_mmu_cr4(void)
> +{
> +    mmu_cr4_features = read_cr4();
> +}
>  #else
>  static inline void init_gbpages(void)
>  {
>  }
> +static void __init store_mmu_cr4(void)
> +{
> +}
>  static void __init cleanup_highmap(void)
>  {
>  }
> @@ -929,6 +936,8 @@ void __init setup_arch(char **cmdline_p)
>      /* max_pfn_mapped is updated here */
>      max_low_pfn_mapped = init_memory_mapping(0, max_low_pfn<<PAGE_SHIFT);
>      max_pfn_mapped = max_low_pfn_mapped;
> +    /* after init_memory_mapping updating cr4*/
> +    store_mmu_cr4();
>  
>  #ifdef CONFIG_X86_64
>      if (max_pfn > max_low_pfn) {

This looks really, really, really wrong.

Why the heck should we save and restore CR4 only for x86-64?

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

Re: 2.6.38.2 breaks suspend to disk

[Yinghai Lu]

On 04/01/2011 09:22 AM, H. Peter Anvin wrote:
> On 04/01/2011 09:06 AM, Yinghai Lu wrote:
>> Index: linux-2.6/arch/x86/kernel/setup.c
>> ===================================================================
>> --- linux-2.6.orig/arch/x86/kernel/setup.c
>> +++ linux-2.6/arch/x86/kernel/setup.c
>> @@ -294,10 +294,17 @@ static void __init init_gbpages(void)
>>       else
>>           direct_gbpages = 0;
>>   }
>> +static void __init store_mmu_cr4(void)
>> +{
>> +    mmu_cr4_features = read_cr4();
>> +}
>>   #else
>>   static inline void init_gbpages(void)
>>   {
>>   }
>> +static void __init store_mmu_cr4(void)
>> +{
>> +}
>>   static void __init cleanup_highmap(void)
>>   {
>>   }
>> @@ -929,6 +936,8 @@ void __init setup_arch(char **cmdline_p)
>>       /* max_pfn_mapped is updated here */
>>       max_low_pfn_mapped = init_memory_mapping(0, max_low_pfn<<PAGE_SHIFT);
>>       max_pfn_mapped = max_low_pfn_mapped;
>> +    /* after init_memory_mapping updating cr4*/
>> +    store_mmu_cr4();
>>
>>   #ifdef CONFIG_X86_64
>>       if (max_pfn>  max_low_pfn) {
>
> This looks really, really, really wrong.
>
> Why the heck should we save and restore CR4 only for x86-64?

Peter, this patch just restoring old sequence. If you think 32 bit should do same thing, we can do that in another patch.

Also after closing looking, Stefano's v1 patch should be ok too.
because init_memory_mapping is using set_in_cr4(...) and it will update mmu_cr4_features at the same time.

Thanks

Yinghai

Re: 2.6.38.2 breaks suspend to disk

[Stefano Stabellini]

On Fri, 1 Apr 2011, Yinghai Lu wrote:
> Peter, this patch just restoring old sequence. If you think 32 bit should do same thing, we can do that in another patch.

indeed


> Also after closing looking, Stefano's v1 patch should be ok too.
> because init_memory_mapping is using set_in_cr4(...) and it will update mmu_cr4_features at the same time.

both patches are fine by me

Re: 2.6.38.2 breaks suspend to disk

[Stefano Stabellini]

On Fri, 1 Apr 2011, H. Peter Anvin wrote:
> On 04/01/2011 09:06 AM, Yinghai Lu wrote:
> > Index: linux-2.6/arch/x86/kernel/setup.c
> > ===================================================================
> > --- linux-2.6.orig/arch/x86/kernel/setup.c
> > +++ linux-2.6/arch/x86/kernel/setup.c
> > @@ -294,10 +294,17 @@ static void __init init_gbpages(void)
> >      else
> >          direct_gbpages = 0;
> >  }
> > +static void __init store_mmu_cr4(void)
> > +{
> > +    mmu_cr4_features = read_cr4();
> > +}
> >  #else
> >  static inline void init_gbpages(void)
> >  {
> >  }
> > +static void __init store_mmu_cr4(void)
> > +{
> > +}
> >  static void __init cleanup_highmap(void)
> >  {
> >  }
> > @@ -929,6 +936,8 @@ void __init setup_arch(char **cmdline_p)
> >      /* max_pfn_mapped is updated here */
> >      max_low_pfn_mapped = init_memory_mapping(0, max_low_pfn<<PAGE_SHIFT);
> >      max_pfn_mapped = max_low_pfn_mapped;
> > +    /* after init_memory_mapping updating cr4*/
> > +    store_mmu_cr4();
> >  
> >  #ifdef CONFIG_X86_64
> >      if (max_pfn > max_low_pfn) {
> 
> This looks really, really, really wrong.
> 
> Why the heck should we save and restore CR4 only for x86-64?

AFAICT it has always been the case since the beginning of time (Initial
git repository build).

Re: 2.6.38.2 breaks suspend to disk

[H. Peter Anvin]

On 04/01/2011 11:14 AM, Stefano Stabellini wrote:
>> Why the heck should we save and restore CR4 only for x86-64?
> 
> AFAICT it has always been the case since the beginning of time (Initial
> git repository build).

Doesn't change the fact that at least conceptually it's wrong; consider
bits like NX.  Rafael, do you have any thoughts on this?

	-hpa

Re: 2.6.38.2 breaks suspend to disk

[Yinghai Lu]

On 04/01/2011 11:55 AM, H. Peter Anvin wrote:
> On 04/01/2011 11:14 AM, Stefano Stabellini wrote:
>>> Why the heck should we save and restore CR4 only for x86-64?
>>
>> AFAICT it has always been the case since the beginning of time (Initial
>> git repository build).
>
> Doesn't change the fact that at least conceptually it's wrong; consider
> bits like NX.  Rafael, do you have any thoughts on this?
>
more info:

in arch/x86/kernel/setup.c  we have
#if !defined(CONFIG_X86_PAE) || defined(CONFIG_X86_64)
unsigned long mmu_cr4_features;
#else
unsigned long mmu_cr4_features = X86_CR4_PAE;
#endif


in arch/x86/kernel/head_32.S

/*
  *      New page tables may be in 4Mbyte page mode and may
  *      be using the global pages.
  *
  *      NOTE! If we are on a 486 we may have no cr4 at all!
  *      So we do not try to touch it unless we really have
  *      some bits in it to set.  This won't work if the BSP
  *      implements cr4 but this AP does not -- very unlikely
  *      but be warned!  The same applies to the pse feature
  *      if not equally supported. --macro
  *
  *      NOTE! We have to correct for the fact that we're
  *      not yet offset PAGE_OFFSET..
  */
#define cr4_bits pa(mmu_cr4_features)
         movl cr4_bits,%edx
         andl %edx,%edx
         jz 6f
         movl %cr4,%eax          # Turn on paging options (PSE,PAE,..)
         orl %edx,%eax
         movl %eax,%cr4
...
6:

So for 32 bit, PAE support is not compiled in for old 486 cpus.
mmu_cr4_feautres will be used to make sure head_32.S will not access cr4.

that could be the reason why 32 bit does not do read back at beginning.

Thanks

Yinghai

Re: 2.6.38.2 breaks suspend to disk

[H. Peter Anvin]

On 04/01/2011 12:32 PM, Yinghai Lu wrote:
> 
> So for 32 bit, PAE support is not compiled in for old 486 cpus.
> mmu_cr4_feautres will be used to make sure head_32.S will not access cr4.
> 
> that could be the reason why 32 bit does not do read back at beginning.
> 

Yes, but that doesn't explain why we shouldn't set new bits like NX and
PSE in this register.

	-hpa

Re: 2.6.38.2 breaks suspend to disk

[Yinghai Lu]

On 04/01/2011 12:36 PM, H. Peter Anvin wrote:
> On 04/01/2011 12:32 PM, Yinghai Lu wrote:
>>
>> So for 32 bit, PAE support is not compiled in for old 486 cpus.
>> mmu_cr4_feautres will be used to make sure head_32.S will not access cr4.
>>
>> that could be the reason why 32 bit does not do read back at beginning.
>>
>
> Yes, but that doesn't explain why we shouldn't set new bits like NX and
> PSE in this register.

ok, please check if you are happy with this one.

From: Stefano Stabellini <stefano.stabellini@eu.citrix.com>

[PATCH -v3] x86: Save cr4 to mmu_cr4_features at boot time

Save cr4 to mmu_cr4_features at boot time

Michael reported 2.6.38.2 hibernation is broken by one backported patch.
it cause a freeze when resuming from hibernation

| "x86: Cleanup highmap after brk is concluded"
| commit id e5f15b45ddf3afa2bbbb10c7ea34fb32b6de0a0e.

it turns out the mmu_cr4 save it lost somehow.

-v3: read back cr4 for 32bit too according to HPA

Bisected-and-tested-by: Michael Leun <lkml20101129@newton.leun.net>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
  arch/x86/kernel/setup.c |   12 ++++++++++++
  1 file changed, 12 insertions(+)

Index: linux-2.6/arch/x86/kernel/setup.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/setup.c
+++ linux-2.6/arch/x86/kernel/setup.c
@@ -219,6 +219,17 @@ unsigned long mmu_cr4_features;
  unsigned long mmu_cr4_features = X86_CR4_PAE;
  #endif
  
+#if defined(CONFIG_X86_PAE) || defined(CONFIG_X86_64)
+static void __init read_back_mmu_cr4(void)
+{
+	mmu_cr4_features = read_cr4();
+}
+#else
+static void __init read_back_mmu_cr4(void)
+{
+}
+#endif
+
  /* Boot loader ID and version as integers, for the benefit of proc_dointvec */
  int bootloader_type, bootloader_version;
  
@@ -892,6 +903,7 @@ void __init setup_arch(char **cmdline_p)
  
  	high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
  #endif
+	read_back_mmu_cr4();
  
  	/*
  	 * Find and reserve possible boot-time SMP configuration:

Re: 2.6.38.2 breaks suspend to disk

[H. Peter Anvin]

On 04/01/2011 12:54 PM, Yinghai Lu wrote:
> 
> ok, please check if you are happy with this one.
> 

The best would simply be:

	mmu_cr4_features = read_cr4_safe();

If this has to run before we can handle exceptions, one can verify the
existence by testing for the CPUID instruction (a CPU has CR4 if and
only if it has CPUID):

	if (boot_cpu_data.cpuid_level >= 0)
		mmu_cr4_features = read_cr4_safe();

... since we set cpuid_level to -1 if there is no CPUID instruction.

	-hpa

Re: 2.6.38.2 breaks suspend to disk

[Yinghai Lu]

[-- Attachment #1: Type: text/plain, Size: 695 bytes --]

On Fri, Apr 1, 2011 at 1:21 PM, H. Peter Anvin <hpa@zytor.com> wrote:
> On 04/01/2011 12:54 PM, Yinghai Lu wrote:
>>
>> ok, please check if you are happy with this one.
>>
>
> The best would simply be:
>
>        mmu_cr4_features = read_cr4_safe();
>
> If this has to run before we can handle exceptions, one can verify the
> existence by testing for the CPUID instruction (a CPU has CR4 if and
> only if it has CPUID):
>
>        if (boot_cpu_data.cpuid_level >= 0)
>                mmu_cr4_features = read_cr4_safe();
>
> ... since we set cpuid_level to -1 if there is no CPUID instruction.

in that case could use read_cr4 directly.

please check attached -v4

Thanks

[-- Attachment #2: fix_store.patch --]
[-- Type: text/x-patch, Size: 2502 bytes --]

From: Stefano Stabellini <stefano.stabellini@eu.citrix.com>

[PATCH -v4] x86: Save cr4 to mmu_cr4_features at boot time

Save cr4 to mmu_cr4_features at boot time

Michael reported 2.6.38.2 hibernation is broken by one backported patch.
it cause a freeze when resuming from hibernation

| "x86: Cleanup highmap after brk is concluded"
| commit id e5f15b45ddf3afa2bbbb10c7ea34fb32b6de0a0e.

it turns out the mmu_cr4 save it lost somehow.

-v3: read back cr4 for 32bit too according to HPA
-v4: use cpuid_level to check if we can read cr4 according to HPA
     don't touch mmu_cr4_features if CONFIG_HIBERNATION is defined from Yinghai

Bisected-and-tested-by: Michael Leun <lkml20101129@newton.leun.net>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
 arch/x86/include/asm/processor.h |    4 ++++
 arch/x86/kernel/setup.c          |   11 ++++++++++-
 2 files changed, 14 insertions(+), 1 deletion(-)

Index: linux-2.6/arch/x86/kernel/setup.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/setup.c
+++ linux-2.6/arch/x86/kernel/setup.c
@@ -212,7 +212,11 @@ struct cpuinfo_x86 boot_cpu_data __read_
 EXPORT_SYMBOL(boot_cpu_data);
 #endif
 
-
+/*
+ * mmu_cr4_features two purpose:
+ *  a. head_32.S will access cr4 according if X86_CR4_PAE is set in it.
+ *  b. store read back cr4 for hibernation
+ */
 #if !defined(CONFIG_X86_PAE) || defined(CONFIG_X86_64)
 unsigned long mmu_cr4_features;
 #else
@@ -892,6 +896,11 @@ void __init setup_arch(char **cmdline_p)
 
 	high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
 #endif
+#ifdef CONFIG_HIBERNATION
+	/* a CPU has CR4 iff it has CPUID --- hpa */
+	if (boot_cpu_data.cpuid_level >= 0)
+		mmu_cr4_features = read_cr4();
+#endif
 
 	/*
 	 * Find and reserve possible boot-time SMP configuration:
Index: linux-2.6/arch/x86/include/asm/processor.h
===================================================================
--- linux-2.6.orig/arch/x86/include/asm/processor.h
+++ linux-2.6/arch/x86/include/asm/processor.h
@@ -601,7 +601,9 @@ static inline void set_in_cr4(unsigned l
 {
 	unsigned long cr4;
 
+#ifdef CONFIG_HIBERNATION
 	mmu_cr4_features |= mask;
+#endif
 	cr4 = read_cr4();
 	cr4 |= mask;
 	write_cr4(cr4);
@@ -611,7 +613,9 @@ static inline void clear_in_cr4(unsigned
 {
 	unsigned long cr4;
 
+#ifdef CONFIG_HIBERNATION
 	mmu_cr4_features &= ~mask;
+#endif
 	cr4 = read_cr4();
 	cr4 &= ~mask;
 	write_cr4(cr4);

Re: 2.6.38.2 breaks suspend to disk

[H. Peter Anvin]

On 04/01/2011 02:24 PM, Yinghai Lu wrote:
> On Fri, Apr 1, 2011 at 1:21 PM, H. Peter Anvin <hpa@zytor.com> wrote:
>> On 04/01/2011 12:54 PM, Yinghai Lu wrote:
>>>
>>> ok, please check if you are happy with this one.
>>>
>>
>> The best would simply be:
>>
>>        mmu_cr4_features = read_cr4_safe();
>>
>> If this has to run before we can handle exceptions, one can verify the
>> existence by testing for the CPUID instruction (a CPU has CR4 if and
>> only if it has CPUID):
>>
>>        if (boot_cpu_data.cpuid_level >= 0)
>>                mmu_cr4_features = read_cr4_safe();
>>
>> ... since we set cpuid_level to -1 if there is no CPUID instruction.
> 
> in that case could use read_cr4 directly.
> 
> please check attached -v4
> 

Err, yes, that's what I meant.

Now, why the heck did you introduce a bunch of CONFIG_HIBERNATION #ifdefs?

	-hpa

Re: 2.6.38.2 breaks suspend to disk

[Yinghai Lu]

On Fri, Apr 1, 2011 at 2:30 PM, H. Peter Anvin <hpa@zytor.com> wrote:
> On 04/01/2011 02:24 PM, Yinghai Lu wrote:
>> On Fri, Apr 1, 2011 at 1:21 PM, H. Peter Anvin <hpa@zytor.com> wrote:
>>> On 04/01/2011 12:54 PM, Yinghai Lu wrote:
>>>>
>>>> ok, please check if you are happy with this one.
>>>>
>>>
>>> The best would simply be:
>>>
>>>        mmu_cr4_features = read_cr4_safe();
>>>
>>> If this has to run before we can handle exceptions, one can verify the
>>> existence by testing for the CPUID instruction (a CPU has CR4 if and
>>> only if it has CPUID):
>>>
>>>        if (boot_cpu_data.cpuid_level >= 0)
>>>                mmu_cr4_features = read_cr4_safe();
>>>
>>> ... since we set cpuid_level to -1 if there is no CPUID instruction.
>>
>> in that case could use read_cr4 directly.
>>
>> please check attached -v4
>>
>
> Err, yes, that's what I meant.
>
> Now, why the heck did you introduce a bunch of CONFIG_HIBERNATION #ifdefs?

mmu_cr4_features: have two usages:
1. for 32bit to control cr4 access in head_32.S
2. for hibernation resume.

include/asm/processor.h:extern unsigned long            mmu_cr4_features;
include/asm/processor.h:        mmu_cr4_features |= mask;
include/asm/processor.h:        mmu_cr4_features &= ~mask;
kernel/head_32.S:#define cr4_bits pa(mmu_cr4_features)
kernel/setup.c: * mmu_cr4_features two purpose:
kernel/setup.c:unsigned long mmu_cr4_features;
kernel/setup.c:unsigned long mmu_cr4_features = X86_CR4_PAE;
kernel/setup.c:         mmu_cr4_features = read_cr4();
power/hibernate_asm_32.S:       movl    mmu_cr4_features, %ecx
power/hibernate_asm_32.S:       movl    mmu_cr4_features, %ecx
power/hibernate_asm_64.S:       movq    mmu_cr4_features(%rip), %rax
power/hibernate_asm_64.S:       movq    mmu_cr4_features(%rip), %rax

So we don't need to read back cr4 and save it if CONFIG_HIBERNATION is
not defined.

Thanks

Yinghai

Re: 2.6.38.2 breaks suspend to disk

[H. Peter Anvin]

On 04/01/2011 02:37 PM, Yinghai Lu wrote:
>>
>> Err, yes, that's what I meant.
>>
>> Now, why the heck did you introduce a bunch of CONFIG_HIBERNATION #ifdefs?
> 
> mmu_cr4_features: have two usages:
> 1. for 32bit to control cr4 access in head_32.S
> 2. for hibernation resume.
> 
> include/asm/processor.h:extern unsigned long            mmu_cr4_features;
> include/asm/processor.h:        mmu_cr4_features |= mask;
> include/asm/processor.h:        mmu_cr4_features &= ~mask;
> kernel/head_32.S:#define cr4_bits pa(mmu_cr4_features)
> kernel/setup.c: * mmu_cr4_features two purpose:
> kernel/setup.c:unsigned long mmu_cr4_features;
> kernel/setup.c:unsigned long mmu_cr4_features = X86_CR4_PAE;
> kernel/setup.c:         mmu_cr4_features = read_cr4();
> power/hibernate_asm_32.S:       movl    mmu_cr4_features, %ecx
> power/hibernate_asm_32.S:       movl    mmu_cr4_features, %ecx
> power/hibernate_asm_64.S:       movq    mmu_cr4_features(%rip), %rax
> power/hibernate_asm_64.S:       movq    mmu_cr4_features(%rip), %rax
> 
> So we don't need to read back cr4 and save it if CONFIG_HIBERNATION is
> not defined.
> 

And why on Earth is it worth saving a couple of instructions (and
introducing code ugliness and a more complex testing matrix) in the case
when it is not?

	-hpa

Re: 2.6.38.2 breaks suspend to disk

[Yinghai Lu]

On 04/01/2011 02:42 PM, H. Peter Anvin wrote:
>
> And why on Earth is it worth saving a couple of instructions (and
> introducing code ugliness and a more complex testing matrix) in the case
> when it is not?

Please check this one, it moves storing mmu_cr4 to arch_prepare_suspend.

Thanks

Yinghai

From: Stefano Stabellini <stefano.stabellini@eu.citrix.com>

[PATCH -v5] x86: Save cr4 to mmu_cr4_features at boot time

Save cr4 to mmu_cr4_features at boot time

Michael reported 2.6.38.2 hibernation is broken by one backported patch.
it cause a freeze when resuming from hibernation

| "x86: Cleanup highmap after brk is concluded"
| commit id e5f15b45ddf3afa2bbbb10c7ea34fb32b6de0a0e.

it turns out the mmu_cr4 save it lost somehow.

-v3: read back cr4 for 32bit too according to HPA
-v4: use cpuid_level to check if we can read cr4 according to HPA
      don't touch mmu_cr4_features if CONFIG_HIBERNATION is defined from Yinghai
-v5: reduce the using of CONFIG_HIBERNATION

Bisected-and-tested-by: Michael Leun <lkml20101129@newton.leun.net>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>

---
  arch/x86/include/asm/processor.h  |    2 --
  arch/x86/include/asm/suspend_32.h |    2 +-
  arch/x86/include/asm/suspend_64.h |    5 +----
  arch/x86/kernel/setup.c           |   16 +++++++++++++++-
  4 files changed, 17 insertions(+), 8 deletions(-)

Index: linux-2.6/arch/x86/kernel/setup.c
===================================================================
--- linux-2.6.orig/arch/x86/kernel/setup.c
+++ linux-2.6/arch/x86/kernel/setup.c
@@ -212,12 +212,26 @@ struct cpuinfo_x86 boot_cpu_data __read_
  EXPORT_SYMBOL(boot_cpu_data);
  #endif
  
-
+/*
+ * mmu_cr4_features has two purposes:
+ *  a. head_32.S will access cr4 according if X86_CR4_PAE is set in it.
+ *  b. store read back cr4 for hibernation
+ */
  #if !defined(CONFIG_X86_PAE) || defined(CONFIG_X86_64)
  unsigned long mmu_cr4_features;
  #else
  unsigned long mmu_cr4_features = X86_CR4_PAE;
  #endif
+#ifdef CONFIG_HIBERNATION
+int arch_prepare_suspend(void)
+{
+	/* a CPU has CR4 iff it has CPUID --- hpa */
+	if (boot_cpu_data.cpuid_level >= 0)
+		mmu_cr4_features = read_cr4();
+
+	return 0;
+}
+#endif
  
  /* Boot loader ID and version as integers, for the benefit of proc_dointvec */
  int bootloader_type, bootloader_version;
Index: linux-2.6/arch/x86/include/asm/processor.h
===================================================================
--- linux-2.6.orig/arch/x86/include/asm/processor.h
+++ linux-2.6/arch/x86/include/asm/processor.h
@@ -601,7 +601,6 @@ static inline void set_in_cr4(unsigned l
  {
  	unsigned long cr4;
  
-	mmu_cr4_features |= mask;
  	cr4 = read_cr4();
  	cr4 |= mask;
  	write_cr4(cr4);
@@ -611,7 +610,6 @@ static inline void clear_in_cr4(unsigned
  {
  	unsigned long cr4;
  
-	mmu_cr4_features &= ~mask;
  	cr4 = read_cr4();
  	cr4 &= ~mask;
  	write_cr4(cr4);
Index: linux-2.6/arch/x86/include/asm/suspend_32.h
===================================================================
--- linux-2.6.orig/arch/x86/include/asm/suspend_32.h
+++ linux-2.6/arch/x86/include/asm/suspend_32.h
@@ -9,7 +9,7 @@
  #include <asm/desc.h>
  #include <asm/i387.h>
  
-static inline int arch_prepare_suspend(void) { return 0; }
+int arch_prepare_suspend(void);
  
  /* image of the saved processor state */
  struct saved_context {
Index: linux-2.6/arch/x86/include/asm/suspend_64.h
===================================================================
--- linux-2.6.orig/arch/x86/include/asm/suspend_64.h
+++ linux-2.6/arch/x86/include/asm/suspend_64.h
@@ -9,10 +9,7 @@
  #include <asm/desc.h>
  #include <asm/i387.h>
  
-static inline int arch_prepare_suspend(void)
-{
-	return 0;
-}
+int arch_prepare_suspend(void);
  
  /*
   * Image of the saved processor state, used by the low level ACPI suspend to

Re: 2.6.38.2 breaks suspend to disk

[H. Peter Anvin]

On 04/01/2011 04:04 PM, Yinghai Lu wrote:
> On 04/01/2011 02:42 PM, H. Peter Anvin wrote:
>>
>> And why on Earth is it worth saving a couple of instructions (and
>> introducing code ugliness and a more complex testing matrix) in the case
>> when it is not?
> 
> Please check this one, it moves storing mmu_cr4 to arch_prepare_suspend.
> 

You keep moving things around instead of answering the question.  It
might be the right thing to do, but I would like an answer why, in your
opinion, the easy way isn't feasible.

For suspend/resume, the right thing really is just to save CR4 like any
other processor register.

	-hpa

Re: 2.6.38.2 breaks suspend to disk

[Yinghai Lu]

On 04/01/2011 04:12 PM, H. Peter Anvin wrote:
> On 04/01/2011 04:04 PM, Yinghai Lu wrote:
>> On 04/01/2011 02:42 PM, H. Peter Anvin wrote:
>>>
>>> And why on Earth is it worth saving a couple of instructions (and
>>> introducing code ugliness and a more complex testing matrix) in the case
>>> when it is not?
>>
>> Please check this one, it moves storing mmu_cr4 to arch_prepare_suspend.
>>
>
> You keep moving things around instead of answering the question.  It
> might be the right thing to do, but I would like an answer why, in your
> opinion, the easy way isn't feasible.

want to find right place to read back cr4 for hibernation/resume.

it is one time using, so we could just read back one time at last and avoid touching it
inset/clear_in_cr4.

>
> For suspend/resume, the right thing really is just to save CR4 like any
> other processor register.

not sure why mmu_cr4_features get overloaded. maybe power guys want to save one variable instead of using restore_rc4.

Thanks

Yinghai

Re: 2.6.38.2 breaks suspend to disk

[Rafael J. Wysocki]

On Friday, April 01, 2011, H. Peter Anvin wrote:
> On 04/01/2011 11:14 AM, Stefano Stabellini wrote:
> >> Why the heck should we save and restore CR4 only for x86-64?
> > 
> > AFAICT it has always been the case since the beginning of time (Initial
> > git repository build).
> 
> Doesn't change the fact that at least conceptually it's wrong; consider
> bits like NX.  Rafael, do you have any thoughts on this?

I don't seem to remember that being intentional.  I think we should do the
same on both x86s.

Thanks,
Rafael

[tip:x86/urgent] x86, hibernate: Initialize mmu_cr4_features during boot

[tip-bot for H. Peter Anvin]

Commit-ID:  4da9484bdece39ab0b098fa711e095e3e9fc8684
Gitweb:     http://git.kernel.org/tip/4da9484bdece39ab0b098fa711e095e3e9fc8684
Author:     H. Peter Anvin <hpa@linux.intel.com>
AuthorDate: Wed, 6 Apr 2011 13:10:02 -0700
Committer:  H. Peter Anvin <hpa@linux.intel.com>
CommitDate: Wed, 6 Apr 2011 13:10:02 -0700

x86, hibernate: Initialize mmu_cr4_features during boot

Restore the initialization of mmu_cr4_features during boot, which was
removed without comment in checkin e5f15b45ddf3afa2bbbb10c7ea34fb32b6de0a0e

x86: Cleanup highmap after brk is concluded

thereby breaking resume from hibernate.  This restores previous
functionality in approximately the same place, and corrects the
reading of %cr4 on pre-CPUID hardware (%cr4 exists if and only if
CPUID is supported.)

However, part of the problem is that the hibernate suspend/resume
sequence should manage the save/restore of %cr4 explicitly.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Cc: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <201104020154.57136.rjw@sisk.pl>
---
 arch/x86/kernel/setup.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 5a0484a..4be9b39 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -976,6 +976,11 @@ void __init setup_arch(char **cmdline_p)
 	paging_init();
 	x86_init.paging.pagetable_setup_done(swapper_pg_dir);
 
+	if (boot_cpu_data.cpuid_level >= 0) {
+		/* A CPU has %cr4 if and only if it has CPUID */
+		mmu_cr4_features = read_cr4();
+	}
+
 #ifdef CONFIG_X86_32
 	/* sync back kernel address range */
 	clone_pgd_range(initial_page_table + KERNEL_PGD_BOUNDARY,

Re: 2.6.38.2 breaks suspend to disk

[Ingo Molnar]

* Rafael J. Wysocki <rjw@sisk.pl> wrote:

> On Thursday, March 31, 2011, Stefano Stabellini wrote:
> > On Thu, 31 Mar 2011, Michael Leun wrote:
> > > Nope, unfortunately this does not change anything (neither when
> > > applying ontop of the tree resulting from bisecting, nor ontop
> > > 2.6.38.2).
> > > 
> > > Just to make shure there was no mistake when bisecting I did
> > > 
> > > patch -R -p1 <~/linux-2.6.38.y.git-ff518ea26654e05d325d996f6e3a7f5f569cc2d5.txt
> > > 
> > > and then indeed it worked again.
> > 
> > This patch fixes it for me.
> > 
> > 
> > ---
> > 
> > save cr4 to mmu_cr4_features at boot time
> > 
> > Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
> 
> Acked-by: Rafael J. Wysocki <rjw@sisk.pl>
> 
> Peter, Ingo, please regard this as urgent, it breaks -stable.

Stable team, please revert it from -stable for now.

Who pushed it to -stable so soon, just a few days after the commit has hit .39 
upstream? It was not marked -stable in the commit either.

Thanks,

	Ingo