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From: Anthony Liguori <anthony@codemonkey.ws>
To: Jordan Justen <jljusten@gmail.com>
Cc: Bei Guan <gbtju85@gmail.com>, Gleb Natapov <gleb@redhat.com>,
	QEMU Developers <qemu-devel@nongnu.org>,
	kvm-devel <kvm@vger.kernel.org>
Subject: Re: [Qemu-devel] How does the QEMU load the binary files bios.bin and vgabios-cirrus.bin?
Date: Thu, 07 Apr 2011 13:37:14 -0500	[thread overview]
Message-ID: <4D9E045A.90500@codemonkey.ws> (raw)
In-Reply-To: <BANLkTi=vWeaF2-3-AbxX4NFR5mpJrO4aUw@mail.gmail.com>

On 04/07/2011 01:18 PM, Jordan Justen wrote:
> On Thu, Apr 7, 2011 at 09:08, Anthony Liguori<anthony@codemonkey.ws>  wrote:
>> On 04/07/2011 10:51 AM, Gleb Natapov wrote:
>>> That may seams to be impossible but it is how HW works. And this is how
>>> QEMU emulates it. Look at target-i386/helper.c:cpu_reset()
>>>
>>>      cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff,
>>>                             DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK |
>>>                             DESC_R_MASK | DESC_A_MASK);
>>>
>>>      env->eip = 0xfff0;
>>>
>>> Don't know how a20 gate is handled btw.
>> I see that we use 0xf0000 in the kernel but this is because of a limitation
>> of VMX.
> I recently noticed that kvm does this.  It does not seem to be a big
> deal as firmware can easily deal with it, but I did find it odd that
> kvm had the csbase of 0xf0000 as processors generally use a csbase of
> 0xffff0000 initially.  (At least, this is what I've seen with Intel
> processors for the past 12 years.)
>
> How can this limitation exist with VMX if mode transitions are
> supported, in which case this type of csbase vs. real-mode segment
> mismatch can easily occur?

Mismatches between cached segment descriptors and the segment registers 
are not problematic in KVM per say.

The issue is that vm8086 mode doesn't allow for this and since KVM uses 
vm8086 to emulate real mode on processors that don't support whatever it 
is that Intel is calling it these days, we can't effectively support this.

>> I guess when 32-bit was introduced, this behavior was added.
>>
>>>> The CS base starts out at 0xf0000 and IP is 0xfff0.  That gives a
>>>> real address of 0xffff0.  This is usually a trampoline to somewhere
>>>> else in the space.
>>> CS descriptor and CS selector don't have to be in sync (big real mode).
>> Indeed.
> Another place this will often be seen is SMM, as the SMBASE can easily
> be>  1MB, but the SMM entry is in 16 bit mode.

KVM doesn't support SMM although that's not because of this.  KVM 
doesn't allow execution of ROM memory which makes it difficult to 
implement PAM in the way it's intended to be implemented.  This makes 
SMM a bit tricky to make work.  Since there's never really been a 
pressing need to support SMM, to my knowledge, noone has even tried.

Regards,

Anthony Liguori

> -Jordan
>


WARNING: multiple messages have this Message-ID (diff)
From: Anthony Liguori <anthony@codemonkey.ws>
To: Jordan Justen <jljusten@gmail.com>
Cc: kvm-devel <kvm@vger.kernel.org>, Bei Guan <gbtju85@gmail.com>,
	Gleb Natapov <gleb@redhat.com>,
	QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] How does the QEMU load the binary files bios.bin and vgabios-cirrus.bin?
Date: Thu, 07 Apr 2011 13:37:14 -0500	[thread overview]
Message-ID: <4D9E045A.90500@codemonkey.ws> (raw)
In-Reply-To: <BANLkTi=vWeaF2-3-AbxX4NFR5mpJrO4aUw@mail.gmail.com>

On 04/07/2011 01:18 PM, Jordan Justen wrote:
> On Thu, Apr 7, 2011 at 09:08, Anthony Liguori<anthony@codemonkey.ws>  wrote:
>> On 04/07/2011 10:51 AM, Gleb Natapov wrote:
>>> That may seams to be impossible but it is how HW works. And this is how
>>> QEMU emulates it. Look at target-i386/helper.c:cpu_reset()
>>>
>>>      cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff,
>>>                             DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK |
>>>                             DESC_R_MASK | DESC_A_MASK);
>>>
>>>      env->eip = 0xfff0;
>>>
>>> Don't know how a20 gate is handled btw.
>> I see that we use 0xf0000 in the kernel but this is because of a limitation
>> of VMX.
> I recently noticed that kvm does this.  It does not seem to be a big
> deal as firmware can easily deal with it, but I did find it odd that
> kvm had the csbase of 0xf0000 as processors generally use a csbase of
> 0xffff0000 initially.  (At least, this is what I've seen with Intel
> processors for the past 12 years.)
>
> How can this limitation exist with VMX if mode transitions are
> supported, in which case this type of csbase vs. real-mode segment
> mismatch can easily occur?

Mismatches between cached segment descriptors and the segment registers 
are not problematic in KVM per say.

The issue is that vm8086 mode doesn't allow for this and since KVM uses 
vm8086 to emulate real mode on processors that don't support whatever it 
is that Intel is calling it these days, we can't effectively support this.

>> I guess when 32-bit was introduced, this behavior was added.
>>
>>>> The CS base starts out at 0xf0000 and IP is 0xfff0.  That gives a
>>>> real address of 0xffff0.  This is usually a trampoline to somewhere
>>>> else in the space.
>>> CS descriptor and CS selector don't have to be in sync (big real mode).
>> Indeed.
> Another place this will often be seen is SMM, as the SMBASE can easily
> be>  1MB, but the SMM entry is in 16 bit mode.

KVM doesn't support SMM although that's not because of this.  KVM 
doesn't allow execution of ROM memory which makes it difficult to 
implement PAM in the way it's intended to be implemented.  This makes 
SMM a bit tricky to make work.  Since there's never really been a 
pressing need to support SMM, to my knowledge, noone has even tried.

Regards,

Anthony Liguori

> -Jordan
>

  parent reply	other threads:[~2011-04-07 18:37 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-04-07  8:22 [Qemu-devel] How does the QEMU load the binary files bios.bin and vgabios-cirrus.bin? Bei Guan
2011-04-07 13:28 ` Anthony Liguori
2011-04-07 15:31   ` Gleb Natapov
2011-04-07 15:42     ` Anthony Liguori
2011-04-07 15:51       ` Gleb Natapov
2011-04-07 16:08         ` Anthony Liguori
2011-04-07 18:18           ` Jordan Justen
2011-04-07 18:30             ` Gleb Natapov
2011-04-07 18:37             ` Anthony Liguori [this message]
2011-04-07 18:37               ` Anthony Liguori
2011-04-07 18:44               ` Gleb Natapov
2011-04-07 18:44                 ` Gleb Natapov
2011-04-07 19:03                 ` Jordan Justen
2011-04-07 19:03                   ` Jordan Justen
2011-04-07 19:16                   ` Gleb Natapov
2011-04-07 19:16                     ` Gleb Natapov
2011-04-07 19:24                   ` Olivier Galibert
2011-04-07 19:24                     ` Olivier Galibert
2011-04-07 19:58                     ` Jordan Justen
2011-04-07 19:58                       ` Jordan Justen
2011-04-07 19:21                 ` Anthony Liguori
2011-04-07 19:31                   ` Gleb Natapov
2011-04-07 21:34                     ` Anthony Liguori
2011-04-08  5:58                       ` Gleb Natapov
2011-04-07 19:47                   ` Jordan Justen
2011-04-07 19:47                     ` Jordan Justen
2011-04-07 17:30       ` malc
2011-04-07 17:07   ` Bei Guan
2011-04-07 17:31     ` Bei Guan

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