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* [U-Boot] [PATCH 1/6] powerpc/85xx: Add 36-bit address map support to P1022DS
@ 2011-03-07  4:17 Kumar Gala
  2011-03-07  4:17 ` [U-Boot] [PATCH 2/6] powerpc/85xx: Enable support for ATI graphics cards on P1022DS Kumar Gala
  2011-03-25 13:35 ` [U-Boot] [PATCH 1/6] powerpc/85xx: Add 36-bit address map support to P1022DS Kumar Gala
  0 siblings, 2 replies; 18+ messages in thread
From: Kumar Gala @ 2011-03-07  4:17 UTC (permalink / raw)
  To: u-boot

From: Jiang Yutang <b14898@freescale.com>

Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 board/freescale/p1022ds/p1022ds.c |    3 ++
 boards.cfg                        |    1 +
 include/configs/P1022DS.h         |   46 ++++++++++++++++++++++++++++++++++++-
 3 files changed, 49 insertions(+), 1 deletions(-)

diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c
index 62beafa..6f20dc3 100644
--- a/board/freescale/p1022ds/p1022ds.c
+++ b/board/freescale/p1022ds/p1022ds.c
@@ -53,6 +53,9 @@ int checkboard(void)
 	u8 sw;
 
 	puts("Board: P1022DS ");
+#ifdef CONFIG_PHYS_64BIT
+	puts("(36-bit addrmap) ");
+#endif
 
 	printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
 		in_8(&pixis->id), in_8(&pixis->arch), in_8(&pixis->scver));
diff --git a/boards.cfg b/boards.cfg
index 263c1e6..2622f78 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -523,6 +523,7 @@ P1020RDB_NAND                powerpc     mpc85xx     p1_p2_rdb           freesca
 P1020RDB_SDCARD              powerpc     mpc85xx     p1_p2_rdb           freescale      -           P1_P2_RDB:P1020RDB,SDCARD
 P1020RDB_SPIFLASH            powerpc     mpc85xx     p1_p2_rdb           freescale      -           P1_P2_RDB:P1020RDB,SPIFLASH
 P1022DS                      powerpc     mpc85xx     p1022ds             freescale
+P1022DS_36BIT                powerpc     mpc85xx     p1022ds             freescale      -           P1022DS:36BIT
 P2010RDB                     powerpc     mpc85xx     p1_p2_rdb           freescale      -           P1_P2_RDB:P2010RDB
 P2010RDB_36BIT               powerpc     mpc85xx     p1_p2_rdb           freescale      -           P1_P2_RDB:P2010RDB,36BIT
 P2010RDB_36BIT_SDCARD        powerpc     mpc85xx     p1_p2_rdb           freescale      -           P1_P2_RDB:P2010RDB,36BIT,SDCARD
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 5f47d1a..c15cb8d 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -14,6 +14,10 @@
 
 #include "../board/freescale/common/ics307_clk.h"
 
+#ifdef CONFIG_36BIT
+#define CONFIG_PHYS_64BIT
+#endif
+
 /* High Level Configuration Options */
 #define CONFIG_BOOKE			/* BOOKE */
 #define CONFIG_E500			/* BOOKE e500 family */
@@ -39,10 +43,11 @@
 #define CONFIG_FSL_PCIE_RESET		/* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
 
-#define CONFIG_PHYS_64BIT
+#ifdef CONFIG_PHYS_64BIT
 #define CONFIG_ENABLE_36BIT_PHYS
 #define CONFIG_ADDR_MAP
 #define CONFIG_SYS_NUM_ADDR_MAP		16	/* number of TLB1 entries */
+#endif
 
 #define CONFIG_FSL_LAW			/* Use common FSL init code */
 
@@ -65,7 +70,11 @@
  */
 #define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */
 #define CONFIG_SYS_CCSRBAR		0xffe00000	/* relocated CCSRBAR */
+#ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_CCSRBAR_PHYS		0xfffe00000ull
+#else
+#define CONFIG_SYS_CCSRBAR_PHYS		CONFIG_SYS_CCSRBAR
+#endif
 #define CONFIG_SYS_IMMR			CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
@@ -111,7 +120,11 @@
  * Local Bus Definitions
  */
 #define CONFIG_SYS_FLASH_BASE		0xe0000000 /* start of FLASH 128M */
+#ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_FLASH_BASE_PHYS	0xfe0000000ull
+#else
+#define CONFIG_SYS_FLASH_BASE_PHYS	CONFIG_SYS_FLASH_BASE
+#endif
 
 #define CONFIG_FLASH_BR_PRELIM  \
 	(BR_PHYS_ADDR((CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000)) | BR_PS_16 | BR_V)
@@ -145,7 +158,11 @@
 
 #define CONFIG_FSL_NGPIXIS
 #define PIXIS_BASE		0xffdf0000	/* PIXIS registers */
+#ifdef CONFIG_PHYS_64BIT
 #define PIXIS_BASE_PHYS		0xfffdf0000ull
+#else
+#define PIXIS_BASE_PHYS		PIXIS_BASE
+#endif
 
 #define CONFIG_SYS_BR2_PRELIM	(BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V)
 #define CONFIG_SYS_OR2_PRELIM	(OR_AM_32KB | 0x6ff7)
@@ -241,32 +258,59 @@
 
 /* controller 1, Slot 2, tgtid 1, Base address a000 */
 #define CONFIG_SYS_PCIE1_MEM_VIRT	0xc0000000
+#ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_PCIE1_MEM_BUS	0xe0000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS	0xc40000000ull
+#else
+#define CONFIG_SYS_PCIE1_MEM_BUS	0xc0000000
+#define CONFIG_SYS_PCIE1_MEM_PHYS	0xc0000000
+#endif
 #define CONFIG_SYS_PCIE1_MEM_SIZE	0x20000000	/* 512M */
 #define CONFIG_SYS_PCIE1_IO_VIRT	0xffc20000
 #define CONFIG_SYS_PCIE1_IO_BUS		0x00000000
+#ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_PCIE1_IO_PHYS	0xfffc20000ull
+#else
+#define CONFIG_SYS_PCIE1_IO_PHYS	0xffc20000
+#endif
 #define CONFIG_SYS_PCIE1_IO_SIZE	0x00010000	/* 64k */
 
 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
 #define CONFIG_SYS_PCIE2_MEM_VIRT	0xa0000000
+#ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_PCIE2_MEM_BUS	0xe0000000
 #define CONFIG_SYS_PCIE2_MEM_PHYS	0xc20000000ull
+#else
+#define CONFIG_SYS_PCIE2_MEM_BUS	0xa0000000
+#define CONFIG_SYS_PCIE2_MEM_PHYS	0xa0000000
+#endif
 #define CONFIG_SYS_PCIE2_MEM_SIZE	0x20000000	/* 512M */
 #define CONFIG_SYS_PCIE2_IO_VIRT	0xffc10000
 #define CONFIG_SYS_PCIE2_IO_BUS		0x00000000
+#ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_PCIE2_IO_PHYS	0xfffc10000ull
+#else
+#define CONFIG_SYS_PCIE2_IO_PHYS	0xffc10000
+#endif
 #define CONFIG_SYS_PCIE2_IO_SIZE	0x00010000	/* 64k */
 
 /* controller 3, Slot 1, tgtid 3, Base address b000 */
 #define CONFIG_SYS_PCIE3_MEM_VIRT	0x80000000
+#ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_PCIE3_MEM_BUS	0xe0000000
 #define CONFIG_SYS_PCIE3_MEM_PHYS	0xc00000000ull
+#else
+#define CONFIG_SYS_PCIE3_MEM_BUS	0x80000000
+#define CONFIG_SYS_PCIE3_MEM_PHYS	0x80000000
+#endif
 #define CONFIG_SYS_PCIE3_MEM_SIZE	0x20000000	/* 512M */
 #define CONFIG_SYS_PCIE3_IO_VIRT	0xffc00000
 #define CONFIG_SYS_PCIE3_IO_BUS		0x00000000
+#ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_PCIE3_IO_PHYS	0xfffc00000ull
+#else
+#define CONFIG_SYS_PCIE3_IO_PHYS	0xffc00000
+#endif
 #define CONFIG_SYS_PCIE3_IO_SIZE	0x00010000	/* 64k */
 
 #ifdef CONFIG_PCI
-- 
1.7.2.3

^ permalink raw reply related	[flat|nested] 18+ messages in thread

end of thread, other threads:[~2011-04-09 21:24 UTC | newest]

Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-03-07  4:17 [U-Boot] [PATCH 1/6] powerpc/85xx: Add 36-bit address map support to P1022DS Kumar Gala
2011-03-07  4:17 ` [U-Boot] [PATCH 2/6] powerpc/85xx: Enable support for ATI graphics cards on P1022DS Kumar Gala
2011-03-07  4:17   ` [U-Boot] [PATCH 3/6] powerpc/85xx: Added DIU configs for P1022DS and fixed LVDS config Kumar Gala
2011-03-07  4:17     ` [U-Boot] [PATCH 4/6] powerpc/85xx: Add support usb2/etsec and tdm/audio pin multiplex on P1022DS Kumar Gala
2011-03-07  4:17       ` [U-Boot] [PATCH 5/6] powerpc/85xx: Update default hwconfig " Kumar Gala
2011-03-07  4:17         ` [U-Boot] [PATCH 6/6] powerpc/85xx: Add SHARP LQ084S3LG01 LCD support " Kumar Gala
2011-04-09 21:12           ` Kumar Gala
2011-04-09 21:17             ` Tabi Timur-B04825
2011-04-09 21:24             ` Wolfgang Denk
2011-04-09 20:53         ` [U-Boot] [PATCH 5/6] powerpc/85xx: Update default hwconfig " Kumar Gala
2011-03-13 15:05       ` [U-Boot] [PATCH v2 4/6] powerpc/85xx: Add support usb2/etsec and tdm/audio pin multiplex " Kumar Gala
2011-04-09 20:53         ` Kumar Gala
2011-04-09 20:53       ` [U-Boot] [PATCH " Kumar Gala
2011-03-07 23:02     ` [U-Boot] [PATCH 3/6] powerpc/85xx: Added DIU configs for P1022DS and fixed LVDS config Timur Tabi
2011-04-09 20:54       ` Kumar Gala
2011-04-09 21:09         ` Tabi Timur-B04825
2011-04-09 20:52   ` [U-Boot] [PATCH 2/6] powerpc/85xx: Enable support for ATI graphics cards on P1022DS Kumar Gala
2011-03-25 13:35 ` [U-Boot] [PATCH 1/6] powerpc/85xx: Add 36-bit address map support to P1022DS Kumar Gala

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