Re: mmap() implementation for pci_alloc_consistent() memory?

[Clemens Ladisch <clemens@ladisch.de>]

Leon Woestenberg wrote:
> On Thu, May 19, 2011 at 5:58 PM, Clemens Ladisch <clemens@ladisch.de> wrote:
>>> On Thu, May 19, 2011 at 12:14:40AM +0200, Leon Woestenberg wrote:
>>> >     vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
>>
>> So is this an architecture without coherent caches?
> 
> My aim is to have an architecture independent driver.

Please note that most MMU architectures forbid mapping the same memory
with different attributes, so you must use pgprot_noncached if and only
if dma_alloc_coherent actually uses it.  Something like the code below.

And I'm not sure if you have to do some additional cache flushes when
mapping on some architectures.

>> Or would you want to use pgprot_dmacoherent, if available?
> 
> Hmm, let me check that.

It's available only on ARM and Unicore32.

There's also dma_mmap_coherent(), which does exactly what you want if
your buffer is physically contiguous, but it's ARM only.
Takashi tried to implement it for other architectures; I don't know
what came of it.


Regards,
Clemens


#ifndef pgprot_dmacoherent
/* determine whether coherent mappings need to be uncached */
#if defined(CONFIG_ALPHA) || \
    defined(CONFIG_CRIS) || \
    defined(CONFIG_IA64) || \
    (defined(CONFIG_MIPS) && defined(CONFIG_DMA_COHERENT)) || \
    (defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)) || \
    defined(CONFIG_SPARC64) || \
    defined(CONFIG_X86)
#define ARCH_HAS_DMA_COHERENT_CACHE
#endif
#endif

	...
#ifdef pgprot_dmacoherent
	vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot);
#elif !defined(ARCH_HAS_DMA_COHERENT_CACHE)
#ifdef CONFIG_MIPS
	if (!plat_device_is_coherent(device))
#endif
		vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
#endif