From: David Hawkins <dwh@ovro.caltech.edu>
To: Bruce_Leonard@selinc.com
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: MPC8308 bursting question
Date: Fri, 27 May 2011 13:33:43 -0700 [thread overview]
Message-ID: <4DE00AA7.2040804@ovro.caltech.edu> (raw)
In-Reply-To: <OF8813D588.08896EF4-ON8825789D.007035CD-8825789D.00709882@selinc.com>
Hi Bruce,
>> Read my MPC8349EA UPM setup notes and see if you have used
>> similar settings (I assume the local bus UPMs are similar):
>
> I found you paper interesting. I didn't have a problem with my UPM
> settings, single beat reads and writes worked just fine, however it did
> tickle my memory and helped me find what was wrong. Turns out that the
> person who was responsible for the BAx/ORx registers for this chip select
> had set the BI bit a long time ago, before we were contemplating doing
> what we're currently doing. The code had been reviewed and signed off, so
> in my back brain I was thinking everything there was good.
>
> When I read your paper, it mentioned the BI bit which got me to thinking.
> Sure enough, when I looked it was set. Soon as I cleared that bit, my
> burst transactions started working just fine.
>
> Thanks for the help.
You're welcome. I'm glad it helped.
Cheers,
Dave
prev parent reply other threads:[~2011-05-27 20:33 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-27 6:11 MPC8308 bursting question Bruce_Leonard
2011-05-27 14:26 ` David Hawkins
2011-05-27 20:29 ` Bruce_Leonard
2011-05-27 20:33 ` David Hawkins [this message]
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