[Qemu-devel] [PATCHv2 0/3] ds1225y: qdev-ification (used in MIPS Jazz)

[Qemu-devel] [PATCHv2 0/3] ds1225y: qdev-ification (used in MIPS Jazz)

[Hervé Poussineau]

This patchset qdev-ifies the ds1225y device, used in MIPS Jazz emulation.

Changes since v1:
- rebased
- split into multiple patches as per Markus advice

Hervé Poussineau (3):
  ds1225y: Remove protection stuff, which doesn't belong to this device
  ds1225y: use trace framework
  ds1225y: convert to qdev device, and use it in MIPS Jazz emulation

 hw/ds1225y.c   |  152 ++++++++++++++++++++++++++++---------------------------
 hw/mips.h      |    4 --
 hw/mips_jazz.c |   11 +++-
 trace-events   |    4 ++
 4 files changed, 90 insertions(+), 81 deletions(-)

-- 
1.7.5.4

[Qemu-devel] [PATCHv2 1/3] ds1225y: Remove protection stuff, which doesn't belong to this device

[Hervé Poussineau]

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
 hw/ds1225y.c |   42 +-----------------------------------------
 hw/mips.h    |    1 -
 2 files changed, 1 insertions(+), 42 deletions(-)

diff --git a/hw/ds1225y.c b/hw/ds1225y.c
index b1c5232..1fd7010 100644
--- a/hw/ds1225y.c
+++ b/hw/ds1225y.c
@@ -33,7 +33,6 @@ typedef struct ds1225y_t
     uint32_t chip_size;
     QEMUFile *file;
     uint8_t *contents;
-    uint8_t protection;
 } ds1225y_t;
 
 
@@ -98,34 +97,6 @@ static void nvram_writel (void *opaque, target_phys_addr_t addr, uint32_t val)
     nvram_writeb(opaque, addr + 3, (val >> 24) & 0xff);
 }
 
-static void nvram_writeb_protected (void *opaque, target_phys_addr_t addr, uint32_t val)
-{
-    ds1225y_t *s = opaque;
-
-    if (s->protection != 7) {
-#ifdef DEBUG_NVRAM
-    printf("nvram: prevent write of 0x%x at " TARGET_FMT_lx "\n", val, addr);
-#endif
-        return;
-    }
-
-    nvram_writeb(opaque, addr, val);
-}
-
-static void nvram_writew_protected (void *opaque, target_phys_addr_t addr, uint32_t val)
-{
-    nvram_writeb_protected(opaque, addr, val & 0xff);
-    nvram_writeb_protected(opaque, addr + 1, (val >> 8) & 0xff);
-}
-
-static void nvram_writel_protected (void *opaque, target_phys_addr_t addr, uint32_t val)
-{
-    nvram_writeb_protected(opaque, addr, val & 0xff);
-    nvram_writeb_protected(opaque, addr + 1, (val >> 8) & 0xff);
-    nvram_writeb_protected(opaque, addr + 2, (val >> 16) & 0xff);
-    nvram_writeb_protected(opaque, addr + 3, (val >> 24) & 0xff);
-}
-
 static CPUReadMemoryFunc * const nvram_read[] = {
     &nvram_readb,
     &nvram_readw,
@@ -138,23 +109,16 @@ static CPUWriteMemoryFunc * const nvram_write[] = {
     &nvram_writel,
 };
 
-static CPUWriteMemoryFunc * const nvram_write_protected[] = {
-    &nvram_writeb_protected,
-    &nvram_writew_protected,
-    &nvram_writel_protected,
-};
-
 /* Initialisation routine */
 void *ds1225y_init(target_phys_addr_t mem_base, const char *filename)
 {
     ds1225y_t *s;
-    int mem_indexRW, mem_indexRP;
+    int mem_indexRW;
     QEMUFile *file;
 
     s = qemu_mallocz(sizeof(ds1225y_t));
     s->chip_size = 0x2000; /* Fixed for ds1225y chip: 8 KiB */
     s->contents = qemu_mallocz(s->chip_size);
-    s->protection = 7;
 
     /* Read current file */
     file = qemu_fopen(filename, "rb");
@@ -174,9 +138,5 @@ void *ds1225y_init(target_phys_addr_t mem_base, const char *filename)
     mem_indexRW = cpu_register_io_memory(nvram_read, nvram_write, s,
                                          DEVICE_NATIVE_ENDIAN);
     cpu_register_physical_memory(mem_base, s->chip_size, mem_indexRW);
-    /* Read/write protected memory */
-    mem_indexRP = cpu_register_io_memory(nvram_read, nvram_write_protected, s,
-                                         DEVICE_NATIVE_ENDIAN);
-    cpu_register_physical_memory(mem_base + s->chip_size, s->chip_size, mem_indexRP);
     return s;
 }
diff --git a/hw/mips.h b/hw/mips.h
index 73aa8f8..93c8831 100644
--- a/hw/mips.h
+++ b/hw/mips.h
@@ -10,7 +10,6 @@ PCIBus *bonito_init(qemu_irq *pic);
 
 /* ds1225y.c */
 void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
-void ds1225y_set_protection(void *opaque, int protection);
 
 /* g364fb.c */
 int g364fb_mm_init(target_phys_addr_t vram_base,
-- 
1.7.5.4

[Qemu-devel] [PATCHv2 2/3] ds1225y: use trace framework

[Hervé Poussineau]

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
 hw/ds1225y.c |   16 +++++-----------
 trace-events |    4 ++++
 2 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/hw/ds1225y.c b/hw/ds1225y.c
index 1fd7010..5105b9b 100644
--- a/hw/ds1225y.c
+++ b/hw/ds1225y.c
@@ -24,9 +24,7 @@
 
 #include "hw.h"
 #include "mips.h"
-#include "nvram.h"
-
-//#define DEBUG_NVRAM
+#include "trace.h"
 
 typedef struct ds1225y_t
 {
@@ -42,10 +40,7 @@ static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr)
     uint32_t val;
 
     val = s->contents[addr];
-
-#ifdef DEBUG_NVRAM
-    printf("nvram: read 0x%x at " TARGET_FMT_lx "\n", val, addr);
-#endif
+    trace_nvram_read(addr, val);
     return val;
 }
 
@@ -71,11 +66,10 @@ static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t val)
 {
     ds1225y_t *s = opaque;
 
-#ifdef DEBUG_NVRAM
-    printf("nvram: write 0x%x at " TARGET_FMT_lx "\n", val, addr);
-#endif
+    val &= 0xff;
+    trace_nvram_write(addr, s->contents[addr], val);
 
-    s->contents[addr] = val & 0xff;
+    s->contents[addr] = val;
     if (s->file) {
         qemu_fseek(s->file, addr, SEEK_SET);
         qemu_put_byte(s->file, (int)val);
diff --git a/trace-events b/trace-events
index bebf612..a8cac32 100644
--- a/trace-events
+++ b/trace-events
@@ -92,6 +92,10 @@ disable cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
 disable cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
 disable cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
 
+# hw/ds1225y.c
+disable nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
+disable nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
+
 # hw/eccmemctl.c
 disable ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
 disable ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
-- 
1.7.5.4

[Qemu-devel] [PATCHv2 3/3] ds1225y: convert to qdev device, and use it in MIPS Jazz emulation

[Hervé Poussineau]

Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
---
 hw/ds1225y.c   |  100 +++++++++++++++++++++++++++++++++++++++++--------------
 hw/mips.h      |    3 --
 hw/mips_jazz.c |   11 +++++-
 3 files changed, 83 insertions(+), 31 deletions(-)

diff --git a/hw/ds1225y.c b/hw/ds1225y.c
index 5105b9b..87412e2 100644
--- a/hw/ds1225y.c
+++ b/hw/ds1225y.c
@@ -22,21 +22,20 @@
  * THE SOFTWARE.
  */
 
-#include "hw.h"
-#include "mips.h"
+#include "sysbus.h"
 #include "trace.h"
 
-typedef struct ds1225y_t
-{
+typedef struct {
+    DeviceState qdev;
     uint32_t chip_size;
+    char *filename;
     QEMUFile *file;
     uint8_t *contents;
-} ds1225y_t;
-
+} NvRamState;
 
 static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr)
 {
-    ds1225y_t *s = opaque;
+    NvRamState *s = opaque;
     uint32_t val;
 
     val = s->contents[addr];
@@ -64,7 +63,7 @@ static uint32_t nvram_readl (void *opaque, target_phys_addr_t addr)
 
 static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t val)
 {
-    ds1225y_t *s = opaque;
+    NvRamState *s = opaque;
 
     val &= 0xff;
     trace_nvram_write(addr, s->contents[addr], val);
@@ -103,34 +102,83 @@ static CPUWriteMemoryFunc * const nvram_write[] = {
     &nvram_writel,
 };
 
-/* Initialisation routine */
-void *ds1225y_init(target_phys_addr_t mem_base, const char *filename)
+static int nvram_post_load(void *opaque, int version_id)
 {
-    ds1225y_t *s;
-    int mem_indexRW;
+    NvRamState *s = opaque;
+
+    /* Close file, as filename may has changed in load/store process */
+    if (s->file) {
+        qemu_fclose(s->file);
+    }
+
+    /* Write back nvram contents */
+    s->file = qemu_fopen(s->filename, "wb");
+    if (s->file) {
+        /* Write back contents, as 'wb' mode cleaned the file */
+        qemu_put_buffer(s->file, s->contents, s->chip_size);
+        qemu_fflush(s->file);
+    }
+
+    return 0;
+}
+
+static const VMStateDescription vmstate_nvram = {
+    .name = "nvram",
+    .version_id = 0,
+    .minimum_version_id = 0,
+    .minimum_version_id_old = 0,
+    .post_load = nvram_post_load,
+    .fields = (VMStateField[]) {
+        VMSTATE_VARRAY_UINT32(contents, NvRamState, chip_size, 0,
+                              vmstate_info_uint8, uint8_t),
+        VMSTATE_END_OF_LIST()
+    }
+};
+
+typedef struct {
+    SysBusDevice busdev;
+    NvRamState nvram;
+} SysBusNvRamState;
+
+static int nvram_sysbus_initfn(SysBusDevice *dev)
+{
+    NvRamState *s = &FROM_SYSBUS(SysBusNvRamState, dev)->nvram;
     QEMUFile *file;
+    int s_io;
 
-    s = qemu_mallocz(sizeof(ds1225y_t));
-    s->chip_size = 0x2000; /* Fixed for ds1225y chip: 8 KiB */
     s->contents = qemu_mallocz(s->chip_size);
 
+    s_io = cpu_register_io_memory(nvram_read, nvram_write, s,
+                                  DEVICE_NATIVE_ENDIAN);
+    sysbus_init_mmio(dev, s->chip_size, s_io);
+
     /* Read current file */
-    file = qemu_fopen(filename, "rb");
+    file = qemu_fopen(s->filename, "rb");
     if (file) {
         /* Read nvram contents */
         qemu_get_buffer(file, s->contents, s->chip_size);
         qemu_fclose(file);
     }
-    s->file = qemu_fopen(filename, "wb");
-    if (s->file) {
-        /* Write back contents, as 'wb' mode cleaned the file */
-        qemu_put_buffer(s->file, s->contents, s->chip_size);
-        qemu_fflush(s->file);
-    }
+    nvram_post_load(s, 0);
 
-    /* Read/write memory */
-    mem_indexRW = cpu_register_io_memory(nvram_read, nvram_write, s,
-                                         DEVICE_NATIVE_ENDIAN);
-    cpu_register_physical_memory(mem_base, s->chip_size, mem_indexRW);
-    return s;
+    return 0;
 }
+
+static SysBusDeviceInfo nvram_sysbus_info = {
+    .qdev.name  = "nvram",
+    .qdev.size  = sizeof(SysBusNvRamState),
+    .qdev.vmsd  = &vmstate_nvram,
+    .init       = nvram_sysbus_initfn,
+    .qdev.props = (Property[]) {
+        DEFINE_PROP_UINT32("size", SysBusNvRamState, nvram.chip_size, 0x2000),
+        DEFINE_PROP_STRING("filename", SysBusNvRamState, nvram.filename),
+        DEFINE_PROP_END_OF_LIST(),
+    },
+};
+
+static void nvram_register(void)
+{
+    sysbus_register_withprop(&nvram_sysbus_info);
+}
+
+device_init(nvram_register)
diff --git a/hw/mips.h b/hw/mips.h
index 93c8831..cae5f4c 100644
--- a/hw/mips.h
+++ b/hw/mips.h
@@ -8,9 +8,6 @@ PCIBus *gt64120_register(qemu_irq *pic);
 /* bonito.c */
 PCIBus *bonito_init(qemu_irq *pic);
 
-/* ds1225y.c */
-void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
-
 /* g364fb.c */
 int g364fb_mm_init(target_phys_addr_t vram_base,
                    target_phys_addr_t ctrl_base, int it_shift,
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index a100394..99002c3 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -37,6 +37,7 @@
 #include "loader.h"
 #include "mc146818rtc.h"
 #include "blockdev.h"
+#include "sysbus.h"
 
 enum jazz_model_e
 {
@@ -115,6 +116,8 @@ void mips_jazz_init (ram_addr_t ram_size,
     void* rc4030_opaque;
     int s_rtc, s_dma_dummy;
     NICInfo *nd;
+    DeviceState *dev;
+    SysBusDevice *sysbus;
     ISADevice *pit;
     DriveInfo *fds[MAX_FD];
     qemu_irq esp_reset, dma_enable;
@@ -266,8 +269,12 @@ void mips_jazz_init (ram_addr_t ram_size,
     /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
     audio_init(i8259, NULL);
 
-    /* NVRAM: Unprotected at 0x9000, Protected at 0xa000, Read only at 0xb000 */
-    ds1225y_init(0x80009000, "nvram");
+    /* NVRAM */
+    dev = qdev_create(NULL, "nvram");
+    qdev_prop_set_string(dev, "filename", qemu_strdup("nvram"));
+    qdev_init_nofail(dev);
+    sysbus = sysbus_from_qdev(dev);
+    sysbus_mmio_map(sysbus, 0, 0x80009000);
 
     /* LED indicator */
     jazz_led_init(0x8000f000);
-- 
1.7.5.4

Re: [Qemu-devel] [PATCHv2 2/3] ds1225y: use trace framework

[Stefan Hajnoczi]

2011/7/2 Hervé Poussineau <hpoussin@reactos.org>:
> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
> ---
>  hw/ds1225y.c |   16 +++++-----------
>  trace-events |    4 ++++
>  2 files changed, 9 insertions(+), 11 deletions(-)

Reviewed-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>

Re: [Qemu-devel] [PATCHv2 0/3] ds1225y: qdev-ification (used in MIPS Jazz)

[Hervé Poussineau]

Ping ?

Hervé Poussineau a écrit :
> This patchset qdev-ifies the ds1225y device, used in MIPS Jazz emulation.
>
> Changes since v1:
> - rebased
> - split into multiple patches as per Markus advice
>
> Hervé Poussineau (3):
>   ds1225y: Remove protection stuff, which doesn't belong to this device
>   ds1225y: use trace framework
>   ds1225y: convert to qdev device, and use it in MIPS Jazz emulation
>
>  hw/ds1225y.c   |  152 ++++++++++++++++++++++++++++---------------------------
>  hw/mips.h      |    4 --
>  hw/mips_jazz.c |   11 +++-
>  trace-events   |    4 ++
>  4 files changed, 90 insertions(+), 81 deletions(-)
>
>   

Re: [Qemu-devel] [PATCHv2 3/3] ds1225y: convert to qdev device, and use it in MIPS Jazz emulation

[Blue Swirl]

2011/7/2 Hervé Poussineau <hpoussin@reactos.org>:
> Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>
> ---
>  hw/ds1225y.c   |  100 +++++++++++++++++++++++++++++++++++++++++--------------
>  hw/mips.h      |    3 --
>  hw/mips_jazz.c |   11 +++++-
>  3 files changed, 83 insertions(+), 31 deletions(-)
>
> diff --git a/hw/ds1225y.c b/hw/ds1225y.c
> index 5105b9b..87412e2 100644
> --- a/hw/ds1225y.c
> +++ b/hw/ds1225y.c
> @@ -22,21 +22,20 @@
>  * THE SOFTWARE.
>  */
>
> -#include "hw.h"
> -#include "mips.h"
> +#include "sysbus.h"
>  #include "trace.h"
>
> -typedef struct ds1225y_t
> -{
> +typedef struct {
> +    DeviceState qdev;
>     uint32_t chip_size;
> +    char *filename;
>     QEMUFile *file;
>     uint8_t *contents;
> -} ds1225y_t;
> -
> +} NvRamState;
>
>  static uint32_t nvram_readb (void *opaque, target_phys_addr_t addr)
>  {
> -    ds1225y_t *s = opaque;
> +    NvRamState *s = opaque;
>     uint32_t val;
>
>     val = s->contents[addr];
> @@ -64,7 +63,7 @@ static uint32_t nvram_readl (void *opaque, target_phys_addr_t addr)
>
>  static void nvram_writeb (void *opaque, target_phys_addr_t addr, uint32_t val)
>  {
> -    ds1225y_t *s = opaque;
> +    NvRamState *s = opaque;
>
>     val &= 0xff;
>     trace_nvram_write(addr, s->contents[addr], val);
> @@ -103,34 +102,83 @@ static CPUWriteMemoryFunc * const nvram_write[] = {
>     &nvram_writel,
>  };
>
> -/* Initialisation routine */
> -void *ds1225y_init(target_phys_addr_t mem_base, const char *filename)
> +static int nvram_post_load(void *opaque, int version_id)
>  {
> -    ds1225y_t *s;
> -    int mem_indexRW;
> +    NvRamState *s = opaque;
> +
> +    /* Close file, as filename may has changed in load/store process */
> +    if (s->file) {
> +        qemu_fclose(s->file);
> +    }
> +
> +    /* Write back nvram contents */
> +    s->file = qemu_fopen(s->filename, "wb");
> +    if (s->file) {
> +        /* Write back contents, as 'wb' mode cleaned the file */
> +        qemu_put_buffer(s->file, s->contents, s->chip_size);
> +        qemu_fflush(s->file);
> +    }
> +
> +    return 0;
> +}
> +
> +static const VMStateDescription vmstate_nvram = {
> +    .name = "nvram",

This name is too generic, how about ds1225y?

> +    .version_id = 0,
> +    .minimum_version_id = 0,
> +    .minimum_version_id_old = 0,
> +    .post_load = nvram_post_load,
> +    .fields = (VMStateField[]) {
> +        VMSTATE_VARRAY_UINT32(contents, NvRamState, chip_size, 0,
> +                              vmstate_info_uint8, uint8_t),
> +        VMSTATE_END_OF_LIST()
> +    }
> +};
> +
> +typedef struct {
> +    SysBusDevice busdev;
> +    NvRamState nvram;
> +} SysBusNvRamState;
> +
> +static int nvram_sysbus_initfn(SysBusDevice *dev)
> +{
> +    NvRamState *s = &FROM_SYSBUS(SysBusNvRamState, dev)->nvram;
>     QEMUFile *file;
> +    int s_io;
>
> -    s = qemu_mallocz(sizeof(ds1225y_t));
> -    s->chip_size = 0x2000; /* Fixed for ds1225y chip: 8 KiB */
>     s->contents = qemu_mallocz(s->chip_size);
>
> +    s_io = cpu_register_io_memory(nvram_read, nvram_write, s,
> +                                  DEVICE_NATIVE_ENDIAN);
> +    sysbus_init_mmio(dev, s->chip_size, s_io);
> +
>     /* Read current file */
> -    file = qemu_fopen(filename, "rb");
> +    file = qemu_fopen(s->filename, "rb");
>     if (file) {
>         /* Read nvram contents */
>         qemu_get_buffer(file, s->contents, s->chip_size);
>         qemu_fclose(file);
>     }
> -    s->file = qemu_fopen(filename, "wb");
> -    if (s->file) {
> -        /* Write back contents, as 'wb' mode cleaned the file */
> -        qemu_put_buffer(s->file, s->contents, s->chip_size);
> -        qemu_fflush(s->file);
> -    }
> +    nvram_post_load(s, 0);
>
> -    /* Read/write memory */
> -    mem_indexRW = cpu_register_io_memory(nvram_read, nvram_write, s,
> -                                         DEVICE_NATIVE_ENDIAN);
> -    cpu_register_physical_memory(mem_base, s->chip_size, mem_indexRW);
> -    return s;
> +    return 0;
>  }
> +
> +static SysBusDeviceInfo nvram_sysbus_info = {
> +    .qdev.name  = "nvram",
> +    .qdev.size  = sizeof(SysBusNvRamState),
> +    .qdev.vmsd  = &vmstate_nvram,
> +    .init       = nvram_sysbus_initfn,
> +    .qdev.props = (Property[]) {
> +        DEFINE_PROP_UINT32("size", SysBusNvRamState, nvram.chip_size, 0x2000),
> +        DEFINE_PROP_STRING("filename", SysBusNvRamState, nvram.filename),
> +        DEFINE_PROP_END_OF_LIST(),
> +    },
> +};
> +
> +static void nvram_register(void)
> +{
> +    sysbus_register_withprop(&nvram_sysbus_info);
> +}
> +
> +device_init(nvram_register)
> diff --git a/hw/mips.h b/hw/mips.h
> index 93c8831..cae5f4c 100644
> --- a/hw/mips.h
> +++ b/hw/mips.h
> @@ -8,9 +8,6 @@ PCIBus *gt64120_register(qemu_irq *pic);
>  /* bonito.c */
>  PCIBus *bonito_init(qemu_irq *pic);
>
> -/* ds1225y.c */
> -void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
> -
>  /* g364fb.c */
>  int g364fb_mm_init(target_phys_addr_t vram_base,
>                    target_phys_addr_t ctrl_base, int it_shift,
> diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
> index a100394..99002c3 100644
> --- a/hw/mips_jazz.c
> +++ b/hw/mips_jazz.c
> @@ -37,6 +37,7 @@
>  #include "loader.h"
>  #include "mc146818rtc.h"
>  #include "blockdev.h"
> +#include "sysbus.h"
>
>  enum jazz_model_e
>  {
> @@ -115,6 +116,8 @@ void mips_jazz_init (ram_addr_t ram_size,
>     void* rc4030_opaque;
>     int s_rtc, s_dma_dummy;
>     NICInfo *nd;
> +    DeviceState *dev;
> +    SysBusDevice *sysbus;
>     ISADevice *pit;
>     DriveInfo *fds[MAX_FD];
>     qemu_irq esp_reset, dma_enable;
> @@ -266,8 +269,12 @@ void mips_jazz_init (ram_addr_t ram_size,
>     /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
>     audio_init(i8259, NULL);
>
> -    /* NVRAM: Unprotected at 0x9000, Protected at 0xa000, Read only at 0xb000 */
> -    ds1225y_init(0x80009000, "nvram");
> +    /* NVRAM */
> +    dev = qdev_create(NULL, "nvram");
> +    qdev_prop_set_string(dev, "filename", qemu_strdup("nvram"));

For the file name it may be OK.

> +    qdev_init_nofail(dev);
> +    sysbus = sysbus_from_qdev(dev);
> +    sysbus_mmio_map(sysbus, 0, 0x80009000);
>
>     /* LED indicator */
>     jazz_led_init(0x8000f000);
> --
> 1.7.5.4
>
>
>