Re: [PATCH v4 26/39] pcnet: convert to memory API

[Bob Breuer <breuerr@mc.net>]

Avi Kivity wrote:
> Also related chips.
> 
> Reviewed-by: Richard Henderson <rth@twiddle.net>
> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
> Signed-off-by: Avi Kivity <avi@redhat.com>
> ---
>  hw/lance.c     |   31 ++++++++++-------------
>  hw/pcnet-pci.c |   74 +++++++++++++++++++++++++++++++++----------------------
>  hw/pcnet.h     |    4 ++-
>  3 files changed, 61 insertions(+), 48 deletions(-)
> 
> diff --git a/hw/lance.c b/hw/lance.c
> index ddb1cbb..8e20360 100644
> --- a/hw/lance.c
> +++ b/hw/lance.c
> @@ -55,8 +55,8 @@ static void parent_lance_reset(void *opaque, int irq, int level)
>          pcnet_h_reset(&d->state);
>  }
>  
> -static void lance_mem_writew(void *opaque, target_phys_addr_t addr,
> -                             uint32_t val)
> +static void lance_mem_write(void *opaque, target_phys_addr_t addr,
> +                            uint64_t val, unsigned size)
>  {
>      SysBusPCNetState *d = opaque;
>  
> @@ -64,7 +64,8 @@ static void lance_mem_writew(void *opaque, target_phys_addr_t addr,
>      pcnet_ioport_writew(&d->state, addr, val & 0xffff);
>  }
>  
> -static uint32_t lance_mem_readw(void *opaque, target_phys_addr_t addr)
> +static uint64_t lance_mem_read(void *opaque, target_phys_addr_t addr,
> +                               unsigned size)
>  {
>      SysBusPCNetState *d = opaque;
>      uint32_t val;
> @@ -74,16 +75,14 @@ static uint32_t lance_mem_readw(void *opaque, target_phys_addr_t addr)
>      return val & 0xffff;
>  }
>  
> -static CPUReadMemoryFunc * const lance_mem_read[3] = {
> -    NULL,
> -    lance_mem_readw,
> -    NULL,
> -};
> -
> -static CPUWriteMemoryFunc * const lance_mem_write[3] = {
> -    NULL,
> -    lance_mem_writew,
> -    NULL,
> +static const MemoryRegionOps lance_mem_ops = {
> +    .read = lance_mem_read,
> +    .write = lance_mem_write,
> +    .endianness = DEVICE_NATIVE_ENDIAN,
> +    .valid = {
> +        .min_access_size = 2,
> +        .max_access_size = 2,
> +    },
>  };
>  
>  static void lance_cleanup(VLANClientState *nc)
> @@ -117,13 +116,11 @@ static int lance_init(SysBusDevice *dev)
>      SysBusPCNetState *d = FROM_SYSBUS(SysBusPCNetState, dev);
>      PCNetState *s = &d->state;
>  
> -    s->mmio_index =
> -        cpu_register_io_memory(lance_mem_read, lance_mem_write, d,
> -                               DEVICE_NATIVE_ENDIAN);
> +    memory_region_init_io(&s->mmio, &lance_mem_ops, s, "lance-mmio", 4);

You've switched up d and s here, so anything that tries to talk to the
ethernet, such as a sparc32 guest, will now cause Qemu to segfault.

Bob